[PATCH] KVM: arm/arm64: Stop leaking vcpu pid references

SyS_clone+0x18/0x20 >[] el0_svc_naked+0x24/0x28 >[] 0x On x86 kvm_vcpu_uninit() is called on the path from kvm_arch_destroy_vm(), on arm no equivalent call is made. Add the call to kvm_arch_vcpu_free(). Signed-off-by: James Morse <james.mo...@arm.com> Fixes: 749cf

[PATCH] kvmtool: devices.c: Update parent when inserting into rbtree

. This isn't a problem in practice, as all devices appear to be inserted in-order, so our rbtree is actually a monochrome linked list. Signed-off-by: James Morse <james.mo...@arm.com> --- devices.c | 1 + 1 file changed, 1 insertion(+) diff --git a/devices.c b/devices.c index b560a59..a7c666a

[PATCH v2] arm64: KVM: Register CPU notifiers when the kernel runs at HYP

translation, move the registering of these notifiers into init_subsystems(), and add a is_kernel_in_hyp_mode() path to each callback. Fixes: 1e947bad0b6 ("arm64: KVM: Skip HYP setup when already running in HYP") Signed-off-by: James Morse <james.mo...@arm.com> --- Change since v1: *

Re: [PATCH] arm64: KVM: Register CPU notifiers when the kernel runs at HYP

On 30/03/16 17:30, Marc Zyngier wrote: >> diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c >> index 6accd66d26f0..cf0184edf4f5 100644 >> --- a/arch/arm/kvm/arm.c >> +++ b/arch/arm/kvm/arm.c >> @@ -1084,9 +1092,13 @@ static int hyp_init_cpu_pm_notifier(struct >> notifier_block *self, >>

[PATCH] arm64: KVM: Register CPU notifiers when the kernel runs at HYP

translation, move the registering of these notifiers into init_subsystems(), and add an is_kernel_in_hyp_mode() path to each callback. Fixes: 1e947bad0b6 ("arm64: KVM: Skip HYP setup when already running in HYP") Signed-off-by: James Morse <james.mo...@arm.com> --- arch/ar

Re: [PATCH V8 04/10] arm64: exception: handle Synchronous External Abort

(translation table walk)" }, > + { do_sea, SIGBUS, 0, "level 0 synchronous > parity error (translation table walk)" }, > + { do_sea, SIGBUS, 0, "level 1 synchronous > parity error (translation table walk)" },

Re: [PATCH V8 05/10] acpi: apei: handle SEA notification type for ARMv8

Hi Tyler, On 01/02/17 17:16, Tyler Baicar wrote: > ARM APEI extension proposal added SEA (Synchronous External Abort) > notification type for ARMv8. > Add a new GHES error source handling function for SEA. If an error > source's notification type is SEA, then this function can be registered >

Re: [PATCH V7 04/10] arm64: exception: handle Synchronous External Abort

Hi Tyler, On 20/01/17 20:35, Baicar, Tyler wrote: > On 1/19/2017 10:55 AM, James Morse wrote: >> On 18/01/17 23:26, Baicar, Tyler wrote: >>> On 1/17/2017 3:31 AM, James Morse wrote: >>>> On 12/01/17 18:15, Tyler Baicar wrote: >>>>> +info.si_addr =

Re: [PATCH V7 05/10] acpi: apei: handle SEA notification type for ARMv8

Hi Tyler, On 20/01/17 20:58, Baicar, Tyler wrote: > On 1/19/2017 10:57 AM, James Morse wrote: >> On 18/01/17 23:51, Baicar, Tyler wrote: >>> On 1/18/2017 7:50 AM, James Morse wrote: >>>> On 12/01/17 18:15, Tyler Baicar wrote: >>>>> diff --git a/driver

Re: [PATCH V10 07/10] efi: print unrecognized CPER section

On 22/02/17 01:12, Russell King - ARM Linux wrote: > On Tue, Feb 21, 2017 at 07:10:11PM +0000, James Morse wrote: >> Hi Tyler, >> >> On 15/02/17 19:51, Tyler Baicar wrote: >>> + } else { >>> + const void *unknown_err; >>> + >>>

Re: [PATCH 02/20] arm64: KVM: Implement HVC_RESET_VECTORS stub hypercall

Hi Marc, On 17/02/17 15:44, Marc Zyngier wrote: > In order to restore HYP mode to its original condition, KVM currently > implements __kvm_hyp_reset(). As we're moving towards a hyp-stub > defined API, it becomes necessary to implement HVC_RESET_VECTORS. > > This patch adds the HVC_RESET_VECTORS

Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support

Hi Tyler, On 21/02/17 21:22, Tyler Baicar wrote: > Currently external aborts are unsupported by the guest abort > handling. Add handling for SEAs so that the host kernel reports > SEAs which occur in the guest kernel. > diff --git a/arch/arm/include/asm/kvm_arm.h b/arch/arm/include/asm/kvm_arm.h

Re: [PATCH V10 07/10] efi: print unrecognized CPER section

the "%s""section... that this file consistently uses. This means this code will still work as expected when someone adds '%ss' support to printk! > +gdata->error_data_length); > + print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16, 4, > +

Re: [PATCH V8 06/10] acpi: apei: panic OS with fatal error status block

_estatus_cache_add(ghes->generic, ghes->estatus); > } > + if (ghes_severity(ghes->estatus->error_severity) >= GHES_SEV_PANIC) { > + __ghes_call_panic(); > + } > + I think this ghes_severity() then panic() should go above the: > if (!ghes_estatus_ca

Re: [PATCH V8 06/10] acpi: apei: panic OS with fatal error status block

Hi Tyler, On 13/02/17 22:45, Baicar, Tyler wrote: > On 2/9/2017 3:48 AM, James Morse wrote: >> On 01/02/17 17:16, Tyler Baicar wrote: >>> From: "Jonathan (Zhixiong) Zhang" <zjzh...@codeaurora.org> >>> >>> Even if an error status bloc

Re: [PATCH V7 04/10] arm64: exception: handle Synchronous External Abort

Hi Tyler, On 16/01/17 11:53, Will Deacon wrote: > On Thu, Jan 12, 2017 at 11:15:18AM -0700, Tyler Baicar wrote: >> SEA exceptions are often caused by an uncorrected hardware >> error, and are handled when data abort and instruction abort >> exception classes have specific values for their Fault

Re: [PATCH V7 04/10] arm64: exception: handle Synchronous External Abort

Hi Tyler, On 12/01/17 18:15, Tyler Baicar wrote: > SEA exceptions are often caused by an uncorrected hardware > error, and are handled when data abort and instruction abort > exception classes have specific values for their Fault Status > Code. > When SEA occurs, before killing the process, go

Re: [PATCH V7 05/10] acpi: apei: handle SEA notification type for ARMv8

Hi Tyler, On 12/01/17 18:15, Tyler Baicar wrote: > ARM APEI extension proposal added SEA (Synchrounous External Nit: Synchronous > Abort) notification type for ARMv8. > Add a new GHES error source handling function for SEA. If an error > source's notification type is SEA, then this function can

Re: [PATCH V7 04/10] arm64: exception: handle Synchronous External Abort

Hi Tyler, On 18/01/17 23:26, Baicar, Tyler wrote: > On 1/17/2017 3:31 AM, James Morse wrote: >> On 12/01/17 18:15, Tyler Baicar wrote: >>> SEA exceptions are often caused by an uncorrected hardware >>> error, and are handled when data abort and instruction abort

Re: [PATCH V7 05/10] acpi: apei: handle SEA notification type for ARMv8

Hi Tyler, On 18/01/17 23:51, Baicar, Tyler wrote: > On 1/18/2017 7:50 AM, James Morse wrote: >> On 12/01/17 18:15, Tyler Baicar wrote: >>> ARM APEI extension proposal added SEA (Synchrounous External >>> Abort) notification type for ARMv8. >>> Add a new GHES er

Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support

Hi, On 28/02/17 06:25, Xiongfeng Wang wrote: > On 2017/2/27 21:58, James Morse wrote: >> On 25/02/17 07:15, Xiongfeng Wang wrote: >>> Can we inject an sea into the guest, so that the guest can kill the >>> application which causes the error if the guest won't be termina

Re: [RFC PATCH V1 v4.10-rc3 1/1] acpi: apei: handle GSIV notification type

Hi Shiju, On 27/02/17 18:19, Shiju Jose wrote: > Add a new GHES error source handling function for > GSIV(Global System Interrupt Vector). > If an error source's notification type is GSIV, > then this handling function can be registered > into the GSIV handler and it can parse > and report error

Re: [RFC PATCH V1 v4.10-rc3 1/1] acpi: apei: handle GSIV notification type

Hi Hanjun, On 01/03/17 08:27, Hanjun Guo wrote: > On 2017/2/28 21:22, James Morse wrote: >> On 27/02/17 18:19, Shiju Jose wrote: >>> Add a new GHES error source handling function for >>> GSIV(Global System Interrupt Vector). >>> If an erro

Re: [PATCH V5 01/10] acpi: apei: read ack upon ghes record consumption

PI_HEST_TYPE_GENERIC_ERROR && > + hest_hdr->type != ACPI_HEST_TYPE_GENERIC_ERROR_V2) > return 0; > > if (!((struct acpi_hest_generic *)hest_hdr)->enabled) > diff --git a/include/acpi/ghes.h b/include/acpi/ghes.h > index 720446c..68f088

Re: [PATCH V5 02/10] ras: acpi/apei: cper: generic error data entry v3 per ACPI 6.1

st_generic_data_v300 *)(gdata)) + 1) : > + gdata + 1; > +} > diff --git a/include/linux/cper.h b/include/linux/cper.h > index dcacb1a..13ea41c 100644 > --- a/include/linux/cper.h > +++ b/include/linux/cper.h > @@ -255,6 +255,18 @@ enum { > > #define CPER_PCIE_SLOT_SHIFT 3 > > +#define acpi_hest_generic_data_error_length(gdata) \ > + (((struct acpi_hest_generic_data *)(gdata))->error_data_length) > +#define acpi_hest_generic_data_size(gdata) \ > + ((acpi_hest_generic_data_version(gdata) >= 3) ? \ > + sizeof(struct acpi_hest_generic_data_v300) :\ > + sizeof(struct acpi_hest_generic_data)) > +#define acpi_hest_generic_data_record_size(gdata)\ > + (acpi_hest_generic_data_size(gdata) + \ > + acpi_hest_generic_data_error_length(gdata)) > +#define acpi_hest_generic_data_next(gdata) \ > + ((void *)(gdata) + acpi_hest_generic_data_record_size(gdata)) > + How come these aren't in ghes.h? Reviewed-by: James Morse <james.mo...@arm.com> Thanks, James ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

Re: [PATCH V5 03/10] efi: parse ARMv8 processor error

Hi Tyler, On 21/11/16 22:35, Tyler Baicar wrote: > Add support for ARMv8 Common Platform Error Record (CPER). > UEFI 2.6 specification adds support for ARMv8 specific > processor error information to be reported as part of the > CPER records. This provides more detail on for processor error logs.

Re: [PATCH V6 03/10] efi: parse ARM processor error

r error logs. Looks good to me, a few minor comments below. Reviewed-by: James Morse <james.mo...@arm.com> > diff --git a/drivers/firmware/efi/cper.c b/drivers/firmware/efi/cper.c > index 8fa4e23..1ac2572 100644 > --- a/drivers/firmware/efi/cper.c > +++ b/drivers/firmware/e

Re: [PATCH V6 05/10] acpi: apei: handle SEA notification type for ARMv8

Hi Tyler, On 05/01/17 22:31, Baicar, Tyler wrote: > On 12/20/2016 8:29 AM, James Morse wrote: >> On 07/12/16 21:48, Tyler Baicar wrote: >>> ARM APEI extension proposal added SEA (Synchrounous External >>> Abort) notification type for ARMv8. >>> Add a new

Re: [PATCH V6 05/10] acpi: apei: handle SEA notification type for ARMv8

Hi Tyler, On 07/12/16 21:48, Tyler Baicar wrote: > ARM APEI extension proposal added SEA (Synchrounous External > Abort) notification type for ARMv8. > Add a new GHES error source handling function for SEA. If an error > source's notification type is SEA, then this function can be registered >

Re: [PATCH v3 01/25] arm64: hyp-stub: Implement HVC_RESET_VECTORS stub hypercall

Hi Catalin, On 21/03/17 17:04, Catalin Marinas wrote: > On Mon, Mar 06, 2017 at 02:24:34PM +, Marc Zyngier wrote: >> Let's define a new stub hypercall that resets the HYP configuration >> to its default: hyp-stub vectors, and MMU disabled. >> >> Of course, for the hyp-stub itself, this is a

Re: [PATCH v3 01/25] arm64: hyp-stub: Implement HVC_RESET_VECTORS stub hypercall

On 21/03/17 17:37, Marc Zyngier wrote: > On 21/03/17 17:25, James Morse wrote: >> On 21/03/17 17:04, Catalin Marinas wrote: >>> On Mon, Mar 06, 2017 at 02:24:34PM +, Marc Zyngier wrote: >>>> Let's define a new stub hypercall that resets the HYP configuration

Re: [PATCH] kvm: pass the virtual SEI syndrome to guest OS

Hi Christoffer, On 21/03/17 11:34, Christoffer Dall wrote: > On Tue, Mar 21, 2017 at 02:32:29PM +0800, gengdongjiu wrote: >> On 2017/3/20 23:08, James Morse wrote: >>>>>> On 20/03/17 07:55, Dongjiu Geng wrote: >>>>>>> In the RAS implementation

Re: [PATCH V13 10/10] arm/arm64: KVM: add guest SEA support

Hi Tyler, On 21/03/17 22:47, Tyler Baicar wrote: > Currently external aborts are unsupported by the guest abort > handling. Add handling for SEAs so that the host kernel reports > SEAs which occur in the guest kernel. Looks good, Can we squash the APEI changes into the patch that added them?

Re: [PATCH] kvm: pass the virtual SEI syndrome to guest OS

Hi Christoffer, (CC: Leif and Achin who know more about how UEFI fits into this picture) On 21/03/17 19:39, Christoffer Dall wrote: > On Tue, Mar 21, 2017 at 07:11:44PM +0000, James Morse wrote: >> On 21/03/17 11:34, Christoffer Dall wrote: >>> On Tue, Mar 21, 2017 a

Re: [PATCH] kvm: pass the virtual SEI syndrome to guest OS

Hi Peter, On 28/03/17 12:33, Peter Maydell wrote: > On 28 March 2017 at 12:23, Christoffer Dall <cd...@linaro.org> wrote: >> On Tue, Mar 28, 2017 at 11:48:08AM +0100, James Morse wrote: >>> On the host, part of UEFI is involved to generate the CPER records. >>> In

Re: [PATCH] kvm: pass the virtual SEI syndrome to guest OS

Hi gengdongjiu, On 28/03/17 13:16, gengdongjiu wrote: > On 2017/3/28 19:54, Achin Gupta wrote: >> On Tue, Mar 28, 2017 at 01:23:28PM +0200, Christoffer Dall wrote: >>> On Tue, Mar 28, 2017 at 11:48:08AM +0100, James Morse wrote: >>>> On the host, part of UEFI is

Re: [PATCH] KVM: arm/arm64: Signal SIGBUS when stage2 discovers hwpoison memory

Hi guys, On 27/03/17 12:20, Punit Agrawal wrote: > Christoffer Dall <cd...@linaro.org> writes: >> On Wed, Mar 15, 2017 at 04:07:27PM +0000, James Morse wrote: >>> Once we enable ARCH_SUPPORTS_MEMORY_FAILURE on arm64[0], notifications for >>> broken memory can c

Re: [PATCH] kvm: pass the virtual SEI syndrome to guest OS

Hi gengdongjiu On 22/03/17 13:37, gengdongjiu wrote: > On 2017/3/21 21:10, James Morse wrote: >> On 21/03/17 06:32, gengdongjiu wrote: >>> so for both SEA and SEI, do you prefer to below steps? >>> EL0/EL1 SEI/SEA ---> EL3 firmware first handle --> EL2 hyp

Re: [PATCH] arm/arm64: KVM: send SIGBUS error to qemu

Hi Dongjiu Geng, On 23/03/17 13:01, Dongjiu Geng wrote: > when the pfn is KVM_PFN_ERR_HWPOISON, it indicates to send > SIGBUS signal from KVM's fault-handling code to qemu, qemu > can handle this signal according to the fault address. I'm afraid I beat you to it on this one:

Re: [PATCH V12 05/10] acpi: apei: handle SEA notification type for ARMv8

Hi Tyler, On 06/03/17 20:44, Tyler Baicar wrote: > ARM APEI extension proposal added SEA (Synchronous External Abort) > notification type for ARMv8. > Add a new GHES error source handling function for SEA. If an error > source's notification type is SEA, then this function can be registered >

Re: [PATCH] kvm: pass the virtual SEI syndrome to guest OS

Hi, On 21/03/17 06:32, gengdongjiu wrote: > On 2017/3/20 23:08, James Morse wrote: >> On 20/03/17 13:58, Marc Zyngier wrote: >>> On 20/03/17 12:28, gengdongjiu wrote: >>>> On 2017/3/20 19:24, Marc Zyngier wrote: >>>>> On 20/03/17 07:55, Dongjiu

[PATCH] KVM: arm/arm64: Signal SIGBUS when stage2 discovers hwpoison memory

as x86 does, and deliver the SIGBUS when we discover KVM_PFN_ERR_HWPOISON. Use the stage2 mapping size as the si_addr_lsb as this matches the user space mapping size. Signed-off-by: James Morse <james.mo...@arm.com> CC: gengdongjiu <gengdj.1...@gmail.com> --- Without this patch both kvmt

Re: [PATCH] kvm: pass the virtual SEI syndrome to guest OS

Hi Dongjiu Geng, On 20/03/17 13:58, Marc Zyngier wrote: > On 20/03/17 12:28, gengdongjiu wrote: >> On 2017/3/20 19:24, Marc Zyngier wrote: >>> Please include James Morse on anything RAS related, as he's already >>> looking at related patches. (Thanks Marc,) >>

Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support

Hi Wang Xiongfeng, On 22/03/17 02:46, Xiongfeng Wang wrote: >> Guests are a special case as QEMU may never access the faulty memory itself, >> so >> it won't receive the 'late' signal. It looks like ARM/arm64 KVM lacks support >> for KVM_PFN_ERR_HWPOISON which sends SIGBUS from KVM's

Re: [PATCH] KVM: arm/arm64: Signal SIGBUS when stage2 discovers hwpoison memory

Hi gengdongjiu, On 05/04/17 00:05, gengdongjiu wrote: > thanks for the patch, have you consider to told Qemu or KVM tools > the reason for this bus error(SEA/SEI)? They should never need to know. We should treat Qemu/kvmtool like any other program. Programs should only need to know about the

Re: [PATCH v3 7/8] arm64: exception: handle asynchronous SError interrupt

Hi Wang Xiongfeng, On 19/04/17 03:37, Xiongfeng Wang wrote: > On 2017/4/18 18:51, James Morse wrote: >> The host expects to receive physical SError Interrupts. The ARM-ARM doesn't >> describe a way to inject these as they are generated by the CPU. >> >> Am I right in th

Re: [PATCH V12 10/10] arm/arm64: KVM: add guest SEA support

On 07/03/17 17:58, Baicar, Tyler wrote: > On 3/7/2017 4:48 AM, James Morse wrote: >> On 06/03/17 20:45, Tyler Baicar wrote: >>> Currently external aborts are unsupported by the guest abort >>> handling. Add handling for SEAs so that the host kernel reports >>>

Re: [PATCH v3 02/25] arm64: KVM: Implement HVC_RESET_VECTORS stub hypercall

CTORS hypercall to the KVM init > code, which so far lacked any form of hypercall support. (Nit: other patches to the init code in this series have 'init' in the subject, this one doesn't.) Reviewed-by: James Morse <james.mo...@arm.com> Thanks, James __

Re: [PATCH v3 03/25] arm64: KVM: Implement HVC_GET_VECTORS in the init code

On 06/03/17 14:24, Marc Zyngier wrote: > Now that we have an infrastructure to handle hypercalls in the KVM > init code, let's implement HVC_GET_VECTORS there. Reviewed-by: James Morse <james.mo...@arm.com> Thanks, James ___ kvmarm

Re: [PATCH v3 04/25] arm64: KVM: Allow the main HYP code to use the init hyp stub implementation

he idmap page when called with a hyp-stub hypercall. Since your merged page tables change this isn't as scary as it looks, as the idmap is always present. Reviewed-by: James Morse <james.mo...@arm.com> Thanks, James ___ kvmarm mailing list kvma

Re: [PATCH v3 01/25] arm64: hyp-stub: Implement HVC_RESET_VECTORS stub hypercall

On 06/03/17 14:24, Marc Zyngier wrote: > Let's define a new stub hypercall that resets the HYP configuration > to its default: hyp-stub vectors, and MMU disabled. > > Of course, for the hyp-stub itself, this is a trivial no-op. > Hypervisors will have a bit more work to do. Rev

Re: [PATCH v3 05/25] arm64: KVM: Convert __cpu_reset_hyp_mode to using __hyp_reset_vectors

On 06/03/17 14:24, Marc Zyngier wrote: > We are now able to use the hyp stub to reset HYP mode. Time to > kiss __kvm_hyp_reset goodbye, and use __hyp_reset_vectors. Reviewed-by: James Morse <james.mo...@arm.com> Thanks, James ___ kvmarm

Re: [PATCH V12 00/10] Add UEFI 2.6 and ACPI 6.1 updates for RAS on ARM64

Hi Tyler, On 06/03/17 20:44, Tyler Baicar wrote: > When a memory error, CPU error, PCIe error, or other type of hardware error > that's covered by RAS occurs, firmware should populate the shared GHES memory > location with the proper GHES structures to notify the OS of the error. > For example,

Re: [PATCH V12 10/10] arm/arm64: KVM: add guest SEA support

Hi Tyler, On 06/03/17 20:45, Tyler Baicar wrote: > Currently external aborts are unsupported by the guest abort > handling. Add handling for SEAs so that the host kernel reports > SEAs which occur in the guest kernel. > diff --git a/arch/arm/include/asm/kvm_arm.h b/arch/arm/include/asm/kvm_arm.h

Re: [PATCH V12 05/10] acpi: apei: handle SEA notification type for ARMv8

atform analyzes > + and handles hardware error notifications from SEA, and it may then > + form a HW error record for the OS to parse and handle. This > + option allows the OS to look for such hardware error record, and > +

Re: [PATCH V11 10/10] arm/arm64: KVM: add guest SEA support

Hi Tyler, On 28/02/17 19:43, Baicar, Tyler wrote: > On 2/24/2017 3:42 AM, James Morse wrote: >> On 21/02/17 21:22, Tyler Baicar wrote: >>> Currently external aborts are unsupported by the guest abort >>> handling. Add handling for SEAs so that the host kernel r

Re: [PATCH v3 2/8] acpi: apei: handle SEI notification type for ARMv8

Hi Xie XiuQi, On 30/03/17 11:31, Xie XiuQi wrote: > ARM APEI extension proposal added SEI (asynchronous SError interrupt) > notification type for ARMv8. > > Add a new GHES error source handling function for SEI. In firmware > first mode, if an error source's notification type is SEI. Then GHES >

Re: [PATCH v3 4/8] APEI: GHES: reserve a virtual page for SEI context

Hi Xie XiuQi, On 30/03/17 11:31, Xie XiuQi wrote: > On arm64 platform, SEI may interrupt code which had interrupts masked. > But SEI could be masked, so it's not treated as NMI, however SEA is > treated as NMI. > > So, the memory area used to transfer hardware error information from > BIOS to

Re: [PATCH v3 8/8] arm64: exception: check shared writable page in SEI handler

Hi Xie XiuQi, On 30/03/17 11:31, Xie XiuQi wrote: > From: Wang Xiongfeng > > Since SEI is asynchronous, the error data has been consumed. So we must > suppose that all the memory data current process can write are > contaminated. If the process doesn't have shared

Re: [PATCH v3 7/8] arm64: exception: handle asynchronous SError interrupt

Hi Wang Xiongfeng, On 18/04/17 02:09, Xiongfeng Wang wrote: > I have some confusion about the RAS feature when VHE is enabled. Does RAS > spec support > the situation when VHE is enabled. When VHE is disabled, the hyperviosr > delegates the error > exception to EL1 by setting HCR_EL2.VSE to 1,

Re: [PATCH v3 7/8] arm64: exception: handle asynchronous SError interrupt

Hi Wang Xiongfeng, On 21/04/17 12:33, Xiongfeng Wang wrote: > On 2017/4/20 16:52, James Morse wrote: >> On 19/04/17 03:37, Xiongfeng Wang wrote: >>> On 2017/4/18 18:51, James Morse wrote: >>>> The host expects to receive physical SError Interrupts. The ARM-A

[PATCH v2 08/16] arm64: entry.S: move SError handling into a C function for future expansion

rocess the first panic(). Signed-off-by: Xie XiuQi <xiexi...@huawei.com> Signed-off-by: Wang Xiongfeng <wangxiongfen...@huawei.com> [Split out of a bigger patch, added compat path, renamed, enabled debug exceptions] Signed-off-by: James Morse <james.mo...@arm.com> --- arch/a

[PATCH v2 10/16] arm64: kernel: Survive corrected RAS errors notified by SError

errors. Signed-off-by: James Morse <james.mo...@arm.com> --- arch/arm64/include/asm/esr.h | 10 ++ arch/arm64/kernel/traps.c| 35 --- 2 files changed, 42 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/inclu

[PATCH v2 04/16] arm64: entry.S: mask all exceptions during kernel_exit

to mask interrupts before kernel_exit. Signed-off-by: James Morse <james.mo...@arm.com> --- arch/arm64/kernel/entry.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index b738880350f9..491182f0abb5 100644 --- a/arch

[PATCH v2 09/16] arm64: cpufeature: Detect CPU RAS Extentions

b and config option, reworded commit message] Signed-off-by: James Morse <james.mo...@arm.com> --- arch/arm64/Kconfig | 16 arch/arm64/include/asm/barrier.h | 1 + arch/arm64/include/asm/cpucaps.h | 3 ++- arch/arm64/include/asm/sysreg.h | 2 ++ arch/arm64/k

[PATCH v2 03/16] arm64: unmask all exceptions from C code on CPU startup

users. This patch removes the isb that synchronized the MDSCR_el1 write in __cpu_setup() with the PSTATE.D write. Now the PSTATE.D write happens after __enable_mmu(). Signed-off-by: James Morse <james.mo...@arm.com> --- arch/arm64/include/asm/irqflags.h | 6 -- arch/arm64/kernel/s

[PATCH v2 02/16] arm64: introduce an order for exceptions

exceptions, and unmask it at all other times. Change our local_dbg_{save,restore}() helpers to mask Interrupts too. Signed-off-by: James Morse <james.mo...@arm.com> --- arch/arm64/include/asm/irqflags.h | 18 -- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/arch

[PATCH v2 00/16] SError rework + v8.2 RAS and IESB cpufeature support

ries can be retrieved from: git://linux-arm.org/linux-jm.git -b serror_rework/v2 Thanks, James [0] https://static.docs.arm.com/ddi0587/a/RAS%20Extension-release%20candidate_march_29.pdf James Morse (14): arm64: explicitly mask all exceptions arm64: introduce an order for exceptions a

[PATCH v2 11/16] arm64: kernel: Handle deferred SError on kernel entry

to be fatal. Clear DISR_EL1 from the RAS cpufeature enable call. This means any value we find in DISR_EL1 was triggered and deferred by our actions. We have executed ESB prior to this point, but these occur with SError unmasked so will not have been deferred. Signed-off-by: James Morse <james.mo...@arm.

[PATCH v2 05/16] arm64: entry.S: move enable_step_tsk into kernel_exit

kernel_exit 0. Move the macro call into kernel_exit after local_mask_daif. enable_step_tsk is now only called with debug exceptions masked. This was the last user of disable_dbg, remove it. Signed-off-by: James Morse <james.mo...@arm.com> --- arch/arm64/include/asm/assembler.h | 9 + arch

[PATCH v2 06/16] arm64: entry.S: convert elX_sync

after unmasking IRQs. Move this into the switch statement. el0_dbg needs to do this itself once it has finished its work and el0_svc needs to pass a flag to restore the syscall args. This patch removed the last user of enable_dbg_and_irq, remove it. Signed-off-by: James Morse <james.mo...@arm.

[PATCH v2 13/16] arm64: cpufeature: Enable Implicit ESB on entry/return-from EL1

require additional firmware support. Signed-off-by: James Morse <james.mo...@arm.com> --- arch/arm64/Kconfig | 15 +++ arch/arm64/include/asm/cpucaps.h | 3 ++- arch/arm64/include/asm/processor.h | 1 + arch/arm64/include/asm/sysreg.h| 1 + arch/arm64/

[PATCH v2 07/16] arm64: entry.S: convert elX_irq

Following our 'adi' order, Interrupts should be processed with Debug and SError exceptions unmasked. Add a helper to unmask these two, (and fiq for good measure). Signed-off-by: James Morse <james.mo...@arm.com> --- arch/arm64/include/asm/assembler.h | 10 +- arch/arm64/kernel/e

[PATCH v2 16/16] KVM: arm64: Handle deferred SErrors consumed on guest exit

. This lets us skip the SError VAXorcism on all systems with the RAS extensions. Signed-off-by: James Morse <james.mo...@arm.com> --- arch/arm64/include/asm/kvm_emulate.h | 5 +++ arch/arm64/include/asm/kvm_host.h| 1 + arch/arm64/kernel/asm-offsets.c | 1 + arch/arm

[PATCH v2 12/16] arm64: entry.S: Make eret restartable

feature we may take a pending SError earlier. Signed-off-by: James Morse <james.mo...@arm.com> --- Known issue: If _do_serror() takes a synchronous exception the per-cpu SPSR and ELR will be overwritten. A WARN_ON() firing is the most likely way of doing this. Fixing it requires the asm

[PATCH v2 15/16] KVM: arm64: Save ESR_EL2 on guest SError

and decode its severity. Signed-off-by: James Morse <james.mo...@arm.com> --- arch/arm64/kvm/hyp/switch.c | 15 --- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c index 945e79c641c4..c6f17c7675ad 100644 --- a/arch

[PATCH v2 14/16] KVM: arm64: Take pending SErrors on entry to the guest

a panic instead. Signed-off-by: James Morse <james.mo...@arm.com> --- arch/arm64/include/asm/assembler.h | 1 + arch/arm64/kvm/hyp.S | 1 + arch/arm64/kvm/hyp/entry.S | 18 ++ 3 files changed, 20 insertions(+) diff --git a/arch/arm64/include/asm/assemble

Re: [PATCH v2 11/16] arm64: kernel: Handle deferred SError on kernel entry

Hello! On 28/07/17 15:10, James Morse wrote: > Before we can enable Implicit ESB on exception level change, we need to > handle deferred SErrors that may appear on exception entry. Christoffer has pointed out on patch 16 that I've miss-understood IESB's behaviour: > The implicit form

Re: [PATCH v2 16/16] KVM: arm64: Handle deferred SErrors consumed on guest exit

Hi Christoffer, On 01/08/17 14:18, Christoffer Dall wrote: > On Fri, Jul 28, 2017 at 03:10:19PM +0100, James Morse wrote: >> On systems with VHE, the RAS extensions and IESB support, KVM gets an >> implicit ESB whenever it enters/exits a guest, because the host sets &g

Re: [PATCH v2 06/16] arm64: entry.S: convert elX_sync

Hi Catalin, On 09/08/17 18:25, Catalin Marinas wrote: > On Fri, Jul 28, 2017 at 03:10:09PM +0100, James Morse wrote: >> @@ -520,9 +514,16 @@ el1_preempt: >> el0_sync: >> kernel_entry 0 >> mrs x25, esr_el1// read the syndrome register &

Re: [PATCH v2 06/16] arm64: entry.S: convert elX_sync

Hi Catalin, On 10/08/17 17:57, James Morse wrote: > On 09/08/17 18:25, Catalin Marinas wrote: >> On Fri, Jul 28, 2017 at 03:10:09PM +0100, James Morse wrote: >>> @@ -520,9 +514,16 @@ el1_preempt: >>> el0_sync: >>> kernel_entry 0 >>> mr

[PATCH] KVM: arm64: stop propagating DAIF flags between kernel and VHE's world switch

-vhe systems, add the DAIF save/restore here, instead of in __sysreg_{save,restore}_host_state() which would require an extra isb() between the hosts VBAR_EL1 being restored and DAIF being restored. Signed-off-by: James Morse <james.mo...@arm.com> --- I don't like the host DAIF context

Re: [PATCH v4 3/3] arm64: kvm: inject SError with user space specified syndrome

Hi gengdongjiu, On 05/07/17 09:14, gengdongjiu wrote: > On 2017/7/4 18:14, James Morse wrote: >> Can you give us a specific example of an error you are trying to handle? > For example: > guest OS user space accesses device type memory, but happen SError. because > the > S

[PATCH] KVM: arm/arm64: Fix guest external abort matching

ted-by: gengdongjiu <gengdj.1...@gmail.com> Signed-off-by: James Morse <james.mo...@arm.com> CC: gengdongjiu <gengdj.1...@gmail.com> CC: Tyler Baicar <tbai...@codeaurora.org> --- Keep the name kvm_vcpu_dabt_isextabt() instead of is_abort_sea() as this is the least noisy opti

Re: [PATCH 11/11] KVM: arm64: Delegate support for SDEI to userspace

Hi Christoffer, (looks like I forgot to send this ...) On 06/06/17 20:58, Christoffer Dall wrote: > On Mon, May 15, 2017 at 06:43:59PM +0100, James Morse wrote: >> The Software Delegated Exception Interface allows firmware to notify >> the OS of system events by returning

Re: [PATCH v4 3/3] arm64: kvm: inject SError with user space specified syndrome

Hi gengdongjiu, Can you give us a specific example of an error you are trying to handle? How would a non-KVM user space process handle the error? KVM-users should be regular user space processes, we should not have a KVM-way and everyone-else-way of handling errors. On 04/07/17 05:46,

[PATCH 2/2] KVM: arm64: Restore host physical timer access on hyp_panic()

hyp_panic() path, this saves the guest registers and disables the traps for the host. Fixes: 53fd5b6487e4 ("arm64: KVM: Add panic handling") Signed-off-by: James Morse <james.mo...@arm.com> --- arch/arm64/kvm/hyp/switch.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/

[PATCH 0/2] KVM: arm/arm64: Restore host physical timer access on panic

] [] (SyS_ioctl) from [] (ret_fast_syscall+0x0/0x34) [ 165.328163] ---[ end Kernel panic - not syncing: [ 165.328163] HYP panic: PABRT PC:ee526000 CPSR:60da Thanks, James Morse (2): KVM: arm: Restore banked registers and physical timer access on hyp_panic() KVM: arm64: Restore host

[PATCH 1/2] KVM: arm: Restore banked registers and physical timer access on hyp_panic()

to HYP. If we're lucky, we panic again. Add a __timer_save_state() call to KVMs hyp_panic() path, this saves the guest registers and disables the traps for the host. Fixes: c36b6db5f3e4 ("ARM: KVM: Add panic handling code") Signed-off-by: James Morse <james.mo...@arm.com> ---

Re: [PATCH 01/11] KVM: arm64: Store vcpu on the stack during __guest_enter()

Hi Christoffer, On 06/06/17 20:59, Christoffer Dall wrote: > On Mon, May 15, 2017 at 06:43:49PM +0100, James Morse wrote: >> KVM uses tpidr_el2 as its private vcpu register, which makes sense for >> non-vhe world switch as only KVM can access this register. This means >>

Re: [PATCH 07/11] firmware: arm_sdei: Add driver for Software Delegated Exceptions

Hi Dave, On 19/07/17 14:52, Dave Martin wrote: > On Mon, May 15, 2017 at 06:43:55PM +0100, James Morse wrote: >> The Software Delegated Exception Interface (SDEI) is an ARM standard >> for registering callbacks from the platform firmware into the OS. >> This is typically

Re: [PATCH] KVM: arm64: add esr_el2 and far_el2 to sysreg

Hi gengdongjiu, On 07/08/17 18:43, gengdongjiu wrote: > Another question, For the SEI, I want to also use SIGBUS both for the KVM > user and non-kvm user, > if SEA and SEI Error all use the SIGBUS to notify user space(Qemu), User-space shouldn't necessarily be notified about Synchronous

[PATCH v2 08/11] arm64: kernel: Add arch-specific SDEI entry code and CPU masking

trust the value in sp_el0 even if we interrupted the kernel, in this case the code in entry.S will save/restore sp_el0 and use the value in __entry_task. Signed-off-by: James Morse <james.mo...@arm.com> --- arch/arm64/Kconfig | 2 +- arch/arm64/include/asm/sdei.h

[PATCH v2 09/11] firmware: arm_sdei: Add support for CPU and system power states

necessary to do this. We only support shared events so all events are left registered and enabled over CPU hotplug. Signed-off-by: James Morse <james.mo...@arm.com> --- drivers/firmware/arm_sdei.c | 228 +++- include/linux/cpuhotplug.h | 1 + include

[PATCH v2 10/11] firmware: arm_sdei: add support for CPU private events

-registered when the CPU is brought back online. This saves bringing secondary cores back online to call private_reset() on shutdown, kexec and resume from hibernate. Signed-off-by: James Morse <james.mo...@arm.com> --- Changes since v1: * Made unregister on cpu-down print an error and co

[PATCH v2 07/11] firmware: arm_sdei: Add driver for Software Delegated Exceptions

will be added by later patches. Signed-off-by: James Morse <james.mo...@arm.com> --- Changes since v1: * Changed entry point to unsigned long, if we support non-vhe systems this won't be a valid pointer * Made invoke_sdei_fn() pass the only register we are interested in, instead of the

[PATCH v2 11/11] KVM: arm64: Allow user-space to claim guest SMC-CC ranges for SDEI

match SDEI SMC-CC calls from a guest. To pass these calls to user-space requires this cap to be enabled using KVM_CAP_ENABLE_CAP_VM. Calls are passed with exit_reason = KVM_EXIT_HYPERCALL, the kvm_run structure has copies of the first 6 registers and the guest pstate. Signed-off-by: James Morse

[PATCH v2 02/11] KVM: arm/arm64: Convert kvm_host_cpu_state to a static per-cpu allocation

kvm_host_cpu_state is a per-cpu allocation made from kvm_arch_init() used to store the host EL1 registers when KVM switches to a guest. Make it easier for ASM to generate pointers into this per-cpu memory by making it a static allocation. Signed-off-by: James Morse <james.mo...@arm.com>

[PATCH v2 03/11] KVM: arm64: Change hyp_panic()s dependency on tpidr_el2

this unnecessary for VHE hosts) We print out the vcpu pointer as part of the panic message. Add a back reference to the 'running vcpu' in the host cpu context to preserve this. Signed-off-by: James Morse <james.mo...@arm.com> --- Changes since v1: * Added a comment explaini

[PATCH v2 05/11] KVM: arm64: Stop save/restoring host tpidr_el1 on VHE

. Signed-off-by: James Morse <james.mo...@arm.com> Reviewed-by: Christoffer Dall <cd...@linaro.org> --- Changes since v1: * Switched KVM<->arm64 in the subject. arch/arm64/kvm/hyp-init.S | 4 arch/arm64/kvm/hyp/s2-setup.c | 3 --- arch/arm64/kvm/hy

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