Re: [virtio-dev] Re: [PATCH v5 5/7] iommu: Add virtio-iommu driver

2018-12-13 Thread Robin Murphy
On 2018-12-12 3:27 pm, Auger Eric wrote: Hi, On 12/12/18 3:56 PM, Michael S. Tsirkin wrote: On Fri, Dec 07, 2018 at 06:52:31PM +, Jean-Philippe Brucker wrote: Sorry for the delay, I wanted to do a little more performance analysis before continuing. On 27/11/2018 18:10, Michael S. Tsirkin

Re: [RFC v2 12/20] dma-iommu: Implement NESTED_MSI cookie

2018-10-24 Thread Robin Murphy
On 2018-10-24 7:44 pm, Auger Eric wrote: Hi Robin, On 10/24/18 8:02 PM, Robin Murphy wrote: Hi Eric, On 2018-09-18 3:24 pm, Eric Auger wrote: Up to now, when the type was UNMANAGED, we used to allocate IOVA pages within a range provided by the user. This does not work in nested mode

Re: [RFC v2 12/20] dma-iommu: Implement NESTED_MSI cookie

2018-10-24 Thread Robin Murphy
Hi Eric, On 2018-09-18 3:24 pm, Eric Auger wrote: Up to now, when the type was UNMANAGED, we used to allocate IOVA pages within a range provided by the user. This does not work in nested mode. If both the host and the guest are exposed with SMMUs, each would allocate an IOVA. The guest

Re: [PATCH v3 3/7] PCI: OF: Allow endpoints to bypass the iommu

2018-10-18 Thread Robin Murphy
On 17/10/18 16:14, Michael S. Tsirkin wrote: On Mon, Oct 15, 2018 at 08:46:41PM +0100, Jean-philippe Brucker wrote: [Replying with my personal address because we're having SMTP issues] On 15/10/2018 11:52, Michael S. Tsirkin wrote: On Fri, Oct 12, 2018 at 02:41:59PM -0500, Bjorn Helgaas

Re: [PATCH] kvm: arm64: fix caching of host MDCR_EL2 value

2018-10-17 Thread Robin Murphy
in events not being counted. In these cases, only the fixed-purpose cycle counter appears to work as expected. Fix this by always stashing the host MDCR_EL2 value, regardless of VHE. FWIW, Tested-by: Robin Murphy Fixes: 1e947bad0b63b351 ("arm64: KVM: Skip HYP setup when already running in

Re: [PATCH v3 3/7] PCI: OF: Allow endpoints to bypass the iommu

2018-10-15 Thread Robin Murphy
On 12/10/18 20:41, Bjorn Helgaas wrote: s/iommu/IOMMU/ in subject On Fri, Oct 12, 2018 at 03:59:13PM +0100, Jean-Philippe Brucker wrote: Using the iommu-map binding, endpoints in a given PCI domain can be managed by different IOMMUs. Some virtual machines may allow a subset of endpoints to

Re: [PATCH v2 1/5] dt-bindings: virtio: Specify #iommu-cells value for a virtio-iommu

2018-07-04 Thread Robin Murphy
On 27/06/18 18:46, Rob Herring wrote: On Tue, Jun 26, 2018 at 11:59 AM Jean-Philippe Brucker wrote: On 25/06/18 20:27, Rob Herring wrote: On Thu, Jun 21, 2018 at 08:06:51PM +0100, Jean-Philippe Brucker wrote: A virtio-mmio node may represent a virtio-iommu device. This is discovered by the

Re: [PATCH 02/14] arm64: Call ARCH_WORKAROUND_2 on transitions between EL0 and EL1

2018-05-24 Thread Robin Murphy
On 24/05/18 11:52, Mark Rutland wrote: On Wed, May 23, 2018 at 10:23:20AM +0100, Julien Grall wrote: Hi Marc, On 05/22/2018 04:06 PM, Marc Zyngier wrote: diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index ec2ee720e33e..f33e6aed3037 100644 --- a/arch/arm64/kernel/entry.S

Re: [PATCH 2/4] iommu/virtio: Add probe request

2018-03-23 Thread Robin Murphy
On 14/02/18 14:53, Jean-Philippe Brucker wrote: When the device offers the probe feature, send a probe request for each device managed by the IOMMU. Extract RESV_MEM information. When we encounter a MSI doorbell region, set it up as a IOMMU_RESV_MSI region. This will tell other subsystems that

Re: [PATCH 1/4] iommu: Add virtio-iommu driver

2018-03-23 Thread Robin Murphy
On 14/02/18 14:53, Jean-Philippe Brucker wrote: The virtio IOMMU is a para-virtualized device, allowing to send IOMMU requests such as map/unmap over virtio-mmio transport without emulating page tables. This implementation handles ATTACH, DETACH, MAP and UNMAP requests. The bulk of the code

Re: [PATCH 1/4] iommu: Add virtio-iommu driver

2018-03-21 Thread Robin Murphy
On 21/03/18 13:14, Jean-Philippe Brucker wrote: On 21/03/18 06:43, Tian, Kevin wrote: [...] + +#include + +#define MSI_IOVA_BASE 0x800 +#define MSI_IOVA_LENGTH0x10 this is ARM specific, and according to virtio-iommu spec isn't it better probed

Re: [PATCH] KVM: arm/arm64: replacing per-VM's per-CPU variable

2018-03-13 Thread Robin Murphy
On 13/03/18 13:01, Marc Zyngier wrote: [You're repeatedly posting to the kvmarm mailing list without being subscribed to it. I've flushed the queue now, but please consider subscribing to the list, it will help everyone] On 13/03/18 21:03, Peng Hao wrote: Using a global per-CPU variable

Re: [PATCH v6] arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC

2018-03-06 Thread Robin Murphy
On 01/03/18 04:14, Shanker Donthineni wrote: [...] diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 2985a06..0b64b55 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -199,12 +199,12 @@ static int __init

Re: [PATCH v4] arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC

2018-02-22 Thread Robin Murphy
On 22/02/18 16:33, Mark Rutland wrote: On Thu, Feb 22, 2018 at 04:28:03PM +, Robin Murphy wrote: [Apologies to keep elbowing in, and if I'm being thick here...] On 22/02/18 15:22, Mark Rutland wrote: On Thu, Feb 22, 2018 at 08:51:30AM -0600, Shanker Donthineni wrote: +#define

Re: [PATCH v4] arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC

2018-02-22 Thread Robin Murphy
[Apologies to keep elbowing in, and if I'm being thick here...] On 22/02/18 15:22, Mark Rutland wrote: On Thu, Feb 22, 2018 at 08:51:30AM -0600, Shanker Donthineni wrote: +#define CTR_B31_SHIFT 31 Since this is just a RES1 bit, I think we don't need a mnemonic for it, but I'll defer

Re: [PATCH v3] arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC

2018-02-21 Thread Robin Murphy
On 21/02/18 16:14, Shanker Donthineni wrote: [...] @@ -1100,6 +1114,20 @@ static int cpu_copy_el2regs(void *__unused) .enable = cpu_clear_disr, }, #endif /* CONFIG_ARM64_RAS_EXTN */ +#ifdef CONFIG_ARM64_SKIP_CACHE_POU + { + .desc = "DCache clean to

Re: [PATCH 4/4] vfio: Allow type-1 IOMMU instantiation with a virtio-iommu

2018-02-14 Thread Robin Murphy
On 14/02/18 15:26, Alex Williamson wrote: On Wed, 14 Feb 2018 14:53:40 + Jean-Philippe Brucker wrote: When enabling both VFIO and VIRTIO_IOMMU modules, automatically select VFIO_IOMMU_TYPE1 as well. Signed-off-by: Jean-Philippe Brucker

Re: [PATCH v1 02/16] irqchip: gicv3-its: Add helpers for handling 52bit address

2018-02-08 Thread Robin Murphy
On 08/02/18 11:20, Suzuki K Poulose wrote: On 07/02/18 15:10, Christoffer Dall wrote: Hi Suzuki, On Tue, Jan 09, 2018 at 07:03:57PM +, Suzuki K Poulose wrote: Add helpers for encoding/decoding 52bit address in GICv3 ITS BASER register. When ITS uses 64K page size, the 52bits of physical

Re: [PATCH 1/2] ARM: kvm: fix building with gcc-8

2018-02-02 Thread Robin Murphy
On 02/02/18 16:29, Arnd Bergmann wrote: On Fri, Feb 2, 2018 at 5:23 PM, Robin Murphy <robin.mur...@arm.com> wrote: On 02/02/18 15:55, Robin Murphy wrote: On 02/02/18 15:07, Arnd Bergmann wrote: In banked-sr.c, we use a top-level '__asm__(".arch_extension virt")' st

Re: [PATCH 1/2] ARM: kvm: fix building with gcc-8

2018-02-02 Thread Robin Murphy
On 02/02/18 15:55, Robin Murphy wrote: On 02/02/18 15:07, Arnd Bergmann wrote: In banked-sr.c, we use a top-level '__asm__(".arch_extension virt")' statement to allow compilation of a multi-CPU kernel for ARMv6 and older ARMv7-A that don't normally support access to the banked

Re: [PATCH 1/2] ARM: kvm: fix building with gcc-8

2018-02-02 Thread Robin Murphy
On 02/02/18 15:07, Arnd Bergmann wrote: In banked-sr.c, we use a top-level '__asm__(".arch_extension virt")' statement to allow compilation of a multi-CPU kernel for ARMv6 and older ARMv7-A that don't normally support access to the banked registers. This is considered to be a programming error

Re: [PATCH v3 16/18] arm/arm64: smccc: Implement SMCCC v1.1 inline primitive

2018-02-01 Thread Robin Murphy
On 01/02/18 13:54, Marc Zyngier wrote: On 01/02/18 13:34, Robin Murphy wrote: On 01/02/18 11:46, Marc Zyngier wrote: One of the major improvement of SMCCC v1.1 is that it only clobbers the first 4 registers, both on 32 and 64bit. This means that it becomes very easy to provide an inline

Re: [PATCH v3 16/18] arm/arm64: smccc: Implement SMCCC v1.1 inline primitive

2018-02-01 Thread Robin Murphy
"volatile" is what + * makes it stick. + */ +#define __arm_smccc_1_1(inst, ...) \ + do {\ + __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \ + asm volatile(i

Re: [PATCH v3 15/18] arm/arm64: smccc: Make function identifiers an unsigned quantity

2018-02-01 Thread Robin Murphy
ibly wrong. Reviewed-by: Robin Murphy <robin.mur...@arm.com> Cc: sta...@vger.kernel.org Reported-by: Ard Biesheuvel <ard.biesheu...@linaro.org> Acked-by: Ard Biesheuvel <ard.biesheu...@linaro.org> Tested-by: Ard Biesheuvel <ard.biesheu...@linaro.org> Signed-off-by:

Re: [PATCH v3 14/18] firmware/psci: Expose SMCCC version through psci_ops

2018-02-01 Thread Robin Murphy
e, this assignment now does precisely nothing. With the condition flipped and the redundant else case removed (or an explanation of why I'm wrong...) Reviewed-by: Robin Murphy <robin.mur...@arm.com> + else + psci_ops.smccc_version = SMCCC_VERSION_1_1;

Re: [PATCH v3 13/18] firmware/psci: Expose PSCI conduit

2018-02-01 Thread Robin Murphy
On 01/02/18 11:46, Marc Zyngier wrote: In order to call into the firmware to apply workarounds, it is useful to find out whether we're using HVC or SMC. Let's expose this through the psci_ops. Reviewed-by: Robin Murphy <robin.mur...@arm.com> Acked-by: Lorenzo Pieralisi <loren

Re: [PATCH v2 04/16] arm/arm64: KVM: Add PSCI_VERSION helper

2018-01-30 Thread Robin Murphy
On 29/01/18 17:45, Marc Zyngier wrote: As we're about to trigger a PSCI version explosion, it doesn't hurt to introduce a PSCI_VERSION helper that is going to be used everywhere. Signed-off-by: Marc Zyngier --- include/kvm/arm_psci.h | 5 +++-- virt/kvm/arm/psci.c|

Re: [PATCH v2 13/16] firmware/psci: Expose SMCCC version through psci_ops

2018-01-30 Thread Robin Murphy
On 29/01/18 17:45, Marc Zyngier wrote: Since PSCI 1.0 allows the SMCCC version to be (indirectly) probed, let's do that at boot time, and expose the version of the calling convention as part of the psci_ops structure. Signed-off-by: Marc Zyngier ---

Re: [PATCH v2 10/16] arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support

2018-01-30 Thread Robin Murphy
On 29/01/18 17:45, Marc Zyngier wrote: A new feature of SMCCC 1.1 is that it offers firmware-based CPU workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides BP hardening for CVE-2017-5715. If the host has some mitigation for this issue, report that we deal with it using

Re: [PATCH v2 15/16] arm/arm64: smccc: Implement SMCCC v1.1 inline primitive

2018-01-29 Thread Robin Murphy
On 29/01/18 17:45, Marc Zyngier wrote: One of the major improvement of SMCCC v1.1 is that it only clobbers the first 4 registers, both on 32 and 64bit. This means that it becomes very easy to provide an inline version of the SMC call primitive, and avoid performing a function call to stash the

Re: [PATCH 14/14] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support

2018-01-26 Thread Robin Murphy
On 26/01/18 14:28, Marc Zyngier wrote: Add the detection and runtime code for ARM_SMCCC_ARCH_WORKAROUND_1. It is lovely. Really. Signed-off-by: Marc Zyngier --- arch/arm64/kernel/bpi.S| 20 arch/arm64/kernel/cpu_errata.c | 71

Re: [PATCH 3/3] arm64: Add software workaround for Falkor erratum 1041

2017-11-03 Thread Robin Murphy
On 03/11/17 03:27, Shanker Donthineni wrote: > The ARM architecture defines the memory locations that are permitted > to be accessed as the result of a speculative instruction fetch from > an exception level for which all stages of translation are disabled. > Specifically, the core is permitted to

Re: [PATCH v1 1/3] arm64: add a macro for SError synchronization

2017-11-01 Thread Robin Murphy
On 01/11/17 12:54, gengdongjiu wrote: > Hi Robin, > > On 2017/11/1 19:24, Robin Murphy wrote: >>> + esb >>> +alternative_else_nop_endif >>> +1: >>> + .endm >> Having a branch in here is pretty horrible, and furthermore using label >>

Re: [PATCH v1 1/3] arm64: add a macro for SError synchronization

2017-11-01 Thread Robin Murphy
On 01/11/17 19:14, Dongjiu Geng wrote: > ARMv8.2 adds a control bit to each SCTLR_ELx to insert implicit > Error Synchronization Barrier(IESB) operations at exception handler entry > and exit. But not all hardware platform which support RAS Extension > can support IESB. So for this case, software

Re: [PATCH v1 0/3] manually add Error Synchronization Barrier at exception handler entry and exit

2017-11-01 Thread Robin Murphy
On 01/11/17 19:14, Dongjiu Geng wrote: > Some hardware platform can support RAS Extension, but not support IESB, > such as Huawei's platform, so software need to insert Synchronization Barrier > operations at exception handler entry. > > This series patches are based on James's series patches

Re: [report] boot a vm that with PCI only hierarchy devices and with GICv3 , it's failed.

2017-07-18 Thread Robin Murphy
On 18/07/17 12:07, wanghaibin wrote: > On 2017/7/18 18:02, Robin Murphy wrote: > >> On 18/07/17 10:15, Marc Zyngier wrote: >>> On 18/07/17 05:07, wanghaibin wrote: >>>> Hi, all: >>>> >>>> I met a problem, I just try to test PCI only hierar

Re: [report] boot a vm that with PCI only hierarchy devices and with GICv3 , it's failed.

2017-07-18 Thread Robin Murphy
On 18/07/17 10:15, Marc Zyngier wrote: > On 18/07/17 05:07, wanghaibin wrote: >> Hi, all: >> >> I met a problem, I just try to test PCI only hierarchy devices model >> (qemu/docs/pcie.txt sections 2.3) >> >> Here is part of qemu cmd: >> -device i82801b11-bridge,id=pci.1,bus=pcie.0,addr=0x1

Re: [PATCH 3/3] kvm: arm/arm64: Fix locking for kvm_free_stage2_pgd

2017-03-15 Thread Robin Murphy
Hi Marc, On 15/03/17 13:43, Marc Zyngier wrote: > On 15/03/17 13:35, Christoffer Dall wrote: >> On Wed, Mar 15, 2017 at 01:28:07PM +, Marc Zyngier wrote: >>> On 15/03/17 10:56, Christoffer Dall wrote: On Wed, Mar 15, 2017 at 09:39:26AM +, Marc Zyngier wrote: > On 15/03/17 09:21,

Re: [PATCH 1/1] arm64: Correcting format specifier for printing 64 bit addresses

2016-12-06 Thread Robin Murphy
On 05/12/16 08:09, Maninder Singh wrote: > This patch corrects format specifier for printing 64 bit addresses. > > Signed-off-by: Maninder Singh > Signed-off-by: Vaneet Narang > --- > arch/arm64/kernel/signal.c | 2 +- > arch/arm64/kvm/sys_regs.c

Re: [PATCH 1/1] arm64: Correcting format specifier for printing 64 bit addresses

2016-12-06 Thread Robin Murphy
On 06/12/16 16:11, Christoffer Dall wrote: > On Mon, Dec 05, 2016 at 01:39:53PM +0530, Maninder Singh wrote: >> This patch corrects format specifier for printing 64 bit addresses. >> >> Signed-off-by: Maninder Singh >> Signed-off-by: Vaneet Narang

[PATCH v2] kvm: arm: Enforce some NS-SVC initialisation

2016-08-16 Thread Robin Murphy
getting away with it thanks to implementation details of ARMv7 cores and/or bootloader behaviour, but for the sake of forwards compatibility let's try to ensure that we have a minimally sane state before dropping down into it. Signed-off-by: Robin Murphy <robin.mur...@arm.com> --- v2: Init

Re: [PATCH] kvm: arm: Enforce some NS-SVC initialisation

2016-08-16 Thread Robin Murphy
Hi Marc, On 16/08/16 14:33, Marc Zyngier wrote: > On 21/07/16 13:01, Robin Murphy wrote: >> Since the non-secure copies of banked registers lack architecturally >> defined reset values, there is no actual guarantee when entering in Hyp >> from secure-only firmware that the

Re: [PATCH] arm64: KVM: Turn kvm_ksym_ref into a NOP on VHE

2016-03-19 Thread Robin Murphy
Hi Marc, On 18/03/16 17:25, Marc Zyngier wrote: When running with VHE, there is no need to translate kernel pointers to the EL2 memory space, since we're already there (and we have a much saner memory map to start with). Unfortunately, kvm_ksym_ref is getting in the way, and the first call

Re: [RFC v3 05/15] iommu/arm-smmu: implement alloc/free_reserved_iova_domain

2016-02-18 Thread Robin Murphy
Hi Eric, On 12/02/16 08:13, Eric Auger wrote: Implement alloc/free_reserved_iova_domain for arm-smmu. we use the iova allocator (iova.c). The iova_domain is attached to the arm_smmu_domain struct. A mutex is introduced to protect it. The IOMMU API currently leaves IOVA management entirely up

Re: [PATCH 1/2] arm64: KVM: Fix AArch32 to AArch64 register mapping

2015-11-17 Thread Robin Murphy
u_reg, particularly in the shared 32-bit code, this does seem to be the only one which involves a potentially-banked register number that didn't originally come from an ESR read, and thus needs translation. Reviewed-by: Robin Murphy <robin.mur...@arm.com> (unfortunately I don't