Re: [Qemu-devel] [kvm-unit-tests PATCH 3/4] arm/arm64: GICv2: add GICD_ITARGETSR testing

2016-11-23 Thread Andre Przywara
Hi Eric, thanks for having such a close look (as always!). On 23/11/16 13:51, Auger Eric wrote: > Hi Andre, > > On 23/11/2016 14:24, Auger Eric wrote: >> Hi, >> >> On 18/11/2016 15:20, Andrew Jones wrote: >>> On Thu, Nov 17, 2016 at 05:57:51PM +, Andre Przywara wrote: Some tests for

Re: [Qemu-devel] [kvm-unit-tests PATCH 3/4] arm/arm64: GICv2: add GICD_ITARGETSR testing

2016-11-23 Thread Auger Eric
Hi Andre, On 23/11/2016 14:24, Auger Eric wrote: > Hi, > > On 18/11/2016 15:20, Andrew Jones wrote: >> On Thu, Nov 17, 2016 at 05:57:51PM +, Andre Przywara wrote: >>> Some tests for the ITARGETS registers. >>> Bits corresponding to non-existent CPUs must be RAZ/WI. >>> These registers must

Re: [Qemu-devel] [kvm-unit-tests PATCH 3/4] arm/arm64: GICv2: add GICD_ITARGETSR testing

2016-11-23 Thread Auger Eric
Hi, On 18/11/2016 15:20, Andrew Jones wrote: > On Thu, Nov 17, 2016 at 05:57:51PM +, Andre Przywara wrote: >> Some tests for the ITARGETS registers. >> Bits corresponding to non-existent CPUs must be RAZ/WI. >> These registers must be byte-accessible, also check that accesses beyond >> the