Re: [PATCH v3 2/2] KVM: arm/arm64: Route vtimer events to user space

On 16 September 2016 at 07:26, Alexander Graf wrote: > We have 2 modes for dealing with interrupts in the ARM world. We can either > handle them all using hardware acceleration through the vgic or we can emulate > a gic in user space and only drive CPU IRQ pins from there. > >

[PATCH v3 1/2] KVM: arm/arm64: Add vcpu ENABLE_CAP functionality

In a follow-up patch we will need to enable capabilities on demand for backwards compatibility. This patch adds the generic framework to handle vcpu cap enablement to the arm code base. Signed-off-by: Alexander Graf --- Documentation/virtual/kvm/api.txt | 4 +++-

[PATCH v3 2/2] KVM: arm/arm64: Route vtimer events to user space

We have 2 modes for dealing with interrupts in the ARM world. We can either handle them all using hardware acceleration through the vgic or we can emulate a gic in user space and only drive CPU IRQ pins from there. Unfortunately, when driving IRQs from user space, we never tell user space about

Re: [PATCH] KVM: arm/arm64: Route vtimer events to user space

Hi Alexander, [auto build test ERROR on kvm/linux-next] [also build test ERROR on v4.8-rc6 next-20160916] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] [Suggest to use git(>=2.9.0) format-patch --base= (or --base=auto for convenie

Re: [PATCH v3 0/2] KVM: ARM: Enable vtimers with user space gic

Hi Alex, On 16/09/16 07:26, Alexander Graf wrote: > Some systems out there (well, one type in particular - the Raspberry Pi > series) > do have virtualization capabilities in the core, but no ARM GIC interrupt > controller. > > To run on these systems, the cleanest route is to just handle all >

Re: [PATCH v3 0/2] KVM: ARM: Enable vtimers with user space gic

On Fri, Sep 16, 2016 at 02:25:01PM +0200, Alexander Graf wrote: > > > On 16 Sep 2016, at 12:20, Marc Zyngier wrote: > > > > Hi Alex, > > > > On 16/09/16 07:26, Alexander Graf wrote: > >> Some systems out there (well, one type in particular - the Raspberry Pi > >> series)

Re: [PATCH v3 0/2] KVM: ARM: Enable vtimers with user space gic

Hi, > That being said, I'm not categorically against these patches, but I > share Marc's view that we've already seen that non-vgic support had been > broken for multiple versions without anyone complaining, Oh, did this ever work? Work as in "can actually run a virtual machine", not as in

Re: [PATCH v5 4/6] arm/arm64: vgic-new: Introduce VENG0 and VENG1 fields to vmcr struct

On 16/09/16 13:20, vijay.kil...@gmail.com wrote: > From: Vijaya Kumar K > > ICC_VMCR_EL2 supports virtual access to ICC_IGRPEN1_EL1.Enable > and ICC_IGRPEN0_EL1.Enable fields. Add grpen0 and grpen1 member > variables to struct vmcr to support read and write of these

Re: [PATCH v3 0/2] KVM: ARM: Enable vtimers with user space gic

On 16/09/2016 12:20, Marc Zyngier wrote: > > This patch set allows user space to receive vtimer events as well as mask > > them, so that we can handle all vtimer related interrupt injection from user > > space, enabling us to use architected timer with user space gic emulation. > > I have

Re: [PATCH v3 0/2] KVM: ARM: Enable vtimers with user space gic

On 16/09/2016 14:30, Christoffer Dall wrote: > > > > This patch set allows user space to receive vtimer events as well as > > > > mask > > > > them, so that we can handle all vtimer related interrupt injection from > > > > user > > > > space, enabling us to use architected timer with user

[PATCH 5/6] arm/arm64: vgic-new: Implement VGICv3 CPU interface access

From: Vijaya Kumar K VGICv3 CPU interface registers are accessed using KVM_DEV_ARM_VGIC_CPU_SYSREGS ioctl. These registers are accessed as 64-bit. The cpu MPIDR value is passed along with register id. is used to identify the cpu for registers access. The version of VGIC

[PATCH v5 1/6] arm/arm64: vgic-new: Implement support for userspace access

From: Vijaya Kumar K Read and write of some registers like ISPENDR and ICPENDR from userspace requires special handling when compared to guest access for these registers. Refer to Documentation/virtual/kvm/devices/arm-vgic-v3.txt for handling of ISPENDR, ICPENDR

[PATCH v5 4/6] arm/arm64: vgic-new: Introduce VENG0 and VENG1 fields to vmcr struct

From: Vijaya Kumar K ICC_VMCR_EL2 supports virtual access to ICC_IGRPEN1_EL1.Enable and ICC_IGRPEN0_EL1.Enable fields. Add grpen0 and grpen1 member variables to struct vmcr to support read and write of these fields. ICH_VMCR_CTLR_MASK is changed to mask only

[PATCH v5 3/6] arm/arm64: vgic-new: Introduce find_reg_by_id()

From: Vijaya Kumar K In order to implement vGICv3 CPU interface access, we will need to perform table lookup of system registers. We would need both index_to_params() and find_reg() exported for that purpose, but instead we export a single function which combines them

[PATCH v5 0/6] arm/arm64: vgic-new: Implement API for vGICv3 live migration

From: Vijaya Kumar K This patchset adds API for saving and restoring of VGICv3 registers to support live migration with new vgic feature. This API definition is as per version of VGICv3 specification

Re: [PATCH v3 0/2] KVM: ARM: Enable vtimers with user space gic

> On 16 Sep 2016, at 14:29, Christoffer Dall > wrote: > > On Fri, Sep 16, 2016 at 02:25:01PM +0200, Alexander Graf wrote: >> >>> On 16 Sep 2016, at 12:20, Marc Zyngier wrote: >>> >>> Hi Alex, >>> >>> On 16/09/16 07:26, Alexander Graf

Re: [PATCH v3 0/2] KVM: ARM: Enable vtimers with user space gic

> On 16 Sep 2016, at 12:20, Marc Zyngier wrote: > > Hi Alex, > > On 16/09/16 07:26, Alexander Graf wrote: >> Some systems out there (well, one type in particular - the Raspberry Pi >> series) >> do have virtualization capabilities in the core, but no ARM GIC interrupt >>

Re: [PATCH v2] KVM: arm/arm64: Route vtimer events to user space

> On 16 Sep 2016, at 11:44, Christoffer Dall > wrote: > > Alex, > > On Fri, Sep 16, 2016 at 07:09:13AM +0200, Alexander Graf wrote: >> We have 2 modes for dealing with interrupts in the ARM world. We can either >> handle them all using hardware acceleration

Re: [PATCH v3 0/2] KVM: ARM: Enable vtimers with user space gic

On 16/09/2016 14:29, Christoffer Dall wrote: > > It may be useful for migrating a gicv2 VM to a gicv3 host without gicv2 > > emulation as well. > > I don't see why you'd do this; the VGIC hardware can perfectly well be > used for nesting as well, and this works rather well. Can GICv3 emulate

Re: [PATCH v3 0/2] KVM: ARM: Enable vtimers with user space gic

> Am 16.09.2016 um 15:46 schrieb Andrew Jones : > >> On Fri, Sep 16, 2016 at 03:30:27PM +0200, Christoffer Dall wrote: >>> On Fri, Sep 16, 2016 at 02:31:42PM +0200, Paolo Bonzini wrote: >>> >>> >>> On 16/09/2016 14:30, Christoffer Dall wrote: >>> This patch set allows