Re: [PATCH 0/3] KVM/ARM updates for 4.10-rc4

2017-01-13 11:31+, Marc Zyngier: > Radim, Paolo, > > Here's the KVM/ARM updates for 4.10-rc4. Two timer fixes, and one vgic > fix for a deadlock that's been reported this week (which should land > into stable). Pulled to kvm/master, thanks. ___

Re: [RFC 0/8] Provide the EL1 physical timer to the VM

On 26/12/16 17:11, Jintack Lim wrote: > The ARM architecture defines the EL1 physical timer and the virtual > timer, and it is reasonable for an OS to expect to be able to access > both. However, the current KVM implementation does not provide the EL1 > physical timer to VMs but terminates VMs on

Re: [RFC 0/8] Provide the EL1 physical timer to the VM

On Tue, Jan 17, 2017 at 12:09 PM, Marc Zyngier wrote: > On 26/12/16 17:11, Jintack Lim wrote: >> The ARM architecture defines the EL1 physical timer and the virtual >> timer, and it is reasonable for an OS to expect to be able to access >> both. However, the current KVM

Re: [PATCH V7 04/10] arm64: exception: handle Synchronous External Abort

Hi Tyler, On 16/01/17 11:53, Will Deacon wrote: > On Thu, Jan 12, 2017 at 11:15:18AM -0700, Tyler Baicar wrote: >> SEA exceptions are often caused by an uncorrected hardware >> error, and are handled when data abort and instruction abort >> exception classes have specific values for their Fault

Re: [kvm-unit-tests PATCH 6/6] run_tests: allow passing of options to QEMU

Paolo Bonzini writes: > On 12/01/2017 18:32, Andrew Jones wrote: >>> >>> +# Any options left for QEMU? >>> +shift $((OPTIND-1)) >>> +if [ "$#" -gt 0 ]; then >>> +extra_opts="$@" >>> +fi >> We can unconditionally do the extra_opts="$@", extra_opts will just >> be null

Re: [PATCH V7 04/10] arm64: exception: handle Synchronous External Abort

On Mon, Jan 16, 2017 at 01:09:22PM -0700, Baicar, Tyler wrote: > On 1/16/2017 4:53 AM, Will Deacon wrote: > >On Thu, Jan 12, 2017 at 11:15:18AM -0700, Tyler Baicar wrote: > >>SEA exceptions are often caused by an uncorrected hardware > >>error, and are handled when data abort and instruction abort

Re: [PATCH V7 04/10] arm64: exception: handle Synchronous External Abort

Hi Tyler, On 12/01/17 18:15, Tyler Baicar wrote: > SEA exceptions are often caused by an uncorrected hardware > error, and are handled when data abort and instruction abort > exception classes have specific values for their Fault Status > Code. > When SEA occurs, before killing the process, go

[RFC PATCH 12/33] irqchip/gic-v3-its: Rework LPI freeing

Rework LPI deallocation so that it can be reused by the v4 support code. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3-its.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c

[RFC PATCH 04/33] irqchip/gic-v3-its: Move LPI definitions around

The various LPI definitions are in the middle of the code, and would be better placed at the beginning, given that we're going to use some of them much earlier. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3-its.c | 27 +++ 1 file

[RFC PATCH 13/33] irqchip/gic-v3-its: Generalize device table allocation

As we want to use 2-level tables for VCPUs, let's hack the device table allocator in order to make it slightly more generic. It will get reused in subsequent patches. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3-its.c | 26 -- 1 file

[RFC PATCH 18/33] irqchip/gic-v3-its: Add VLPI map/unmap operations

In order to let a VLPI being injected into a guest, the VLPI must be mapped using the VMAPTI command. When moved to a different vcpu, it must be moved with the VMOVI command. These commands are issued via the irq_set_vcpu_affinity method, making sure we unmap the corresponding host LPI first.

[RFC PATCH 22/33] irqchip/gic-v3-its: Add VPE irq domain [de]activation

On activation, a VPE is mapped using the VMAPP command, followed by a VINVALL for a good measure. On deactivation, the VPE is simply unmapped. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3-its.c | 102 +++ 1 file changed,

[RFC PATCH 19/33] irqchip/gic-v3-its: Add VLPI configuration handling

When a VLPI is reconfigured (enabled, disabled, change in priority), the full configuration byte must be written, and the caches invalidated. Also, when using the irq_mask/irq_unmask methods, it is necessary to disable the doorbell for that particular interrupt (by mapping it to 1023) on top of

[RFC PATCH 11/33] irqchip/gic-v3-its: Split out pending table allocation

Just as for the property table, let's move the pending table allocation to a separate function. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3-its.c | 29 - 1 file changed, 20 insertions(+), 9 deletions(-) diff --git

[RFC PATCH 01/33] irqchip/gic-v3: Add redistributor iterator

In order to discover the VLPI properties, we need to iterate over the redistributor regions. As we already have code that does this, let's factor it out and make it slightly more generic. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3.c | 77

[RFC PATCH 23/33] irqchip/gic-v3-its: Add VPENDBASER/VPROPBASER accessors

V{PEND,PROP}BASER being 64bit registers, they need some ad-hoc accessors on 32bit, specially given that VPENDBASER contains a Valid bit, making the access a bit convoluted. Signed-off-by: Marc Zyngier --- arch/arm/include/asm/arch_gicv3.h | 28

[RFC PATCH 21/33] irqchip/gic-v3-its: Add VPE irq domain allocation/teardown

When creating a VM, the low level GICv4 code is responsible for: - allocating each VPE a unique VPEID - allocating a doorbell interrupt for each VPE - allocating the pending tables for each VPE - allocating the property table for the VM This of course has to be reversed when the VM is brought

[RFC PATCH 02/33] irqchip/gic-v3: Add VLPI/DirectLPI discovery

Add helper functions that probe for VLPI and DirectLPI properties. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3.c | 22 ++ include/linux/irqchip/arm-gic-v3.h | 3 +++ 2 files changed, 25 insertions(+) diff --git

[RFC PATCH 17/33] irqchip/gic-v3-its: Add VLPI configuration hook

Add the skeleton irq_set_vcpu_affinity method that will be used to configure VLPIs. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3-its.c | 33 + 1 file changed, 33 insertions(+) diff --git a/drivers/irqchip/irq-gic-v3-its.c

[RFC PATCH 06/33] irqchip/gic-v3-its: Add probing for VLPI properties

Add the probing code for the ITS VLPI support. This includes configuring the ITS number if not supporting the single VMOVP command feature. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3-its.c | 47 ++

[RFC PATCH 03/33] irqchip/gic-v3-its: Refactor command encoding

The way we encode the various ITS command fields is both tedious and error prone. Let's introduce a helper function that performs the encoding, and convert the existing encoders to use that helper. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3-its.c | 34

[RFC PATCH 14/33] irqchip/gic-v3-its: Generalize LPI configuration

We're are going to need to change a bit more than just the enable bit in the LPI property table in the future. So let's change the LPI configuration funtion to take a set of bits to be cleared, and a set of bits to be set. This way, we'll be able to use it when a guest updates an LPI property

[RFC PATCH 05/33] irqchip/gic-v3-its: Zero command on allocation

When reusing commands from the ring buffer, it would be better to zero them out, even if the ITS should ignore the unused fields. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3-its.c | 6 ++ 1 file changed, 6 insertions(+) diff --git

[RFC PATCH 26/33] irqchip/gic-v3-its: Add VPE affinity changes

When we're about to run a vcpu, it is crucial that the redistributor associated with the physical CPU is being told about the new residency. This is abstracted by hijacking the irq_set_affinity method for the doorbell interrupt associated with the VPE. It is expected that the hypervisor will call

[RFC PATCH 29/33] irqchip/gic-v4: Add per-VM VPE domain creation

When creating a VM, it is very convenient to have an irq domain containing all the doorbell interrupts associated with that VM (each interrupt representing a VPE). Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v4.c | 111

[RFC PATCH 28/33] irqchip/gic-v3-its: Support VPE doorbell invalidation even when !DirectLPI

When we don't have the DirectLPI feature, we must work around the architecture shortcomings to be able to perform the required invalidation. For this, we create a fake device whose sole purpose is to provide a way to issue a map/inv/unmap sequence (and the corresponding sync operations). That's 6

[RFC PATCH 33/33] irqchip/gic-v4: Enable low-level GICv4 operations

Get the show on the road... Signed-off-by: Marc Zyngier --- drivers/irqchip/Makefile | 2 +- drivers/irqchip/irq-gic-v3-its.c | 2 +- drivers/irqchip/irq-gic-v4.c | 11 +++ include/linux/irqchip/arm-gic-v4.h | 2 ++ 4 files changed, 15

[RFC PATCH 24/33] irqchip/gic-v3-its: Add VPE scheduling

When a VPE is scheduled to run, the corresponding redistributor must be told so, by setting VPROPBASER to the VM's property table, and VPENDBASER to the vcpu's pending table. When scheduled out, we preserve the IDAI and PendingLast bits. The latter is specially important, as it tells the

[RFC PATCH 31/33] irqchip/gic-v4: Add VLPI configuration interface

Add the required interfaces to map, unmap and update a VLPI. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v4.c | 29 + include/linux/irqchip/arm-gic-v4.h | 3 +++ 2 files changed, 32 insertions(+) diff --git

[RFC PATCH 25/33] irqchip/gic-v3-its: Add VPE invalidation hook

When a guest issues a INVALL command targetting a collection, it must be translated into a VINVALL for the VPE that has this collection. This patch implements a hook that offers this functionallity to the hypervisor. Signed-off-by: Marc Zyngier ---

[RFC PATCH 30/33] irqchip/gic-v4: Add VPE command interface

Add the required interfaces to schedule a VPE and perform a VINVALL command. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v4.c | 31 +++ include/linux/irqchip/arm-gic-v4.h | 2 ++ 2 files changed, 33 insertions(+) diff --git

[RFC PATCH 15/33] irqchip/gic-v4: Add management structure definitions

Add a bunch of GICv4-specific data structures that will get used in subsequent patches. Signed-off-by: Marc Zyngier --- include/linux/irqchip/arm-gic-v4.h | 92 ++ 1 file changed, 92 insertions(+) create mode 100644

[RFC PATCH 09/33] irqchip/gic-v3-its: Split out property table allocation

Move the LPI property table allocation into its own function, as this is going to be required for those associated with VMs in the future. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3-its.c | 28 ++-- 1 file changed, 18 insertions(+),

[RFC PATCH 10/33] irqchip/gic-v4-its: Allow use of indirect VCPU tables

The VCPU tables can be quite sparse as well, and it makes sense to use indirect tables as well if possible. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3-its.c | 20 +--- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git

[RFC PATCH 08/33] irqchip/gic-v3-its: Implement irq_set_irqchip_state for pending state

Allow the pending state of an LPI to be set or cleared via irq_set_irqchip_state. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3-its.c | 78 1 file changed, 78 insertions(+) diff --git a/drivers/irqchip/irq-gic-v3-its.c

[RFC PATCH 00/33] irqchip: Core support for GICv4

This series implements the core support for GICv4. And despite its size, it does exactly *nothing*. What it adds is an infrastructure that a hypervisor (KVM) can use to route VLPIs to a guest. >From the bit of documentation that is in patch #32: WARNING: The blurb below assumes that you

[RFC PATCH 16/33] irqchip/gic-v3-its: Add GICv4 ITS command definitions

Add the new GICv4 ITS command definitions, most of them, being defined in terms of their physical counterparts. Signed-off-by: Marc Zyngier --- include/linux/irqchip/arm-gic-v3.h | 12 1 file changed, 12 insertions(+) diff --git

[RFC PATCH 27/33] irqchip/gic-v3-its: Add VPE interrupt masking

When masking/unmasking a doorbell interrupt, it is necessary to issue an invalidation to the corresponding redistributor. We use the DirectLPI feature by writting directly to the corresponding redistributor. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3-its.c

[RFC PATCH 32/33] irqchip/gic-v4: Add some basic documentation

Do a braindump of the way things are supposed to work. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v4.c | 59 1 file changed, 59 insertions(+) diff --git a/drivers/irqchip/irq-gic-v4.c b/drivers/irqchip/irq-gic-v4.c