Re: [PATCH 01/27] regset: Add support for dynamically sized regsets

Dave Martin writes: > Currently the regset API doesn't allow for the possibility that > regsets (or at least, the amount of meaningful data in a regset) > may change in size. > > In particular, this results in useless padding being added to > coredumps in a regset's current size is smaller than

Re: [PATCH 03/27] arm64: efi: Add missing Kconfig dependency on KERNEL_MODE_NEON

Dave Martin writes: > The EFI runtime services ABI permits calls to EFI to clobber > certain FPSIMD/NEON registers, as per the AArch64 procedure call > standard. > > Saving/restoring the clobbered registers around such calls needs > KERNEL_MODE_NEON, but the dependency is missing from Kconfig. >

Re: [PATCH 04/27] arm64: Port deprecated instruction emulation to new sysctl interface

Dave Martin writes: > Currently, armv8_deprected.c takes charge of the "abi" sysctl > directory, which makes life difficult for other code that wants to > register sysctls in the same directory. > > There is a "new" [1] sysctl registration interface that removes the > need to define ctl_tables f

[PATCH v5 0/7] Add RAS virtualization support to SEA/SEI notification type

In the firmware-first RAS solution, corrupt data is detected in a memory location when guest OS application software executing at EL0 or guest OS kernel El1 software are reading from the memory. The memory node records errors in an error record accessible using system registers. Because SCR_EL3.EA

[PATCH v5 2/7] KVM: arm64: Save ESR_EL2 on guest SError

From: James Morse When we exit a guest due to an SError the vcpu fault info isn't updated with the ESR. Today this is only done for traps. The v8.2 RAS Extensions define ISS values for SError. Update the vcpu's fault_info with the ESR on SError so that handle_exit() can determine if this was a R

[PATCH v5 6/7] KVM: arm64: Allow get exception information from userspace

when userspace gets SIGBUS signal, it does not know whether this is a synchronous external abort or SError, so needs to get the exception syndrome. so this patch allows userspace can get this values. For syndrome, only give userspace syndrome EC and ISS. Now we move the synchronous external abort

[PATCH v5 3/7] acpi: apei: Add SEI notification type support for ARMv8

ARMV8.2 requires implementation of the RAS extension, in this extension it adds SEI(SError Interrupt) notification type, this patch addes a new GHES error source handling function for SEI. Because this error source parse and handling method are similar with the SEA. so use one function to handle th

[PATCH v5 7/7] arm64: kvm: handle SEI notification and inject virtual SError

After receive SError, KVM firstly call memory failure to deal with the Error. If memory failure wants user space to handle it, it will notify user space. This patch adds support to userspace that injects virtual SError with specified syndrome. This syndrome value will be set to the VSESR_EL2. VSESR

[PATCH v5 1/7] arm64: cpufeature: Detect CPU RAS Extentions

From: Xie XiuQi ARM's v8.2 Extentions add support for Reliability, Availability and Serviceability (RAS). On CPUs with these extensions system software can use additional barriers to isolate errors and determine if faults are pending. Add cpufeature detection and a barrier in the context-switch

[PATCH v5 5/7] arm64: kvm: route synchronous external abort exceptions to el2

ARMv8.2 adds a new bit HCR_EL2.TEA which controls to route synchronous external aborts to EL2, and add a trap control bit HCR_EL2.TERR which will control to trap all Non-secure EL1&0 error record accesses to EL2. This patch will enable the two bits for the guest OS. when an synchronous abort is ge

[PATCH v5 4/7] support user space to query RAS extension feature

In armv8.2 RAS extension, it adds virtual SError exception syndrome registeri(VSESR_EL2), user space will specify that value. so user space will check whether CPU feature has RAS extension. if has, it will specify the virtual SError syndrome value. Otherwise, it will not set. This patch adds this s

[PATCH v11 6/6] target-arm: kvm64: Handle SError interrupt for the guest OS

When guest OS happens SError interrupt(SEI), it will trap to host. Host firstly calls memory failure to deal with this error and decide whether it needs to deliver SIGBUS signal to userspace. The advantage that using signal to notify is that it can make the notification method is general, non-KVM u

[PATCH v11 1/6] ACPI: add APEI/HEST/CPER structures and macros

(1) Add related APEI/HEST table structures and macros, these definition refer to ACPI 6.1 and UEFI 2.6 spec. (2) Add generic error status block and CPER memory section definition, user space only handle memory section errors. Signed-off-by: Dongjiu Geng --- include/hw/acpi/acpi-defs.h |

[PATCH v11 4/6] target-arm: kvm64: detect guest RAS EXTENSION feature

check if kvm supports guest RAS EXTENSION. if so, set corresponding feature bit for vcpu. Signed-off-by: Dongjiu Geng --- linux-headers/linux/kvm.h | 1 + target/arm/cpu.h | 3 +++ target/arm/kvm64.c| 8 3 files changed, 12 insertions(+) diff --git a/linux-headers/linu

[PATCH v11 5/6] target-arm: kvm64: handle SIGBUS signal for synchronous External Abort

Add SIGBUS signal handler. In this handler, it checks the exception type, translates the host VA which is delivered by host or KVM to guest PA, then fills this PA to CPER, finally injects a Error to guest OS through KVM. Add synchronous external abort injection logic, setup spsr_elx, esr_elx, PSTA

[PATCH v11 0/6] Add RAS virtualization support for armv8 SEA and SEI

In the armv8 platform, the mainly processor hardware error notification type are synchronous external abort(SEA) and SError Interrupt (SEI), For the ARMv8 SEA/SEI, KVM or host kernel will deliver SIGBUS or use other interface to notify user space. After user space gets the notification, it will rec

[PATCH v11 3/6] ACPI: build and enable APEI GHES in the Makefile and configuration

Add CONFIG_ACPI_APEI configuration in the Makefile and enable it in the arm-softmmu.mak Signed-off-by: Dongjiu Geng --- default-configs/arm-softmmu.mak | 1 + hw/acpi/Makefile.objs | 1 + 2 files changed, 2 insertions(+) diff --git a/default-configs/arm-softmmu.mak b/default-configs/a

[PATCH v11 2/6] ACPI: Add APEI GHES Table Generation support

This implements APEI GHES Table by passing the error CPER info to the guest via a fw_cfg_blob. After a CPER info is recorded, an SEA(Synchronous External Abort)/SEI(SError Interrupt) exception will be injected into the guest OS. Below is the table layout, the max number of error soure is 11, which

Re: [PATCH 05/27] arm64: fpsimd: Simplify uses of {set, clear}_ti_thread_flag()

Dave Martin writes: > The existing FPSIMD context switch code contains a couple of > instances of {set,clear}_ti_thread(task_thread_info(task)). Since > there are thread flag manipulators that operate directly on > task_struct, this verbosity isn't strictly needed. > > For consistency, this pat

答复: [PATCH v11 0/6] Add RAS virtualization support for armv8 SEA and SEI

Loop Laszlo. > -邮件原件- > 发件人: gengdongjiu > 发送时间: 2017年8月18日 22:24 > 收件人: m...@redhat.com; imamm...@redhat.com; Zhaoshenglong > ; peter.mayd...@linaro.org; > pbonz...@redhat.com; qemu-de...@nongnu.org; qemu-...@nongnu.org; > k...@vger.kernel.org; edk2-de...@lists.01.org; > christoffer.d.

答复: [PATCH v11 2/6] ACPI: Add APEI GHES Table Generation support

Loop Laszlo > -邮件原件- > 发件人: gengdongjiu > 发送时间: 2017年8月18日 22:24 > 收件人: m...@redhat.com; imamm...@redhat.com; Zhaoshenglong > ; peter.mayd...@linaro.org; > pbonz...@redhat.com; qemu-de...@nongnu.org; qemu-...@nongnu.org; > k...@vger.kernel.org; edk2-de...@lists.01.org; > christoffer.d..

答复: [PATCH v11 1/6] ACPI: add APEI/HEST/CPER structures and macros

Loop Laszlo > -邮件原件- > 发件人: gengdongjiu > 发送时间: 2017年8月18日 22:24 > 收件人: m...@redhat.com; imamm...@redhat.com; Zhaoshenglong > ; peter.mayd...@linaro.org; > pbonz...@redhat.com; qemu-de...@nongnu.org; qemu-...@nongnu.org; > k...@vger.kernel.org; edk2-de...@lists.01.org; > christoffer.d...