Re: [PATCH v3 0/4] kvm: arm/arm64: vgic: APRn uaccess support.

Hi Wanghaibin, On Fri, Sep 01, 2017 at 11:44:38AM +0200, Christoffer Dall wrote: > On Fri, Sep 01, 2017 at 12:10:59PM +0800, wanghaibin wrote: > > On 2017/9/1 4:33, Christoffer Dall wrote: > > > > > Hi Wanghaibin, > > > > > > On Wed, Aug 23, 2017 at 09:05:22AM +0800, wanghaibin wrote: > > >>

Re: [PATCH v6 1/7] arm64: cpufeature: Detect CPU RAS Extentions

James, On 2017/9/1 1:44, James Morse wrote: > Hi Dongjiu Geng, > > On 28/08/17 11:38, Dongjiu Geng wrote: >> From: Xie XiuQi >> >> ARM's v8.2 Extentions add support for Reliability, Availability and >> Serviceability (RAS). On CPUs with these extensions system software >>

Re: [PATCH v6 3/7] acpi: apei: remove the unused code

Hi James, On 2017/9/1 1:50, James Morse wrote: > Hi Dongjiu Geng, > > On 28/08/17 11:38, Dongjiu Geng wrote: >> In current code logic, the two functions ghes_sea_add() and >> ghes_sea_remove() are only called when CONFIG_ACPI_APEI_SEA >> is defined. If not, it will return errors in the

Re: [PATCH v6 0/7] Add RAS virtualization support for SEA/SEI notification type in KVM

Hi James On 2017/9/1 1:43, James Morse wrote: > Hi Dongjiu Geng, > > On 28/08/17 11:38, Dongjiu Geng wrote: >> In the firmware-first RAS solution, corrupt data is detected in a >> memory location when guest OS application software executing at EL0 >> or guest OS kernel El1 software are reading

[PATCH v2 6/6] KVM: arm/arm64: Provide a vgic interrupt line level sample function

The GIC sometimes need to sample the physical line of a mapped interrupt. As we know this to be notoriously slow, provide a callback function for devices (such as the timer) which can do this much faster than talking to the distributor, for example by comparing a few in-memory values. Fall back

[PATCH v2 4/6] KVM: arm/arm64: Support VGIC dist pend/active changes for mapped IRQs

For mapped IRQs (with the HW bit set in the LR) we have to follow some rules of the architecture. One of these rules is that VM must not be allowed to deactivate a virtual interrupt with the HW bit set unless the physical interrupt is also active. This works fine when injecting mapped

[PATCH v2 0/6] Handle forwarded level-triggered interrupts

This series illustrates an alternative approach to Eric Auger's direct EOI setup patches [1] in terms of the KVM VGIC support. The idea is to maintain existing semantics for the VGIC for mapped level-triggered IRQs and think support for the timer into it. Patch 1 is necessary to align the timer

[PATCH v2 1/6] KVM: arm/arm64: Don't cache the timer IRQ level

The timer was modeled after a strict idea of modelling an interrupt line level in software, meaning that only transitions in the level needed to be reported to the VGIC. This works well for the timer, because the arch timer code is in complete control of the device and can track the transitions

[PATCH v2 5/6] KVM: arm/arm64: Rearrange kvm_vgic_[un]map_phys code in vgic.c

The small indirection of a static function made the locking very obvious but becomes pretty ugly as we start passing function pointer around. Let's inline these two functions first to make the following patch more readable. Signed-off-by: Christoffer Dall Acked-by: Marc Zyngier

[PATCH v2 2/6] KVM: arm/arm64: vgic: restructure kvm_vgic_(un)map_phys_irq

From: Eric Auger We want to reuse the core of the map/unmap functions for IRQ forwarding. Let's move the computation of the hwirq in kvm_vgic_map_phys_irq and pass the linux IRQ as parameter. The host_irq is added to struct vgic_irq because it is needed in later patches

[PATCH v2 3/6] KVM: arm/arm64: vgic: Support level-triggered mapped interrupts

Level-triggered mapped IRQs are special because we only observe rising edges as input to the VGIC, and we don't set the EOI flag and therefore are not told when the level goes down, so that we can re-queue a new interrupt when the level goes up. One way to solve this problem is to side-step the

Re: [PATCH] KVM: arm/arm64: vITS: Drop its_ite->lpi field

On Fri, Sep 01, 2017 at 05:51:56PM +0100, Marc Zyngier wrote: > For unknown reasons, the its_ite data structure carries an "lpi" field > which contains the intid of the LPI. This is an obvious duplication > of the vgic_irq->intid field, so let's fix the only user and remove > the now useless

Re: [PATCH v3 0/4] kvm: arm/arm64: vgic: APRn uaccess support.

On 2017/9/5 1:27, Christoffer Dall wrote: > Hi Wanghaibin, > > On Fri, Sep 01, 2017 at 11:44:38AM +0200, Christoffer Dall wrote: >> On Fri, Sep 01, 2017 at 12:10:59PM +0800, wanghaibin wrote: >>> On 2017/9/1 4:33, Christoffer Dall wrote: >>> Hi Wanghaibin, On Wed, Aug 23, 2017 at