Re: [PATCH v2 15/28] arm64: cpufeature: Move sys_caps_initialised declarations

On 31/08/17 18:00, Dave Martin wrote: update_cpu_features() currently cannot tell whether it is being called during early or late secondary boot. This doesn't desperately matter for anything it currently does. However, SVE will need to know here whether the set of available vector lengths is

Re: [PATCH v2 12/28] arm64/sve: Support vector length resetting for new processes

Dave Martin writes: > It's desirable to be able to reset the vector length to some sane > default for new processes, since the new binary and its libraries > processes may or may not be SVE-aware. > > This patch tracks the desired post-exec vector length (if any) in a > new

Re: [PATCH v2 15/28] arm64: cpufeature: Move sys_caps_initialised declarations

Dave Martin writes: > update_cpu_features() currently cannot tell whether it is being > called during early or late secondary boot. This doesn't > desperately matter for anything it currently does. > > However, SVE will need to know here whether the set of available >

Re: [PATCH v2 13/28] arm64/sve: Signal handling support

Dave Martin writes: > This patch implements support for saving and restoring the SVE > registers around signals. > > A fixed-size header struct sve_context is always included in the > signal frame encoding the thread's vector length at the time of > signal delivery,

Re: [RFC PATCH 3/3] kvm: arm/arm64: vgic-its: fix return value for restore

Hi Wanghaibin, On 06/09/2017 15:05, wanghaibin wrote: > This patch fix the migrate restore tables failure. > > The same scene, at the destination, the restore tables interface traversal > guest > memory, and check the dte/ite is valid or not. > If all dtes/ites are invalid, we will do try next

Re: [PATCH v2 16/28] arm64/sve: Probe SVE capabilities and usable vector lengths

Dave Martin writes: > This patch uses the cpufeatures framework to determine common SVE > capabilities and vector lengths, and configures the runtime SVE > support code appropriately. > > ZCR_ELx is not really a feature register, but it is convenient to > use it as a

Re: [PATCH v2 17/28] arm64/sve: Preserve SVE registers around kernel-mode NEON use

Dave Martin writes: > Kernel-mode NEON will corrupt the SVE vector registers, due to the > way they alias the FPSIMD vector registers in the hardware. > > This patch ensures that any live SVE register content for the task > is saved by kernel_neon_begin(). The data will be

Re: [PATCH v2 18/28] arm64/sve: Preserve SVE registers around EFI runtime service calls

Dave Martin writes: > The EFI runtime services ABI allows EFI to make free use of the > FPSIMD registers during EFI runtime service calls, subject to the > callee-save requirements of the AArch64 procedure call standard. > > However, the SVE architecture allows upper bits

Re: [PATCH v6 5/7] arm64: kvm: route synchronous external abort exceptions to el2

James, On 2017/9/8 0:31, James Morse wrote: > KVM already handles external aborts from lower exception levels, no more work > needs doing for TEA. If it is firmware first solution, that is SCR_EL3.EA=1, all SError interrupt and synchronous External Abort exceptions are taken to EL3, so EL3

Re: [PATCH v6 5/7] arm64: kvm: route synchronous external abort exceptions to el2

Hi gengdongjiu, On 14/09/17 12:12, gengdongjiu wrote: > On 2017/9/8 0:31, James Morse wrote: >> KVM already handles external aborts from lower exception levels, no more work >> needs doing for TEA. > If it is firmware first solution, that is SCR_EL3.EA=1, all SError interrupt > and synchronous

Re: [PATCH v2 23/28] arm64/sve: KVM: Treat guest SVE use as undefined instruction execution

Dave Martin writes: > When trapping forbidden attempts by a guest to use SVE, we want the > guest to see a trap consistent with SVE not being implemented. > > This patch injects an undefined instruction exception into the > guest in response to such an exception. > >

Re: [PATCH v6 3/7] acpi: apei: remove the unused code

On 2017/9/14 20:35, James Morse wrote: >> James, whether it is possible you can review the previous v5 patch which >> adds the support for > Spreading 'current discussion' over two versions is a problem for anyone > trying > to follow this series. > > If you post a newer version its normal

Re: [PATCH v6 6/7] KVM: arm64: allow get exception information from userspace

Hi gengdongjiu, (re-ordered hunks) On 13/09/17 08:32, gengdongjiu wrote: > On 2017/9/8 0:30, James Morse wrote: >> On 28/08/17 11:38, Dongjiu Geng wrote: >> For BUS_MCEERR_A* from memory_failure() we can't know if they are caused by >> an access or not. Actually it looks like we can: I thought

Re: [PATCH v2 20/28] arm64/sve: Add prctl controls for userspace vector length management

Dave Martin writes: > This patch adds two arm64-specific prctls, to permit userspace to > control its vector length: > > * PR_SVE_SET_VL: set the thread's SVE vector length and vector >length inheritance mode. > > * PR_SVE_GET_VL: get the same information. > >

Re: [PATCH v6 3/7] acpi: apei: remove the unused code

Hi gengdongjiu, On 11/09/17 13:04, gengdongjiu wrote: > On 2017/9/9 2:17, James Morse wrote: >> On 04/09/17 12:43, gengdongjiu wrote: >>> On 2017/9/1 1:50, James Morse wrote: On 28/08/17 11:38, Dongjiu Geng wrote: If you aren't handling the notification, why is this is in the HEST at

Re: [PATCH v2 24/28] arm64/sve: KVM: Hide SVE from CPU features exposed to guests

Dave Martin writes: > KVM guests cannot currently use SVE, because SVE is always > configured to trap to EL2. > > However, a guest that sees SVE reported as present in > ID_AA64PFR0_EL1 may legitimately expect that SVE works and try to > use it. Instead of working, the

Re: [PATCH v2 21/28] arm64/sve: Add sysctl to set the default vector length for new processes

Dave Martin writes: > Because of the effect of SVE on the size of the signal frame, the > default vector length used for new processes involves a tradeoff > between performance of SVE-enabled software on the one hand, and > reliability of non-SVE-aware software on the other

Re: [PATCH v2 23/28] arm64/sve: KVM: Treat guest SVE use as undefined instruction execution

Dave Martin writes: > When trapping forbidden attempts by a guest to use SVE, we want the > guest to see a trap consistent with SVE not being implemented. > > This patch injects an undefined instruction exception into the > guest in response to such an exception. I do

Re: 答复: [PATCH v6 4/7] arm64: kvm: support user space to query RAS extension feature

Hi Peter, On 08/09/17 16:03, Peter Maydell wrote: > On 8 September 2017 at 15:34, gengdongjiu wrote: >> Hi Peter/ shenglong, >>What is your idea about it? We may need to consult with you about it. > > I agree with what I take to be James' general point that we >

Re: [PATCH v2 19/28] arm64/sve: ptrace and ELF coredump support

Dave Martin writes: > This patch defines and implements a new regset NT_ARM_SVE, which > describes a thread's SVE register state. This allows a debugger to > manipulate the SVE state, as well as being included in ELF > coredumps for post-mortem debugging. > > Because the

Re: [PATCH v2 22/28] arm64/sve: KVM: Prevent guests from using SVE

Dave Martin writes: > Until KVM has full SVE support, guests must not be allowed to > execute SVE instructions. > > This patch enables the necessary traps, and also ensures that the > traps are disabled again on exit from the guest so that the host > can still use SVE if it

Re: 答复: [PATCH v6 4/7] arm64: kvm: support user space to query RAS extension feature

Hi gengdongjiu, On 08/09/17 18:36, gengdongjiu wrote: >> The code to signal memory-failure to user-space doesn't depend on the CPU's >> RAS-extensions. > I roughly check your answer and agree with your general idea. > late I will check it in detail. > I have a question, do you sure that if CPU

Re: [PATCH v2 10/16] arm64: kernel: Survive corrected RAS errors notified by SError

Hi Tyler, On 13/09/17 21:52, Baicar, Tyler wrote: > On 7/28/2017 8:10 AM, James Morse wrote: >> On v8.0, SError is an uncontainable fatal exception. The v8.2 RAS >> extensions use SError to notify software about RAS errors, these can be >> contained by the ESB instruction. >> >> An ACPI system

Re: [PATCH v2 11/28] arm64/sve: Core task context handling

On Wed, Sep 13, 2017 at 03:21:29PM -0700, Catalin Marinas wrote: > On Wed, Sep 13, 2017 at 08:17:07PM +0100, Dave P Martin wrote: > > On Wed, Sep 13, 2017 at 10:26:05AM -0700, Catalin Marinas wrote: > > > On Thu, Aug 31, 2017 at 06:00:43PM +0100, Dave P Martin wrote: > > > > +/* > > > > + *

Re: [PATCH v2 11/28] arm64/sve: Core task context handling

On Wed, Sep 13, 2017 at 07:33:25AM -0700, Catalin Marinas wrote: > On Thu, Aug 31, 2017 at 06:00:43PM +0100, Dave P Martin wrote: > > +/* > > + * Handle SVE state across fork(): > > + * > > + * dst and src must not end up with aliases of the same sve_state. > > + * Because a task cannot fork

Re: [PATCH v2 02/28] arm64: KVM: Hide unsupported AArch64 CPU features from guests

On Wed, Sep 13, 2017 at 03:37:42PM +0100, Alex Bennée wrote: > > Dave Martin writes: [...] > > diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c > > index 945e79c..35a90b8 100644 > > --- a/arch/arm64/kvm/hyp/switch.c > > +++