[PATCH 0/3] KVM: arm64: Fix userspace access to HW pending state

Eric reported that a Seattle system was pretty unhappy about VM migration, and the trace pointed to a glaring bug in the way the GICv2 emulation code reported the interrupt pending state to userspace for HW interrupts, specially if the interrupt state is per-CPU, as this is the case for the

[PATCH 3/3] KVM: arm64: Warn if accessing timer pending state outside of vcpu context

A recurrent bug in the KVM/arm64 code base consists in trying to access the timer pending state outside of the vcpu context, which makes zero sense (the pending state only exists when the vcpu is loaded). In order to avoid more embarassing crashes and catch the offenders red-handed, add a warning

[PATCH 2/3] KVM: arm64: Replace vgic_v3_uaccess_read_pending with vgic_uaccess_read_pending

Now that GICv2 has a proper userspace accessor for the pending state, switch GICv3 over to it, dropping the local version. Signed-off-by: Marc Zyngier --- arch/arm64/kvm/vgic/vgic-mmio-v3.c | 40 ++ 1 file changed, 2 insertions(+), 38 deletions(-) diff --git

[PATCH 1/3] KVM: arm64: Don't read a HW interrupt pending state in user context

Since 5bfa685e62e9 ("KVM: arm64: vgic: Read HW interrupt pending state from the HW"), we're able to source the pending bit for an interrupt that is stored either on the physical distributor or on a device. However, this state is only available when the vcpu is loaded, and is not intended to be

[PATCH] KVM: arm64: fix the inconsistent indenting

Fix the inconsistent indenting in function flush_context. Fix the following smatch warnings: arch/arm64/kvm/vmid.c:62 flush_context() warn: inconsistent indenting Reported-by: kernel test robot Signed-off-by: sunliming --- arch/arm64/kvm/vmid.c | 2 +- 1 file changed, 1 insertion(+), 1

Re: [PATCH 1/3] KVM: arm64: Don't read a HW interrupt pending state in user context

Marc, On 6/2/22 10:30, Marc Zyngier wrote: > Since 5bfa685e62e9 ("KVM: arm64: vgic: Read HW interrupt pending state > from the HW"), we're able to source the pending bit for an interrupt > that is stored either on the physical distributor or on a device. > > However, this state is only available

Re: [PATCH 1/3] KVM: arm64: Don't read a HW interrupt pending state in user context

On 6/2/22 10:30, Marc Zyngier wrote: > Since 5bfa685e62e9 ("KVM: arm64: vgic: Read HW interrupt pending state > from the HW"), we're able to source the pending bit for an interrupt > that is stored either on the physical distributor or on a device. > > However, this state is only available

Re: [PATCH 3/3] KVM: arm64: Warn if accessing timer pending state outside of vcpu context

Hi Marc, On 6/2/22 10:30, Marc Zyngier wrote: > A recurrent bug in the KVM/arm64 code base consists in trying to > access the timer pending state outside of the vcpu context, which > makes zero sense (the pending state only exists when the vcpu > is loaded). > > In order to avoid more

Re: [PATCH 2/3] KVM: arm64: Replace vgic_v3_uaccess_read_pending with vgic_uaccess_read_pending

Hi Marc, On 6/2/22 10:30, Marc Zyngier wrote: > Now that GICv2 has a proper userspace accessor for the pending state, > switch GICv3 over to it, dropping the local version. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/vgic/vgic-mmio-v3.c | 40 ++ > 1 file