ween what's reasonable and what's effective:
aborting qemu when running on buggy host kernel
v2:
- Improving/re-phrasing messaging
- Dropping messing around with forced sync (@see [PATCH v2 1/2])
and PC alignment
Beata Michalska (2):
target/arm: kvm: Handle DABT with no valid ISS
t
instruction.
Add support for handling that case.
[
Fixed-by: 018f22f95e8a
('KVM: arm: Fix DFSR setting for non-LPAE aarch32 guests')
Fixed-by: 21aecdbd7f3a
('KVM: arm: Make inject_abt32() inject an external abort instead')
]
Signed-off-by: Beata Michalska
-
ling those by requesting KVM to inject external
dabt into the quest.
Signed-off-by: Beata Michalska
---
target/arm/cpu.h | 2 ++
target/arm/kvm.c | 54
target/arm/kvm_arm.h | 11 +++
3 files changed, 67 insertions(+)
diff --g
Hi,
On Mon, 23 Mar 2020 at 12:44, Andrew Jones wrote:
>
> On Mon, Mar 23, 2020 at 11:32:26AM +, Beata Michalska wrote:
> > On ARMv7 & ARMv8 some load/store instructions might trigger a data abort
> > exception with no valid ISS info to be decoded. The lack of decod
On Mon, 23 Mar 2020 at 18:44, Richard Henderson
wrote:
>
> On 3/23/20 4:32 AM, Beata Michalska wrote:
> > uint8_t ext_dabt_pending; /* Request for injecting ext DABT */
> > +uint8_t ext_dabt_raised; /* Tracking/verifying injection of ext DABT */
>
> Is there a
On Fri, 3 Apr 2020 at 09:44, Andrew Jones wrote:
>
> On Mon, Mar 23, 2020 at 11:32:27AM +, Beata Michalska wrote:
> > Injecting external data abort through KVM might trigger
> > an issue on kernels that do not get updated to include the KVM fix.
> > For those and aarc
On Tue, 7 Apr 2020 at 12:24, Peter Maydell wrote:
>
> On Fri, 3 Apr 2020 at 09:44, Andrew Jones wrote:
> >
> > On Mon, Mar 23, 2020 at 11:32:27AM +0000, Beata Michalska wrote:
> > > Injecting external data abort through KVM might trigger
> > > an issue o
On Fri, 17 Apr 2020 at 14:10, Andrew Jones wrote:
>
> On Fri, Apr 17, 2020 at 11:39:25AM +0100, Peter Maydell wrote:
> > On Mon, 23 Mar 2020 at 11:32, Beata Michalska
> > wrote:
> > >
> > > On ARMv7 & ARMv8 some load/store instructions might trigger a data
ling those by requesting KVM to inject external
dabt into the quest.
Signed-off-by: Beata Michalska
---
target/arm/cpu.h | 2 ++
target/arm/kvm.c | 64 +++-
target/arm/kvm_arm.h | 11 +
3 files changed, 76 insertions(+), 1 dele
instruction.
Add support for handling that case.
[
Fixed-by: 018f22f95e8a
('KVM: arm: Fix DFSR setting for non-LPAE aarch32 guests')
Fixed-by: 21aecdbd7f3a
('KVM: arm: Make inject_abt32() inject an external abort instead')
]
Signed-off-by: Beata Michalska
-
nable and what's effective:
aborting qemu when running on buggy host kernel
v2:
- Improving/re-phrasing messaging
- Dropping messing around with forced sync (@see [PATCH v2 1/2])
and PC alignment
Beata Michalska (2):
target/arm: kvm: Handle DABT with no valid ISS
target/ar
Hi Andrew,
Thanks for the feedback.
On Tue, 16 Jun 2020 at 09:33, Andrew Jones wrote:
>
> Hi Beata,
>
> I see Peter just picked this up, so I'm a bit late getting to it. I do
> have a couple comments below though.
>
> Thanks,
> drew
>
> On Fri, May 29, 2020 a
nels):
little bit of trade-off between what's reasonable and what's effective:
aborting qemu when running on buggy host kernel
v2:
- Improving/re-phrasing messaging
- Dropping messing around with forced sync (@see [PATCH v2 1/2])
and PC alignment
Beata Michalska (2):
target/ar
instruction.
Add support for handling that case.
[
Fixed-by: 018f22f95e8a
('KVM: arm: Fix DFSR setting for non-LPAE aarch32 guests')
Fixed-by: 21aecdbd7f3a
('KVM: arm: Make inject_abt32() inject an external abort instead')
]
Signed-off-by: Beata Michalska
-
ling those by requesting KVM to inject external
dabt into the quest.
Signed-off-by: Beata Michalska
---
target/arm/kvm.c | 59 +++-
1 file changed, 58 insertions(+), 1 deletion(-)
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index eef3bbd..265
ng/re-phrasing messaging
- Dropping messing around with forced sync (@see [PATCH v2 1/2])
and PC alignment
Beata Michalska (2):
target/arm: kvm: Handle DABT with no valid ISS
target/arm: kvm: Handle misconfigured dabt injection
target/arm/cpu.h | 2 ++
target/arm/
instruction.
Add support for handling that case.
[
Fixed-by: 018f22f95e8a
('KVM: arm: Fix DFSR setting for non-LPAE aarch32 guests')
Fixed-by: 21aecdbd7f3a
('KVM: arm: Make inject_abt32() inject an external abort instead')
]
Signed-off-by: Beata Michalska
-
ling those by requesting KVM to inject external
dabt into the quest.
Signed-off-by: Beata Michalska
---
target/arm/kvm.c | 58 +++-
1 file changed, 57 insertions(+), 1 deletion(-)
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index eef3bbd..3ea
Hi Peter,
Hi Andrew
Thanks for quick review.
I have pushed the updated version.
BR
Beata
On Fri, 26 Jun 2020 at 13:59, Peter Maydell wrote:
>
> On Fri, 26 Jun 2020 at 10:01, Andrew Jones wrote:
> > nit: How about using '= {0}' when declaring the variable, rather than this
> > memset?
>
> We pr
27;s effective:
aborting qemu when running on buggy host kernel
v2:
- Improving/re-phrasing messaging
- Dropping messing around with forced sync (@see [PATCH v2 1/2])
and PC alignment
Beata Michalska (2):
target/arm: kvm: Handle DABT with no valid ISS
target/arm: kvm: Handle misconfigured
ling those by requesting KVM to inject external
dabt into the quest.
Signed-off-by: Beata Michalska
---
target/arm/kvm.c | 57 +++-
1 file changed, 56 insertions(+), 1 deletion(-)
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index eef3bbd..2dd
instruction.
Add support for handling that case.
[
Fixed-by: 018f22f95e8a
('KVM: arm: Fix DFSR setting for non-LPAE aarch32 guests')
Fixed-by: 21aecdbd7f3a
('KVM: arm: Make inject_abt32() inject an external abort instead')
]
Signed-off-by: Beata Michalska
-
instruction.
Add support for handling that case.
[
Fixed-by: 018f22f95e8a
('KVM: arm: Fix DFSR setting for non-LPAE aarch32 guests')
Fixed-by: 21aecdbd7f3a
('KVM: arm: Make inject_abt32() inject an external abort instead')
]
Signed-off-by: Beata Michalska
Ac
easonable and what's effective:
aborting qemu when running on buggy host kernel
v2:
- Improving/re-phrasing messaging
- Dropping messing around with forced sync (@see [PATCH v2 1/2])
and PC alignment
Beata Michalska (2):
target/arm: kvm: Handle DABT with no valid ISS
target/ar
ling those by requesting KVM to inject external
dabt into the quest.
Signed-off-by: Beata Michalska
Reviewed-by: Andrew Jones
---
target/arm/kvm.c | 52
1 file changed, 52 insertions(+)
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index eef
On Mon, 29 Jun 2020 at 09:15, Andrew Jones wrote:
>
> On Sun, Jun 28, 2020 at 04:04:58PM +0100, Beata Michalska wrote:
> > On ARMv7 & ARMv8 some load/store instructions might trigger a data abort
> > exception with no valid ISS info to be decoded. The lack of decode info
Hi James,
Thanks for the fixes - they work like a charm.
On Tue, 21 Jan 2020 at 12:34, James Morse wrote:
>
> Beata reports that KVM_CAP_ARM_INJECT_EXT_DABT doesn't do the expected
> thing for aarch32 guests. We get the wrong register layout, and weren't
> even trying to set a 'external abort' i
Hi Marc,
On Sun, 26 Jan 2020 at 11:56, Marc Zyngier wrote:
>
> On Fri, 24 Jan 2020 15:39:29 +0000
> Beata Michalska wrote:
>
> Hi Beata,
>
> > Hi James,
> >
> > Thanks for the fixes - they work like a charm.
> >
> > On Tue, 21 Jan 2020 at 12:3
1/2])
and PC alignment
Beata Michalska (2):
target/arm: kvm: Inject events at the last stage of sync
target/arm: kvm: Handle DABT with no valid ISS
target/arm/cpu.h | 2 ++
target/arm/kvm.c | 96
target/arm/kvm32.c
ling those by requesting KVM to inject external
dabt into the quest.
Signed-off-by: Beata Michalska
---
target/arm/cpu.h | 2 ++
target/arm/kvm.c | 96
target/arm/kvm32.c | 3 ++
target/arm/kvm64.c | 3 ++
target/arm/kvm_arm.h
KVM_SET_VCPU_EVENTS might actually lead to vcpu registers being modified.
As such this should be the last step of sync to avoid potential overwriting
of whatever changes KVM might have done.
Signed-off-by: Beata Michalska
---
target/arm/kvm32.c | 20 ++--
target/arm/kvm64.c | 20
On Tue, 4 Feb 2020 at 10:34, Andrew Jones wrote:
>
> On Wed, Jan 29, 2020 at 08:24:40PM +, Beata Michalska wrote:
> > KVM_SET_VCPU_EVENTS might actually lead to vcpu registers being modified.
> > As such this should be the last step of sync to avoid potential overwriti
On Wed, 5 Feb 2020 at 16:57, Andrew Jones wrote:
>
> On Wed, Jan 29, 2020 at 08:24:41PM +, Beata Michalska wrote:
> > On ARMv7 & ARMv8 some load/store instructions might trigger a data abort
> > exception with no valid ISS info to be decoded. The lack of decode info
On Fri, 7 Feb 2020 at 08:20, Andrew Jones wrote:
>
> On Thu, Feb 06, 2020 at 09:48:05PM +, Beata Michalska wrote:
> > On Wed, 5 Feb 2020 at 16:57, Andrew Jones wrote:
> > >
> > > On Wed, Jan 29, 2020 at 08:24:41PM +, Beata Michalska wrote:
> >
bug (for small range of affected kernels):
little bit of trade-off between what's reasonable and what's effective:
aborting qemu when running on buggy host kernel
v2:
- Improving/re-phrasing messaging
- Dropping messing around with forced sync (@see [PATCH v2 1/2])
and PC ali
ling those by requesting KVM to inject external
dabt into the quest.
Signed-off-by: Beata Michalska
---
target/arm/cpu.h | 3 ++
target/arm/kvm.c | 81
target/arm/kvm32.c | 26 +
target/arm/kvm64.c
KVM_SET_VCPU_EVENTS might actually lead to vcpu registers being modified.
As such this should be the last step of sync to avoid potential overwriting
of whatever changes KVM might have done.
Signed-off-by: Beata Michalska
---
target/arm/kvm32.c | 15 ++-
target/arm/kvm64.c | 15
On Thu, 12 Mar 2020 at 16:33, Peter Maydell wrote:
>
> On Thu, 12 Mar 2020 at 00:34, Beata Michalska
> wrote:
> >
> > KVM_SET_VCPU_EVENTS might actually lead to vcpu registers being modified.
> > As such this should be the last step of sync to avoid potential overwrit
On Thu, 12 Mar 2020 at 10:25, Andrew Jones wrote:
>
> On Thu, Mar 12, 2020 at 12:34:01AM +, Beata Michalska wrote:
> > On ARMv7 & ARMv8 some load/store instructions might trigger a data abort
> > exception with no valid ISS info to be decoded. The lack of decode info
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