Re: [PATCH 1/2] KVM: arm64: Add PMU event filtering infrastructure
On 15/02/2020 10:28 am, Marc Zyngier wrote: On Fri, 14 Feb 2020 22:01:01 +, Robin Murphy wrote: Hi Robin, Hi Marc, On 2020-02-14 6:36 pm, Marc Zyngier wrote: [...] @@ -585,6 +585,14 @@ static void kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu, u64 select_idx) pmc->idx != ARMV8_PMU_CYCLE_IDX) return; +/* +* If we have a filter in place and that the event isn't allowed, do +* not install a perf event either. +*/ + if (vcpu->kvm->arch.pmu_filter && + !test_bit(eventsel, vcpu->kvm->arch.pmu_filter)) + return; If I'm reading the derivation of eventsel right, this will end up treating cycle counter events (aliased to SW_INCR) differently from CPU_CYCLES, which doesn't seem desirable. Indeed, this doesn't look quite right. Looking at the description of event 0x11, it doesn't seem to count exactly like the cycle counter (there are a number of PMCR controls affecting it). But none of these actually apply to our PMU emulation (no secure mode, and the idea of dealing with virtual EL2 in the context of the PMU is... not appealing). Now, given that we implement the cycle counter with event 0x11 anyway, I don't think there is any reason to deal with them separately. Right, from the user's PoV they can only ask for event 0x11, and where it gets scheduled is more of a black-box implementation detail. Reading the Arm ARM doesn't leave me entirely convinced that cycles couldn't ever leak idle/not-idle information between closely-coupled PEs, so this might not be entirely academic. Also, if the user did try to blacklist SW_INCR for ridiculous reasons, we'd need to special-case kvm_pmu_software_increment() to make it (not) work as expected, right? I thought of that one, and couldn't see a reason to blacklist it (after all, the guest could also increment a variable) and send itself an interrupt. I'm tempted to simply document that event 0 is never filtered. I'd say you're on even stronger ground simply because KVM's implementation of SW_INCR doesn't go near the PMU hardware at all, thus is well beyond the purpose of the blacklist anyway. I believe it's important that how the code behaves matches expectations, but there's no harm in changing the latter as appropriate ;) Cheers, Robin. ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Re: [PATCH 1/2] KVM: arm64: Add PMU event filtering infrastructure
On Fri, 14 Feb 2020 22:01:01 +, Robin Murphy wrote: Hi Robin, > > Hi Marc, > > On 2020-02-14 6:36 pm, Marc Zyngier wrote: > [...] > > @@ -585,6 +585,14 @@ static void kvm_pmu_create_perf_event(struct kvm_vcpu > > *vcpu, u64 select_idx) > > pmc->idx != ARMV8_PMU_CYCLE_IDX) > > return; > > + /* > > +* If we have a filter in place and that the event isn't allowed, do > > +* not install a perf event either. > > +*/ > > + if (vcpu->kvm->arch.pmu_filter && > > + !test_bit(eventsel, vcpu->kvm->arch.pmu_filter)) > > + return; > > If I'm reading the derivation of eventsel right, this will end up > treating cycle counter events (aliased to SW_INCR) differently from > CPU_CYCLES, which doesn't seem desirable. Indeed, this doesn't look quite right. Looking at the description of event 0x11, it doesn't seem to count exactly like the cycle counter (there are a number of PMCR controls affecting it). But none of these actually apply to our PMU emulation (no secure mode, and the idea of dealing with virtual EL2 in the context of the PMU is... not appealing). Now, given that we implement the cycle counter with event 0x11 anyway, I don't think there is any reason to deal with them separately. > Also, if the user did try to blacklist SW_INCR for ridiculous > reasons, we'd need to special-case kvm_pmu_software_increment() to > make it (not) work as expected, right? I thought of that one, and couldn't see a reason to blacklist it (after all, the guest could also increment a variable) and send itself an interrupt. I'm tempted to simply document that event 0 is never filtered. Thanks, M. -- Jazz is not dead, it just smells funny. ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Re: [PATCH 1/2] KVM: arm64: Add PMU event filtering infrastructure
Hi Marc, On 2020-02-14 6:36 pm, Marc Zyngier wrote: [...] @@ -585,6 +585,14 @@ static void kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu, u64 select_idx) pmc->idx != ARMV8_PMU_CYCLE_IDX) return; + /* +* If we have a filter in place and that the event isn't allowed, do +* not install a perf event either. +*/ + if (vcpu->kvm->arch.pmu_filter && + !test_bit(eventsel, vcpu->kvm->arch.pmu_filter)) + return; If I'm reading the derivation of eventsel right, this will end up treating cycle counter events (aliased to SW_INCR) differently from CPU_CYCLES, which doesn't seem desirable. Also, if the user did try to blacklist SW_INCR for ridiculous reasons, we'd need to special-case kvm_pmu_software_increment() to make it (not) work as expected, right? Robin. + memset(, 0, sizeof(struct perf_event_attr)); attr.type = PERF_TYPE_RAW; attr.size = sizeof(attr); ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
