Re: [LEDE-DEV] MT7621: 2 or 4 CPUs?

2016-07-15 Thread Gaetano Catalli 
Thanks Daniel,

I also found it in the datasheet:

MIPS MT Application Specific Extension (ASE)
  - Support for 2 Virtual Processing Elements (VPEs) per CORE
  - One Thread Context (TC) per VPE

Regards,
Gaetano

On Fri, Jul 15, 2016 at 11:07 AM, Daniel Golle  wrote:
> Hi Gaetano,
>
> On Fri, Jul 15, 2016 at 11:01:12AM +0200, Gaetano Catalli wrote:
>> Hello,
>>
>> I'm a bit confused about the number of CPUs of MT7621 SoC.
>> From the MT7621 datasheet:
>>
>> "The MT7621 router-on-a-chip includes a 880 MHz MIPS 1004Kc CPU dual-core 
>> ..."
>>
>> So why does /proc/cpuinfo show 4 cpus?
>
> MIPS MT is similar to Intel's HyperThreading on x86.
>
> https://imgtec.com/mips/architectures/multi-threading/
>
> ... "MT can make a single processor core appear to an SMP operating
> system like two separate cores."
>
>
> Cheers
>
> Daniel
>
>>
>> Regards.
>>
>> --
>> gaetano catalli
>>
>> ___
>> Lede-dev mailing list
>> Lede-dev@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/lede-dev



-- 
gaetano catalli

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Re: [LEDE-DEV] MT7621: 2 or 4 CPUs?

2016-07-15 Thread Daniel Golle 
Hi Gaetano,

On Fri, Jul 15, 2016 at 11:01:12AM +0200, Gaetano Catalli wrote:
> Hello,
> 
> I'm a bit confused about the number of CPUs of MT7621 SoC.
> From the MT7621 datasheet:
> 
> "The MT7621 router-on-a-chip includes a 880 MHz MIPS 1004Kc CPU dual-core ..."
> 
> So why does /proc/cpuinfo show 4 cpus?

MIPS MT is similar to Intel's HyperThreading on x86.

https://imgtec.com/mips/architectures/multi-threading/

... "MT can make a single processor core appear to an SMP operating
system like two separate cores."


Cheers

Daniel

> 
> Regards.
> 
> -- 
> gaetano catalli
> 
> ___
> Lede-dev mailing list
> Lede-dev@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/lede-dev

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