[ACTIVITY] 1st June - 3rd June 2016

2016-06-03 Thread Peter Smith
== Progress == - Holiday Monday/Tuesday - Finished writing initial support for ARM in lld. Posted upstream as RFC, no comments so far. - Implemented, but not tested the static Thumb relocations present in the arm-linux-gnueabihf-gcc -- I'd forgotten how much I hated the Thumb 2 instruction

[ACTIVITY] 6-10 June 2016

2016-06-10 Thread Peter Smith
== Progress == TCWG-607 Initial ARM port for LLD committed upstream. Hello World on an ARM with an ARM only gcc libc is possible, but not much else. TCWG-611 Initial Thumb support sent for upstream review. Interworking is possible at the BLX level but full interworking support (veneers/thunks)

[ACTIVITY] 23-27 May 2016

2016-05-27 Thread Peter Smith
== Progress == * LLD Port: - Got hello world running. -- Needed a horrible hack to make lld output PLT and GOT entries for unresolved weak references with default visibility. - Wrote up in Jira the major areas of work that would be needed for a useful port. - Started putting in changes cleanly

[Activity] 20-24 June 2016

2016-06-24 Thread Peter Smith
== Progress == * TCWG-653 Add interworking thunks to LLD Investigated and reported upstream bug in existing implementation. This has been fixed by reverting the change that introduced it. Got some feedback about whether I would need to strictly follow existing Thunk implementation. Implemented

[ACTIVITY] for week ending 8th April 2016

2016-04-08 Thread Peter Smith
== Progress == Transition week into Linaro toolchain group from ARM to replace Bernie [*] - Some ARM handover work done. - Started looking into https://llvm.org/bugs/show_bug.cgi?id=24350 (TCWG-466 ADRL support) -- Checked behaviour of ADRL on armasm and GNU as -- Worked out what I need to do in

[ACTIVITY] Week 16

2016-04-25 Thread Peter Smith
Progress: - On holiday all week, at ACCU conference. I've put some highlights at the end of the message. - Did some more investigation into TCWG-466 ADRL support in integrated assembler during breaks. -- Not looking good, to do this properly bumps up against a lot of design decisions and

[ACTIVITY] 25 - 29 April 2016

2016-04-29 Thread Peter Smith
# Progress # * TCWG-466, ADRL pseudo instruction support in integrated assembler. I couldn't find a way of putting ADRL into the assembler in a maintainable way. Managed to work out a pretty close approximation of ADRL in a macro so I added it to upstream PR. Put the results of the my

Re: missing gold --be8 support

2016-05-24 Thread Peter Smith
Hello, BE8 support in ARMv7 is independent of LTO. In essence the bit-code file will be code-generated into a big-endian object file. To a linker this is no different to an big-endian ELF object file from the command line or a static library. I think that the bit missing from Gold is the endian

[ACTIVITY] 16 - 20 May 2016

2016-05-20 Thread Peter Smith
=== Progress === TCWG-591 MOVW incorrectly allowed on ARM v5 committed upstream TCWG-595 LLD port to ARM architecture I am getting close to being able to run hello world built with lld. I'm converging 1 bug at a time. - The PLT handling code is working and the loader can execute the image and

[ACTIVITY] 02 - 06 May 2016

2016-05-06 Thread Peter Smith
* Monday off [2/10] # Progress # * TCWG-468, ldr rt, =immediate Have a feature complete implementation. Passes existing regression tests. Still need to add more tests for new functionality and see if implementation can be tidied up a bit * Setting up a local chromebook to run the

[ACTIVITY] 11 - 15 April 2016

2016-04-15 Thread Peter Smith
Progress: - Read up on AARCH64 TLS and LLD code base - Commented on upstream patch in hope of getting approval from the code-owners - TCWG-466 Implement ADRL pseudo in LLVM assembler -- Slow progress as the pseudo instruction does not fit well into the existing architecture -- On the positive side

[ACTIVITY] 18-22 July 2016

2016-07-22 Thread Peter Smith
== Progress == TCWG-680 Some analysis on what non-compiler support would be required for an llvm based EBC (UEFI) toolchain. TCWG-612 ARM TLS support in LLD: Initial support and tests for standard model upstreamed. There is still some work to be done for corner cases where LLD's relaxations will

[ACTIVITY] 4-8 July 2016

2016-07-08 Thread Peter Smith
== Progress == TCWG-653 ARM/Thumb interworking veneers Committed upstream after several review rounds and at least one set of build bot failures in systems/compilers we don't have set up. TCWG-612 ARM TLS support in LLD Have an implementation and most of the tests. Should be ok to upstream

[ACTIVITY] 27 June - 1 July 2016

2016-07-01 Thread Peter Smith
== Progress == TCWG-653 ARM/Thumb interworking veneers Have completed an implementation, now in upstream review. Had initial set of comments and posted an update. Likely to take several iterations before commit TCWG-612 ARM TLS support in LLD Made a start. Looks to be more straightforward the

[ACTIVITY] 23 - 27 January 2017

2017-01-27 Thread Peter Smith
[TCWG-614] Range extension thunks - LLD now uses synthetic sections for Thunks. ARM Thunks now have symbols and mapping symbols. As a side-effect we can now create local symbols in synthetic sections so I've added them to the ARM PLT sections. [Misc] - Wrote 3 lines of lld 4.0 release notes for

[ACTIVITY] 20 Feb 2017

2017-02-20 Thread Peter Smith
1 day in office this week == Activity == [TCWG-617] Range extension thunks - Reworked patch to finalize dynamic content early and resubmitted for upstream review - Investigated what I'll need to do to handle linkerscripts [BUD17] Uploaded slide deck == Plan == On holiday till Thursday 1st March

[ACTIVITY] 13 - 17 February 2017

2017-02-17 Thread Peter Smith
[TCWG-617] Range extension thunks - Did some refactoring to allow addresses to be assigned to sections prior to Thunk creation -- In upstream review - Investigated lld's implementation of linkerscripts and found out that they will need some refactoring as well -- Need to assign addresses more than

[ACTIVITY] 6 - 10 February 2017

2017-02-10 Thread Peter Smith
== Progress == [TCWG-617] Upstreamed a patch to make copy relocations use synthetic sections. This allows us to remove the output section relative dynamic relocation which is important for range extension Thunks Did some design work for range extension Thunks. Did some refactoring to merge PLT

[Activity] 16 - 20 January 2017

2017-01-20 Thread Peter Smith
[TCWG-614] Range extension thunks Started process of upstreaming the conversion of Thunks to SyntheticSections. - Patch 1 of 3 committed, move Thunk Creation later in the link step. - Patch 2 of 3 add support for local symbol creation in upstream review - Patch 3 of 3 waiting for patch 2 Made a

[ACTIVITY] 30-2 September 2016

2016-09-02 Thread Peter Smith
== Activity == [TCWG-610] Sent .ARM.exidx for upstream review. Will need to rework and simplify bit to make more specific to ARM. In summary abandon pretence of SHF_LINK_ORDER in general and concentrate on supporting its one known use case in .ARM.exidx sections. Made a couple of drafts of

[Activity] 5 - 8 Sept 2016

2016-09-12 Thread Peter Smith
== Progress == - Still trying to get support for .ARM.exidx into upstream LLD, looks like more changes are needed by the owners, but I think I should be able to get this by the next report. - LLVM Cauldron on Thursday. Trip report sent separately - Holiday on Friday == Next week == Planned: -

[ACTIVITY] 3 - 7 October 2016

2016-10-07 Thread Peter Smith
== Activity == - AFDS and AFDS review comments LLD: - Have nudged the ARM exceptions story in lld along a bit, I've had one patch accepted, but not the most important one. - Updated the Linaro TCWG jira issues post Connect - Worked on static linking and ifunc support. I have managed to get

[Activity] 19-23 September 2016

2016-09-23 Thread Peter Smith
== Activity == Exceptions. Another attempt at ARM exceptions support. I did get some more fine grained comments back which have been addressed, but no approval to commit yet. Some follow up over whether ld -r support for merging output sections is necessary, answer seems to be yes as kernel

[Activity] 12 - 16 September

2016-09-16 Thread Peter Smith
== Activity == Exceptions support in LLD; 3rd try at an implementation that will be accepted upstream. Now implementation complete and passing my existing tests but needs some more cases checked. Helped track down an intermittent build bot failure to an ld stub generation problem Some upstream

[ACTIVITY] 7-11 November 2016

2016-11-11 Thread Peter Smith
TCWG-901 Investigate lld as a system linker - Installed lld as the system linker on my Chromebook and attempted to build and run things to see what breaks - Only one unknown concrete problem found so far, thunks to undefined symbols with PLT entries don't work. This seems to be common in python C

[ACTIVITY] 20 - 25 November 2016

2016-11-25 Thread Peter Smith
Progress: [TCWG-940] LLD test failures on libcxx and libcxxabi - Reported bug upstream. Upstreamed a patch to LLD to add a sentinel value. This will mean that lld linked executables won't trigger the bug. [TCWG-901] Investigate LLD as a system linker on ARM - All the llvm and lld test failures

[ACTIVITY] 14 - 18 November 2016

2016-11-21 Thread Peter Smith
Progress: [TCWG-940] LLD test failures on libcxx and libcxxabi I think this is a latent bug in libunwind's .ARM.exidx table entry search that happens to be exposed by lld. Will try and make a reproducer using ld.bfd and report upstream if I'm correct. [TCWG-901] Investigate LLD as a system

[ACTIVITY] 31 Oct -- 04 Nov

2016-11-04 Thread Peter Smith
-- Activity -- [TCWG-683] Branch to undefined weak on aarch64 and arm Fix in upstream review, looks pretty close to being accepted. [TCWG-828] TLS support for static linking In upstream review but no comments as yet [TCWG-829] IFunc support In upstream review, but will probably need to be

[ACTIVITY] 5-9 December 2016

2016-12-12 Thread Peter Smith
Progress: TCWG-829 Ifunc support - Refactored implementation using synthetic sections upstreamed. Found out that x86 ifunc was broken and probably hadn't ever worked so I fixed that while I was there. PR31332 x86 pic plt sequences broken - Found out that x86 pic and pie is broken in lld, the

[ACTIVITY] 9 - 13 Jan 2017

2017-01-13 Thread Peter Smith
[TCWG-614] Long branch thunks: Implemented a prototype of the existing Thunk implementation using Synthetic (Linker created sections) and moved it close to the area it will need to go for Long Branch Thunk work. Worked on this exclusively all week. Plans for next week: [TCWG-614] Long branch

[ACTIVITY] 28 Nov to 2 Dec 2016

2016-12-05 Thread Peter Smith
-- Progress -- TCWG-829 IFunc support I have a downstream implementation of ifunc using synthetic sections that handles x86_64, ARM and AArch64. I think it may be a bit too complex to upstream in its current form but I think it is illustrative enough to post upstream for comment. TCWG-828 Static

[ACTIVITY] 20th - 24th March

2017-03-24 Thread Peter Smith
Achievements: [TCWG-614] Range extension Thunks - About 3 hours in total of rebasing due to upstream refactoring - Have finished the non-linkerscript tests and fixed all the bugs detected by them - Started the linkerscript tests, no problems found so far [TLS] - Some explanation to upstream of

[ACTIVITY] 27-31 March 2017

2017-03-31 Thread Peter Smith
[Eurollvm] Attended, we have recorded our thoughts in EuroLLVM 2017 Recap doc [TCWG-614] Range extension thunks - I've finished my downstream implementation, and have written almost all the lld tests I'd like to write - Still need to test on real large programs such as libclang.so - Made a start

[ACTIVITY] 13th Mar -- 17th Mar

2017-03-17 Thread Peter Smith
[TCWG-614] Range extension Thunks Worked all week on this. I've got a prototype that is nearly feature complete. It passes the existing tests when run in a single pass. I'm now trying to get it to run in multiple passes. Plans [TCWG-614] Range extension Thunks Start adding tests for the new

[ACTIVITY] 3 - 7 April 2017

2017-04-10 Thread Peter Smith
== Progress == [TCWG-614] Long Range Thunks - Posted for upstream review. I may have to do some refactoring of the address allocation first to unify the linker-script and non linker-script cases. - Started work on a prototype that fabricates linker script commands for the default non

[ACTIVITY] 10 - 14 April 2017

2017-04-13 Thread Peter Smith
[TCWG-614] Range Thunks - No review progress, blocked on a request for some refactoring to unify the address allocation. [TCWG-1088] Refactoring of address assignment - Found out that linker scripts can break ARM exceptions in the same way as they can break the thunk insertion - Made a prototype

[ACTIVITY] 19 - 21 April 2017

2017-04-21 Thread Peter Smith
3 day week,Monday and Tuesday off Achievements: [TCWG-614] Range Thunks - No review progress, blocked on a request for some refactoring to unify the address allocation. - Reworked my downstream patch stack in light of TCWG-1088 below. - Spent some time refactoring the code to try and make it

[ACTIVITY] March 2nd - March 3rd 2017

2017-03-03 Thread Peter Smith
2 day week: == Activity == [TCWG-617] Range extension thunks - rebased patch after coming back from holiday, took some time as quite a bit had changed, patch still in upstream review. - Have downstream patches to make inline thunks work with linker scripts, will post for review next week. ==

Re: Q: reasons for lack of support for C++ in OP-TEE?

2017-08-14 Thread Peter Smith
Hello Godmar, This is a very difficult question to answer as it will depend a lot on the constraints of the OP-TEE environment and what subset of the C++ language and libraries that the developers are willing to support. I can speak a little bit about generic support of C++ in embedded systems

[ACTIVITY] 10 - 14 July 2017

2017-07-17 Thread Peter Smith
[TCWG-614] Range Thunks Finally managed to get some review on the entirety of the Range Thunks patches. Have reorganised the patches and wrote some documentation to make it easier to review. Responded to all review comments so far. Compiler-rt A long tail of frustration. Managed to get a hello

[ACTIVITY] 3 - 7 July 2017

2017-07-10 Thread Peter Smith
Achievements: Some progress on Range Thunks. [TCWG-614] - I have all the enabling patches that allow assignAddresses() to be run multiple times committed. - Need review for the actual range thunks implementation itself. Compiler-rt [TCWG-1156] - Clang (as opposed to llvm) is assuming that all

[ACTIVITY] 26 - 30 June 2017

2017-07-03 Thread Peter Smith
== Activity == - Rebased and posted for review all my range-thunks work for LLD as there had been some interest from some individuals on IRC in trying out the patch. -- Seems to work for them -- Hoped that this might provoke upstream into looking and reviewing the patches but no such luck. -

[ACTIVITY] 24 - 28 July

2017-07-28 Thread Peter Smith
4 day week. [TCWG-614] Range Extension Thunks - Rebased due to upstream refactoring - Pinged but no upstream review progress [Compiler-rt] Clang no longer always uses base PCS for all the builtins it expands such as the _Complex helpers. - Added tests to make sure RTABI 4.1.2 Floating Point

[ACTIVITY] 8 - 12 May 2017

2017-05-15 Thread Peter Smith
Achievements: Spent all week on investigating a potential problem with the Gold --fix-cortex-a53-843419 erratum fix (The ADRP on 0xff8/0xffc boundary) - Managed to reproduce with a smaller example, although still using LTO - Diagnosed the cause of object with errata stubs being relocated after

[ACTIVITY] 19 - 23 June 2017

2017-06-26 Thread Peter Smith
[TCWG-614] Range extension thunks - No progress on upstream reviews from maintainers this week I have received some interest on IRC and on at least one of the reviews from other people wanting the feature so I'm hoping that this may speed up the process. - I've committed to rebasing and posting

[ACTIVITY] 22 - 26 May 2017

2017-05-30 Thread Peter Smith
Progress - Long range thunks Made some more progress on the refactoring needed to merge the representations for the script and non-script cases. Close to getting the .ARM.exidx sections converted. - Some thoughts on https://reviews.llvm.org/D33436 to do with ARM/Thumb interworking in the

[ACTIVITY] 29 May - 2 June 2017

2017-06-05 Thread Peter Smith
Progress - Long range thunks Committed a couple of refactorings on .ARM.exidf and SHF_LINK_ORDER support. With luck final patch for SHF_LINK_ORDER will be approved next week Submitted patches to convert existing Thunk Implementation to use InputSectionDescriptions. Hopefully these ones are

[ACTIVITY] 05 - 09 June 2017

2017-06-12 Thread Peter Smith
== Progress == LLD - Committed refactoring patches to enable long range thunks. This should unblock progress towards upstreaming patches. - Rebased and sent out for review first patches in series. Expecting slow but steady progress as I hope to not need much more large scale refactoring. == Plans

[ACTIVITY] 1 - 5 May 2017

2017-05-08 Thread Peter Smith
Progress: - Re-implemented range thunks based on recent upstream changes and sent for review. No comments as yet. This is likely to be an ongoing conversation with upstream that won't take all my time up so I've been looking at some additional stuff outside of range thunks. - Looked at PR28647 in

[ACTIVITY] report week ending 4th May

2018-05-04 Thread Peter Smith
[Activity] [TCWG-1384] - Implemented missing TLS LE relocations in LLD - Found out while testing that LLVM had the range check in locally resoloved fixups for Thumb2 BL wrong, and was not range checking B.w or Bcc.W at all. Patches submitted for review. [LLD] - Submitted extra test cases to

[ACTIVITY] week ending 27th April 2018

2018-04-27 Thread Peter Smith
Activity: [TCWG-1384] Add support for missing TLS local exec relocations tl LLD Have an implementation ready to go upstream next week. In process found that Gold and BFD disagreed on test output. Turns out that there was a bug in BFD, reviewed Renlin Li's patch for it. Took rather more of my time

[Activity] report week ending 11 May

2018-05-11 Thread Peter Smith
4 day week [TCWG-1236] Android on LLD Android team have switched to LLD by default for most modules. Looking to switch over the course of a release. I've been looking at the list of modules that don't work with LLD and investigating. - Sent some patches upstream to add some missing features

[ACTIVITY] Week ending 24th May

2018-05-24 Thread Peter Smith
Half of the week spent investigating identical code folding -icf=safe. Turns out that upstream have a proposal that is much further along so shifted focus on to doing as much as I can to help it along. Found out that for some use cases of AArch64 PIC the small code model is inappropriate as the

[ACTIVITY] report week ending 18 May

2018-05-18 Thread Peter Smith
[Activity] [TCWG-1319] Link AOSP with LLD. Closed this out as I've gone as far as I can profitably go without being an Android expert. - With trunk LLD I can now link and boot AOSP with LLD without any use_clang_lld=false on both Arm and AArch64 emulators. I also managed to get it to boot on a

[ACTIVITY] report week ending 8 June

2018-06-08 Thread Peter Smith
[ACTIVITY] - Landed D44928, we should pass the subtarget through to fixups and relaxation now. The only remaining use of the subtarget in the assembler backend is for writeNop(). Patches to fix that are upstream but I'm not hopeful that anyone will want to review them due to the cost/benefit. -

[ACTIVITY] week ending 15th June 2018

2018-06-15 Thread Peter Smith
TCWG-1319 ICF support in clang and lld - Reviewed LLD patches TCWG-1424 Investigate profile information for code-size - Spent some time tracking down problem with using perf=profile and run_under simultaneously. Posted patch upstream. - Investigated how llvm makes use of profile information and

[ACTIVITY] report week ending 1 Jun

2018-06-01 Thread Peter Smith
[ACTIVITY] Upstream reviews for LLD. Trying to be more proactive here now that there are fewer maintainers. [TCWG-1420] Initial investigation into some proposed linker enhancements for embedded systems - Mostly features already implemented in proprietary linkers such as AT and an equivalent to

[ACTIVITY] report week ending 29 June

2018-06-29 Thread Peter Smith
[TCWG-1424] Investigation into profile and size optimisations - Completed the pass and got it working on both the old and new pass managers - Spent quite a bit of time trying to understand how llvm classifies hot and cold functions, a lot of the details are not documented well or at all. - Found

[ACTIVITY] Weekly report for week 25

2018-06-22 Thread Peter Smith
[TCWG-1424] Profile guided information code size investigation. - Wrote up initial findings in Jira - Have written a pass that works with both the new and old pass manager that I can use to selectively add size optimisation attributes to functions. - Spent way too much time trying to work out

[ACTIVITY] report week ending 3 Aug

2018-08-03 Thread Peter Smith
[TCWG-1450] Support for Tag_ABI_VFP_args in LLD Needed by FreeBSD in order to switch to LLD for Arm. [TCWG-1451] Support for v5 and v6 Arm in LLD Tidied up and submitted patches for v5/v6 (branch encoding and compatible thunks), in upstream review. [TCWG] - Started doing some Jira gardening in

[ACTIVITY] week ending 27 July

2018-07-27 Thread Peter Smith
4 day week. [TCWG-1424] Investigate profile feedback on codesize Have now got all the data I need, started the process of tidying up scripts to analyse whether it is worth posting upstream and what the best default parameters are. [Misc] Track down problem on AArch64 build-bot to a likely

[ACTIVITY] week ending Aug 12 2018

2018-08-10 Thread Peter Smith
[TCWG-1424] Investigation into profile guided information for code size - Wrote script to process all the data from all the runs and correlate it with code size. - Now have some visualisations of some of the data that I can use to make sense of the output. - Next step is to prepare a presentation

[ACTIVITY] report week ending 17 Aug

2018-08-17 Thread Peter Smith
4 day week, out on holiday Wednesday. [TCWG Jira] - Recommendations made on what to do with outstanding epics. - Will be making the changes on Monday. [Linaro Connect] - Research for presentation on libtooling. - Outline of presentation written and made a start on the first of the examples. -

[ACTIVITY] report week ending Aug 24

2018-08-24 Thread Peter Smith
Investigated yet another sanitizer related buildbot failure. This time it looks like latent problems in the compiler-rt/cfi implementation and tests provoked by the introduction of the Arm LLD bot. - cfi requires LTO so it requires a bot using LLD or a bot configured to run gold with the LTO

[Activity] Week ending 19th July 2018

2018-07-19 Thread Peter Smith
[TCWG-1424] Using profile feedback to investigate code size - Have most of the information I need to draw some conclusions. Should have the remaining runs I need over the weekend. - Next step is to analyse the data a bit more formally and write up. - Discuss next steps. It may be worth polishing

Re: Abstract: My Other Machine is Virtual

2018-07-24 Thread Peter Smith
Hello Alex, Sorry for the late comments. I think that looks good to me as a proposal for Connect. I spotted a couple of typos that I've highlighted inline. Would it be worth mentioning if you are going to cover bare-metal system emulation or concentrate on Linux? Peter On 23 July 2018 at 15:07,

[ACTIVITY] Weekly report for week 36

2018-09-07 Thread Peter Smith
[Linaro Connect] - Wrote my presentation for the official track (on using Clang libtooling and ASTMatchers) - Started working on hackroom presentation on profile guided optimisation in LLVM. In both cases writing a presentation on something you don't know much about forces you do a lot of

[ACTIVITY] report week ending 6 Jul

2018-07-06 Thread Peter Smith
[TCWG-1368] Tracked down libfuzzer buildbot failures on aarch64 and raised PR [TCWG-1424] Use profile information for size optimisation - Decided to use clang's 2-stage PGO build as next experiment with compile times on the full test suite as the performance benchmarks - Spent rather too much time

[no subject]

2018-07-13 Thread Peter Smith
4 day week, on holiday monday Submitted a Linaro Connect presentation. [TCWG-1424] Investigate profile feedback for code-size Frustrating week trying to plug profile feedback into builds and benchmarks and get sensible results - First attempt was to use clang 2 stage pgo build -- New pass

[ACTIVITY] week ending 6th April 2018

2018-04-09 Thread Peter Smith
[TCWG-1375] Make sure MCSubtargetInfo is passed through to ARMAsmBackend functions Spent most of the week working on this and follow up patches. Have submitted a patch for the most important functions. Nearly have one ready for the correct Nop encoding, this is more complicated as Nops can be

[ACTIVITY] week ending 20th April 2018

2018-04-20 Thread Peter Smith
Progress: Monday Tuesday at Euro LLVM, trip report at https://collaborate.linaro.org/display/CR/20180416+EuroLLVM+2018 Found an example that shows that both gold and ld attempt to fix up illegal "by strict interpretation of ELF" local debug references to discarded local symbols from rejected

[ACTIVITY] 26-29 March 2018

2018-03-29 Thread Peter Smith
[LLVM] - Submitted fix for PR36542, tracked down problem to LLVM not considering the target triple of the MachineFunction when relaxing branch instructions. [TCWG-1375]. - A lot of investigation of a difference in inline assembly between GCC and LLVM, reviewed and approved upstream patch D44815. -

[ACTIVITY] report week ending 5th October

2018-10-05 Thread Peter Smith
[TCWG-1473] Fix -fno-integrated-as and -mbig-endian (Linux Kernel Build with clang) - Patch in upstream review [TCWG-1474] Fix out of range branch (CBZ) when -fimplicit-it (or -fno-integrated-as) and certain kinds of inline assembly - Patch in upstream review [TCWG-1424] Code-size investigations

[ACTIVITY] report week ending 12 Oct

2018-10-12 Thread Peter Smith
[TCWG-1473] Fix -fno-integrated-as and -mbig-endian (Linux Kernel Build with clang) - Needed some revision to handle linker emulation. Patch in upstream review [TCWG-1474] Fix out of range branch (CBZ) when -fimplicit-it (or -fno-integrated-as) and certain kinds of inline assembly - Committed

[ACTIVITY] week ending 18th October

2018-10-18 Thread Peter Smith
[LLVM-203] (was TCWG-1424, we've moved issues to a new project) Started writing up results to close out this investigation. - Reran some sample profiling test cases with a higher sample rate. - Investigated why some test cases exploded in code-size with LTO. - Got some results for thin LTO

[ACTIVITY] Week ending 26th October 2018

2018-10-26 Thread Peter Smith
[LLVM-203] Investigation into profiling and code-size optimizations - Collected the remaining data I needed over the weekend. - Wrote up report - Rebased patches on tip of trunk - Attached results and report to Jira issue. - A one line summary of the results is that if you are lucky you can get

[ACTIVITY] Week ending November 2nd 2018

2018-11-02 Thread Peter Smith
[LLVM-203] Code-Size investigation with PGO - Finished up the remain tasks and resolved the ticket. - Tidied up the patches and added tests so that I can potentially share them with other interested parties. -- Writing tests took a lot longer than I thought as it involves faking a profile and

[ACTIVITY] week ending 9th November 2018

2018-11-09 Thread Peter Smith
[LLVM-203] Using PGO for code size optimization Communicated results and shared patch with Google Android/ChromeOs and Fuchsia teams [LLD] Did some benchmarking of LLD against ld.bfd and ld.gold On some large applications like Mozilla and Chrome LLD can be up to 10 times faster. Patch review and

[ACTIVITY] report week ending 28 September

2018-09-28 Thread Peter Smith
[Connect] Wrote up Connect Report with notes of presentations and hack-rooms, for better or worse we have 20 pages of notes. Wrote up Jira discussion [TCWG-1468] Made an example of how to use cmake, clang, newlib and a gcc-embedded toolchain to build an example and run it on qemu. [TCWG-1473]

[Activity] week ending Friday 16th November

2018-11-16 Thread Peter Smith
LLD bug fixing and triage pr39678 Calculation of DT_PLTRELSZ with strange linker script. pr39662 Request to add more emulations pr39634 LTO and references from inline symbols D54474 Fix for incorrect relocation span out of ifunc review D54624 Redefinition of _GLOBAL_OFFSET_TABLE_