From: Andy Gross agr...@codeaurora.org
QUP from version 2.1.1 onwards, supports a new format of
i2c command tags. Tag codes instructs the controller to
perform a operation like read/write. This new tagging version
supports bam dma and transfers of more than 256 bytes without 'stop'
in between.
QUP cores can be attached to a BAM module, which acts as
a dma engine for the QUP core. When DMA with BAM is enabled,
the BAM consumer pipe transmitted data is written to the output FIFO
and the BAM producer pipe received data is read from the input FIFO.
With BAM capabilities, qup-i2c core can
The maintainers for mach-msm no longer have any plans to support
or test the platforms supported by this architecture[1]. Most likely
there aren't any active users of this code anyway, so let's
delete it and the associated drivers/code. We should probably merge
this as one big series through
This code is no longer used now that mach-msm has been removed.
Delete it.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Cc: David Brown dav...@codeaurora.org
Cc: Bryan Huntsman bry...@codeaurora.org
Cc: Daniel Walker dwal...@fifo99.com
Signed-off-by: Stephen Boyd sb...@codeaurora.org
---
This
Resending a v2 on behalf of Beeresh with comments from Daniel and Rob
addressed.
Beeresh Gopal (2):
drm/msm: update generated headers
drm/msm/mdp4: Support NV12MT format in mdp4
drivers/gpu/drm/msm/mdp/mdp4/mdp4.xml.h | 36 ---
From: Beeresh Gopal gbeer...@codeaurora.org
Using fb modifier flag, support NV12MT format in MDP4.
v2:
- rework the modifier's description [Daniel Vetter's comment]
- drop .set_mode_config() callback [Rob Clark's comment]
Signed-off-by: Beeresh Gopal gbeer...@codeaurora.org
Signed-off-by:
Kumar, Stephen, Andy,
Any comments on this patchset?
Thanks,
Lina
On Mon, Mar 02 2015 at 16:30 -0700, Lina Iyer wrote:
Hi,
This series of patches adds SCM cold boot clean up and support for warm boot
for QCOM quad core (and dual core) cpus.
v4 Changes:
- Added QCOM_SCM_CPU_DOWN_ prefix for
This config no longer exists now that mach-msm has been removed.
Delete it and the associated code.
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: David Brown dav...@codeaurora.org
Cc: Bryan Huntsman bry...@codeaurora.org
Cc: Daniel Walker dwal...@fifo99.com
Signed-off-by: Stephen Boyd
On 03/13/15 11:14, Daniel Lezcano wrote:
On 03/13/2015 07:09 PM, Stephen Boyd wrote:
This code is no longer used now that mach-msm has been removed.
Delete it.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Cc: David Brown dav...@codeaurora.org
Cc: Bryan Huntsman bry...@codeaurora.org
Cc:
From: Beeresh Gopal gbeer...@codeaurora.org
To avoid ambiguity rename FRAME_SIZE to
SSTILE_FRAME_SIZE
Signed-off-by: Beeresh Gopal gbeer...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp4/mdp4.xml.h | 36 +
1 file changed, 14 insertions(+), 22 deletions(-)
diff
Signed-off-by: Sricharan R sricha...@codeaurora.org
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index e265ec1..3f648ae 100644
---
qup_wait_writeready waits only on a output fifo empty event.
Change the same function to accept the event and data length
to wait as parameters. This way the same function can be used for
timeouts in otherplaces as well.
Signed-off-by: Sricharan R sricha...@codeaurora.org
---
QUP from version 2.1.1 onwards, supports a new format of
i2c command tags. Tag codes instructs the controller to
perform a operation like read/write. This new tagging version
supports and is required for adding bam dma capabilities.
v2 tags supports transfer of more than 256 bytes in a single
i2c
Signed-off-by: Sricharan R sricha...@codeaurora.org
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 3f648ae..1ec7ec5 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++
This device only exists on platforms under ARCH_QCOM, not
ARCH_MSM.
Cc: Yaniv Gardi yga...@codeaurora.org
Cc: Dov Levenglick d...@codeaurora.org
Cc: Christoph Hellwig h...@lst.de
Cc: David Brown dav...@codeaurora.org
Cc: Bryan Huntsman bry...@codeaurora.org
Cc: Daniel Walker dwal...@fifo99.com
This driver is orphaned now that mach-msm has been removed.
Delete it.
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: David Brown dav...@codeaurora.org
Cc: Bryan Huntsman bry...@codeaurora.org
Cc: Daniel Walker dwal...@fifo99.com
Signed-off-by: Stephen Boyd sb...@codeaurora.org
---
This
This code is no longer used now that mach-msm has been removed.
Delete it.
Cc: Felipe Balbi ba...@ti.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: linux-...@vger.kernel.org
Cc: David Brown dav...@codeaurora.org
Cc: Bryan Huntsman bry...@codeaurora.org
Cc: Daniel Walker
This driver is orphaned now that mach-msm has been removed.
Delete it.
Cc: David Brown dav...@codeaurora.org
Cc: Bryan Huntsman bry...@codeaurora.org
Cc: Daniel Walker dwal...@fifo99.com
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Alexandre Courbot gnu...@gmail.com
Signed-off-by: Stephen Boyd
This config no longer exists now that mach-msm has been removed.
Delete it and the associated code.
Cc: David S. Miller da...@davemloft.net
Cc: David Brown dav...@codeaurora.org
Cc: Bryan Huntsman bry...@codeaurora.org
Cc: Daniel Walker dwal...@fifo99.com
Signed-off-by: Stephen Boyd
This driver is orphaned now that mach-msm has been removed.
Delete it.
Cc: Ulf Hansson ulf.hans...@linaro.org
Cc: Chris Ball ch...@printf.net
Cc: David Brown dav...@codeaurora.org
Cc: Bryan Huntsman bry...@codeaurora.org
Cc: Daniel Walker dwal...@fifo99.com
Signed-off-by: Stephen Boyd
This dependency no longer exists now that mach-msm has been
removed. Delete it.
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: Alan Stern st...@rowland.harvard.edu
Cc: linux-...@vger.kernel.org
Cc: David Brown dav...@codeaurora.org
Cc: Bryan Huntsman bry...@codeaurora.org
Cc: Daniel Walker
This phy only exists on platforms under ARCH_QCOM, not ARCH_MSM.
Cc: Yaniv Gardi yga...@codeaurora.org
Cc: Dov Levenglick d...@codeaurora.org
Cc: Christoph Hellwig h...@lst.de
Cc: David Brown dav...@codeaurora.org
Cc: Bryan Huntsman bry...@codeaurora.org
Cc: Daniel Walker dwal...@fifo99.com
On 03/13/2015 07:09 PM, Stephen Boyd wrote:
This code is no longer used now that mach-msm has been removed.
Delete it.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Cc: David Brown dav...@codeaurora.org
Cc: Bryan Huntsman bry...@codeaurora.org
Cc: Daniel Walker dwal...@fifo99.com
Signed-off-by:
From: Beeresh Gopal gbeer...@codeaurora.org
To avoid ambiguity rename register
FRAME_SIZE to SSTILE_FRAME_SIZE.
Signed-off-by: Beeresh Gopal gbeer...@codeaurora.org
---
rnndb/mdp/mdp4.xml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/rnndb/mdp/mdp4.xml b/rnndb/mdp/mdp4.xml
The definition of i2c_msg says that
If this is the last message in a group, it is followed by a STOP.
Otherwise it is followed by the next @i2c_msg transaction segment,
beginning with a (repeated) START
So the expectation is that there is no 'STOP' bit inbetween individual
i2c_msg segments
WB and DSI support are in the pipe and will come out soon. Before that,
we need to prepare the MDP5 driver so we can support these connectors.
v2: rename macro to mdp5_cfg_intf_is_virtual() [pointed by Archit]
v3: add sanity check before writing in INTF_TIMING_ENGINE_EN registers
Note:
drm/msm:
I've checked this series with my local Kconfig checker (for no other
reason than that it removes board-sapphire.c and I had promised to do so
too a week ago).
On Fri, 2015-03-13 at 11:09 -0700, Stephen Boyd wrote:
--- a/arch/arm/mach-msm/Kconfig
+++ /dev/null
-config MSM_SMD
- bool
After
On 03/13/15 12:36, Paul Bolle wrote:
I've checked this series with my local Kconfig checker (for no other
reason than that it removes board-sapphire.c and I had promised to do so
too a week ago).
On Fri, 2015-03-13 at 11:09 -0700, Stephen Boyd wrote:
--- a/arch/arm/mach-msm/Kconfig
+++
On 03/13/15 12:55, Arnd Bergmann wrote:
On Friday 13 March 2015 11:09:33 Stephen Boyd wrote:
The maintainers for mach-msm no longer have any plans to support
or test the platforms supported by this architecture[1]. Most likely
there aren't any active users of this code anyway, so let's
delete
On Fri, Mar 13 2015 at 14:02 -0600, Andy Gross wrote:
On Thu, Mar 12, 2015 at 04:16:00PM -0600, Lina Iyer wrote:
snip
It looks like the remote side unlocks it too? It doesn't seem like this
will work with the framework very well. The framework has a kernel
spinlock attached to the hwspinlock
Hi,
Hi,
On 03/09/2015 06:41 PM, Stephane Viau wrote:
This change adds the hw configuration for msm8x16 chipsets in
mdp5_cfg module.
Note that only one external display interface is present in this
configuration (DSI) but has not been enabled yet. It will be enabled
once drm/msm driver
On Friday 13 March 2015 20:55:30 Arnd Bergmann wrote:
I think the MMC driver should also be removed when the platform
code is deleted, new code would use the mmci driver anyway.
Nevermind, I now see patch 6/12, which does just this.
Arnd
--
To unsubscribe from this list: send the
Some interfaces (WB, DSI Command Mode) need to be kicked off
through a START Signal. This signal needs to be sent at the right
time and requests in some cases to keep track of the pipeline
status (eg: whether pipeline registers are flushed AND output WB
buffers are ready, in case of WB interface).
DSI and WB interfaces need a more complex pipeline configuration
than the current mdp5_ctl_set_intf().
For example, memory output connections need to be selected for
WB. Interface mode (Video vs. Command modes) also need to be
configured for DSI.
This change takes care of configuring the whole
Up until now, we assume that eDP is tight to intf_0 and HDMI to
intf_3. This information shall actually come from the mdp5_cfg
module since it can change from one chip to another.
v2: rename macro to mdp5_cfg_intf_is_virtual() [pointed by Archit]
v3: add sanity check before writing in
Prepare for pipeline operation mode configuration, in particular
for DSI and WB modes.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 68 -
1 file changed, 33 insertions(+), 35 deletions(-)
diff --git
On Fri, Mar 13, 2015 at 02:27:45PM +0530, Vinod Koul wrote:
On Wed, Feb 11, 2015 at 11:46:05PM -0600, Andy Gross wrote:
+++ b/drivers/dma/qcom_adm.c
@@ -0,0 +1,901 @@
+/*
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
shouldn't this be 15 :)
yeah, need to
On Thu, Mar 12, 2015 at 04:16:00PM -0600, Lina Iyer wrote:
snip
It looks like the remote side unlocks it too? It doesn't seem like this
will work with the framework very well. The framework has a kernel
spinlock attached to the hwspinlock so when we lock the hwspinlock we
also lock the
On 03/13/2015 07:22 PM, Stephen Boyd wrote:
On 03/13/15 11:14, Daniel Lezcano wrote:
On 03/13/2015 07:09 PM, Stephen Boyd wrote:
This code is no longer used now that mach-msm has been removed.
Delete it.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Cc: David Brown dav...@codeaurora.org
Cc:
On Friday 13 March 2015 11:09:33 Stephen Boyd wrote:
The maintainers for mach-msm no longer have any plans to support
or test the platforms supported by this architecture[1]. Most likely
there aren't any active users of this code anyway, so let's
delete it and the associated drivers/code. We
On Fri, Mar 13, 2015 at 11:19:52PM +0530, Sricharan R wrote:
Signed-off-by: Sricharan R sricha...@codeaurora.org
---
Reviewed-by: Andy Gross agr...@codeaurora.org
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
DSI core registers in DSI6G are compatible with the old versions.
The offsets are 4-byte shift down because of the addition of a
HW_VERSION register. This difference will be handled in source code.
DSI PHY registers are incompatible. This change adds a new domain
for 28nm PHY and PHY regulator,
On Fri, Mar 13 2015 at 18:52 -0600, Kumar Gala wrote:
I’ve applied these to my ‘soc’ branch.
Great. Thank you.
-Lina.
- k
On Mar 13, 2015, at 12:16 PM, Lina Iyer lina.i...@linaro.org wrote:
Kumar, Stephen, Andy,
Any comments on this patchset?
Thanks,
Lina
On Mon, Mar 02 2015 at 16:30
I’ve applied these to my ‘soc’ branch.
- k
On Mar 13, 2015, at 12:16 PM, Lina Iyer lina.i...@linaro.org wrote:
Kumar, Stephen, Andy,
Any comments on this patchset?
Thanks,
Lina
On Mon, Mar 02 2015 at 16:30 -0700, Lina Iyer wrote:
Hi,
This series of patches adds SCM cold boot
This change adds the DSI connector support in msm drm driver.
Signed-off-by: Hai Li h...@codeaurora.org
---
drivers/gpu/drm/msm/Kconfig | 11 +
drivers/gpu/drm/msm/Makefile |4 +
drivers/gpu/drm/msm/dsi/dsi.c | 203
drivers/gpu/drm/msm/dsi/dsi.h |
This change adds the support in mdp5 kms driver for single
and dual DSI. Dual DSI case depends on the framework API
and sequence change to support dual data path.
Signed-off-by: Hai Li h...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 4 +
This change is to add an interface to MDP for connector devices
setting split display information.
Signed-off-by: Hai Li h...@codeaurora.org
---
drivers/gpu/drm/msm/msm_kms.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
DSI is supported by both mdp4 and mdp5. This patch series adds the common DSI
controller driver and also enable it in mdp5.
Hai Li (4):
drm/msm/dsi: Update generated DSI header file
drm/msm: Add split display interface
drm/msm: Initial add DSI connector support
drm/msm/mdp5: Enable DSI
+/ {
+ chosen {
+ stdout-path = blsp1_uart2;
+ };
It would be good if we had the configuration too (see
Documentation/devicetree/bindings/chosen.txt), as that avoids any
reliance on kernel defaults.
You can refer to an alias, so this could be:
aliases {
serial0 =
From: Kenneth Westfield kwest...@codeaurora.org
Define the LPASS platform driver, the LPASS
CPU DAI driver and the Storm machine driver
configurations, and how to build them.
Signed-off-by: Kenneth Westfield kwest...@codeaurora.org
Acked-by: Banajit Goswami bgosw...@codeaurora.org
---
On Wed, Feb 11, 2015 at 11:46:05PM -0600, Andy Gross wrote:
+++ b/drivers/dma/qcom_adm.c
@@ -0,0 +1,901 @@
+/*
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
shouldn't this be 15 :)
+/* ADM registers - calculated from channel number and security domain */
+#define
This patch adds MAINTAINERS to eeprom framework.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d66a97d..ee7ba92 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3657,6
This patch adds bindings for simple eeprom framework which allows eeprom
consumers to talk to eeprom providers to get access to eeprom cell data.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
[Maxime Ripard: intial version of eeprom framework]
Signed-off-by: Srinivas Kandagatla
This patch adds bindings for qfprom found in QCOM SOCs. QFPROM driver
is based on simple eeprom framework.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
.../devicetree/bindings/eeprom/qfprom.txt | 23 ++
1 file changed, 23 insertions(+)
This patch adds just providers part of the framework just to enable easy
review.
Up until now, EEPROM drivers were stored in drivers/misc, where they all had to
duplicate pretty much the same code to register a sysfs file, allow in-kernel
users to access the content of the devices they were
From: Maxime Ripard maxime.rip...@free-electrons.com
Now that we have the EEPROM framework, we can consolidate the common driver
code. Move the driver to the framework, and hopefully, it will fix the sysfs
file creation race.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
This patch adds QFPROM support driver which is used by other drivers
like thermal sensor and cpufreq.
On MSM parts there are some efuses (called qfprom) these fuses store things like
calibration data, speed bins.. etc. Drivers like cpufreq, thermal sensors would
read out this data for configuring
From: Kenneth Westfield kwest...@codeaurora.org
Add machine driver for the Storm board with the
IPQ806X SOC connected to the MAX98357A DAC.
Signed-off-by: Kenneth Westfield kwest...@codeaurora.org
Acked-by: Banajit Goswami bgosw...@codeaurora.org
---
sound/soc/qcom/storm.c | 162
From: Kenneth Westfield kwest...@codeaurora.org
Allow for the Qualcomm Technologies ASoC drivers
to build.
Signed-off-by: Kenneth Westfield kwest...@codeaurora.org
Acked-by: Banajit Goswami bgosw...@codeaurora.org
---
sound/soc/Kconfig | 1 +
sound/soc/Makefile | 1 +
2 files changed, 2
Thankyou all for providing inputs and comments on previous versions of this
patchset. Here is the v2 of the patchset addressing all the issues raised as
part of previous versions review.
This patchset adds a new simple EEPROM framework to kernel.
Up until now, EEPROM drivers were stored in
From: Kenneth Westfield kwest...@codeaurora.org
As the representation of the DSP in the device
tree has changed from a required subnode to an
optional phandle, modify the test for DSP
existence in the LPASS CPU DAI driver,
accordingly.
Signed-off-by: Kenneth Westfield kwest...@codeaurora.org
---
From: Kenneth Westfield kwest...@codeaurora.org
Change the representation of the audio DSP, in the
LPASS CPU bindings description, from a required
subnode to an optional phandle.
Signed-off-by: Kenneth Westfield kwest...@codeaurora.org
---
On Fri, Mar 13, 2015 at 11:55:07AM +0530, Archit Taneja wrote:
On 03/11/2015 08:47 PM, Daniel Vetter wrote:
On Wed, Mar 11, 2015 at 01:51:02PM +0530, Archit Taneja wrote:
On 03/10/2015 05:47 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015 at 03:52:41PM +0530, Archit Taneja wrote:
On
On 03/13/2015 02:36 PM, Daniel Vetter wrote:
On Fri, Mar 13, 2015 at 11:55:07AM +0530, Archit Taneja wrote:
On 03/11/2015 08:47 PM, Daniel Vetter wrote:
On Wed, Mar 11, 2015 at 01:51:02PM +0530, Archit Taneja wrote:
On 03/10/2015 05:47 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015 at
On 4 March 2015 at 20:32, Arnd Bergmann a...@arndb.de wrote:
There is no generic interface for resetting a clock, and
creating a reset driver for msm seems overkill, so this
moves the reset logic from the msm_sdcc driver into
a platform_data callback that calls into the clock driver.
This
On Fri, Mar 13, 2015 at 10:34:54AM +, Mark Rutland wrote:
Which of spin-table/psci are you planning on using for SMP support, and
when would that be likely to appear?
We have a qcom specific SMP enablement method for this device. This
was one of our first devices so it utilized
On 4 March 2015 at 20:32, Arnd Bergmann a...@arndb.de wrote:
The data mover code that got moved here from arch/arm was not
using the device model at all. This tries to retrofit it
passing the irq and mmio address using resources.
The approach is a little half-baked, but it still seems better
On 4 March 2015 at 20:32, Arnd Bergmann a...@arndb.de wrote:
The msm_sdcc driver is the only user of the proprietary msm
data mover interface. In order to simplify the multiplatform
conversion, this patch moves the entire data mover code into
the mmc driver.
If against our expectations any
On Mar 13, 2015, at 5:52 AM, Mark Rutland mark.rutl...@arm.com wrote:
+/ {
+chosen {
+stdout-path = blsp1_uart2;
+};
It would be good if we had the configuration too (see
Documentation/devicetree/bindings/chosen.txt), as that avoids any
reliance on kernel defaults.
Add initial device tree support for Qualcomm MSM8916 SoC and MTP8916
evaluation board. At the current time we only boot up a single processor.
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
v5:
* killed use of skeleton, moved to addr/size cells both being 2
* Added serial alias in prep of
On Fri, Mar 13, 2015 at 03:50:42PM +, Kumar Gala wrote:
On Mar 13, 2015, at 5:52 AM, Mark Rutland mark.rutl...@arm.com wrote:
+/ {
+ chosen {
+ stdout-path = blsp1_uart2;
+ };
It would be good if we had the configuration too (see
Some devices samples state of the chip select signal during power up
and act differently based on this state, so SPI core should ensure
that CS line is driven in non-active state after spi_setup().
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
drivers/spi/spi.c | 2 ++
1 file changed, 2
On Mar 13, 2015, at 11:25 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Fri, Mar 13, 2015 at 03:50:42PM +, Kumar Gala wrote:
On Mar 13, 2015, at 5:52 AM, Mark Rutland mark.rutl...@arm.com wrote:
+/ {
+ chosen {
+ stdout-path = blsp1_uart2;
+ };
It would be good if
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