3rd party HMAC SHA256 implementation has been added to the driver,
and since driver common code (mmc_cmds.c) includes calling to
routines and data structures that reside in these 3rd party files
(under 3rdparty\hmac_sha) these files should be compiled as well
in Android.mk makefile.
Change-Id:
Add the required hooks for the internal state of an interrupt
to be exposed to other subsystems.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
drivers/irqchip/irq-gic-v3.c | 83 +---
1 file changed, 70 insertions(+), 13 deletions(-)
diff --git
There is a number of cases where a kernel subsystem may want to
introspect the state of an interrupt at the irqchip level:
- When a peripheral is shared between virtual machines,
its interrupt state becomes part of the guest's state,
and must be switched accordingly. KVM on arm/arm64 requires
Add the required hooks for the internal state of an interrupt
to be exposed to other subsystems.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
drivers/irqchip/irq-gic.c | 69 ---
1 file changed, 65 insertions(+), 4 deletions(-)
diff --git
On 17/03/15 16:25, Stanimir Varbanov wrote:
+
+ spi4_sleep: spi4_sleep {
+ pinmux {
+ function = gpio;
+ pins = gpio12, gpio13, gpio14,
gpio15;
+
+
+
On 03/18/2015 02:26 PM, Srinivas Kandagatla wrote:
On 17/03/15 16:25, Stanimir Varbanov wrote:
+
+spi4_sleep: spi4_sleep {
+pinmux {
+function = gpio;
+pins = gpio12, gpio13, gpio14, gpio15;
+
+
+
From: Lee Susman lsus...@codeaurora.org
Adding debugfs capability for ufshcd.
debugfs attributes introduced in this patch:
- View driver/controller runtime data
- Command tag statistics for performance analisis
- Dump device descriptor info
- Track recoverable errors statistics during
Signed-off-by: Georgi Djakov georgi.dja...@linaro.org
---
drivers/clk/qcom/gcc-msm8974.c | 33 +
drivers/clk/qcom/mmcc-msm8974.c | 142 +--
2 files changed, 95 insertions(+), 80 deletions(-)
diff --git a/drivers/clk/qcom/gcc-msm8974.c
Signed-off-by: Georgi Djakov georgi.dja...@linaro.org
---
drivers/clk/qcom/gcc-ipq806x.c | 51 +++-
drivers/clk/qcom/lcc-ipq806x.c | 13 ++
2 files changed, 37 insertions(+), 27 deletions(-)
diff --git a/drivers/clk/qcom/gcc-ipq806x.c
Switch RCG functions to use of the newly introduced
parent_map struct.
Signed-off-by: Georgi Djakov georgi.dja...@linaro.org
---
drivers/clk/qcom/clk-rcg.c | 13 -
drivers/clk/qcom/clk-rcg.h |4 ++--
drivers/clk/qcom/clk-rcg2.c | 11 +++
3 files changed, 17
Define a parent_map struct to describe the relations between
PLL source index and register configuration value.
Add a qcom_find_src_index() function for finding the index of
a clock matching the specific PLL configuration
Signed-off-by: Georgi Djakov georgi.dja...@linaro.org
---
Signed-off-by: Georgi Djakov georgi.dja...@linaro.org
---
drivers/clk/qcom/gcc-msm8960.c | 35 +++---
drivers/clk/qcom/lcc-msm8960.c | 13 ++
drivers/clk/qcom/mmcc-msm8960.c | 53 +--
3 files changed, 57 insertions(+), 44
On Fri, Mar 13, 2015 at 7:09 PM, Stephen Boyd sb...@codeaurora.org wrote:
This driver is orphaned now that mach-msm has been removed.
Delete it.
Cc: David Brown dav...@codeaurora.org
Cc: Bryan Huntsman bry...@codeaurora.org
Cc: Daniel Walker dwal...@fifo99.com
Cc: Linus Walleij
Signed-off-by: Georgi Djakov georgi.dja...@linaro.org
---
drivers/clk/qcom/gcc-msm8660.c | 24 ++--
1 file changed, 14 insertions(+), 10 deletions(-)
diff --git a/drivers/clk/qcom/gcc-msm8660.c b/drivers/clk/qcom/gcc-msm8660.c
index f366e68f7316..e9fc9389f977 100644
---
On Wed, Mar 18 2015 at 00:05 -0600, Andy Gross wrote:
On Tue, Mar 17, 2015 at 04:33:40PM -0600, Lina Iyer wrote:
snip
Tested on: 8074, 8084.
These worked fine for me on IPQ8064 (ap148), however I did have to add my own DT
entries for the idle states and saw changes.
Also tested on
From: Dolev Raviv dra...@codeaurora.org
This patch exposes the ioctl interface for UFS driver via SCSI device
ioctl interface. As of now UFS driver would provide the ioctl for query
interface to connected UFS device.
Signed-off-by: Dolev Raviv dra...@codeaurora.org
Signed-off-by: Noa
Add trace events to driver to allow monitoring and profilig
of activities such as PM suspend/resume, hibernate enter/exit,
clock gating and clock scaling up/down.
In addition, add UFS host controller register dumps to provide
detailed information in case of errors to assist in analysis
of
This patchset introduces the parent_map index tables, which solve the
issue discussed here [1].
While doing this, fix also some of the code around (patches 1 and 2)
[1] https://lkml.org/lkml/2015/3/5/682
Patchset based on clk-next.
Georgi Djakov (9):
clk: qcom: Fix clk_get_parent function
Signed-off-by: Georgi Djakov georgi.dja...@linaro.org
---
drivers/clk/qcom/gcc-apq8084.c | 70 ---
drivers/clk/qcom/mmcc-apq8084.c | 178 +--
2 files changed, 134 insertions(+), 114 deletions(-)
diff --git a/drivers/clk/qcom/gcc-apq8084.c
According to the common clock framework API, the clk_get_parent() function
should return u8. Currently we are returning negative values on error. Fix
this and use the default parent in case of an error.
Signed-off-by: Georgi Djakov georgi.dja...@linaro.org
---
drivers/clk/qcom/clk-rcg.c | 26
Currently configure_bank() returns void. Add some error
checking on the regmap calls and propagate if there is
any error.
Signed-off-by: Georgi Djakov georgi.dja...@linaro.org
---
drivers/clk/qcom/clk-rcg.c | 62 +---
1 file changed, 41 insertions(+), 21
This patch adds support for the global clock controller found on the MSM8916
based devices. It allows the various device drivers to probe and control
their clocks and resets.
Signed-off-by: Georgi Djakov georgi.dja...@linaro.org
---
drivers/clk/qcom/Kconfig |8 +
This patch adds support for the global clock controller found on the MSM8916
based devices. It allows the various device drivers to probe and control
their clocks and resets.
Depends on this patchset: https://lkml.org/lkml/2015/3/18/318
Changes since v2:
* Addressed more comments from Stephen
Add clocks/resets defines for the global clock controller
found on Qualcomm MSM8916 SoCs.
Signed-off-by: Georgi Djakov georgi.dja...@linaro.org
---
.../devicetree/bindings/clock/qcom,gcc.txt |1 +
include/dt-bindings/clock/qcom,gcc-msm8916.h | 156
On Thu 12 Mar 12:55 PDT 2015, Lina Iyer wrote:
On Thu, Mar 12 2015 at 13:43 -0600, Andy Gross wrote:
On Thu, Mar 12, 2015 at 01:31:50PM -0600, Lina Iyer wrote:
On Fri, Feb 27 2015 at 15:30 -0700, Bjorn Andersson wrote:
[..]
Also, talking to Jeff it seems like that out of the 32 locks
On Wed, Mar 18 2015 at 09:56 -0600, Bjorn Andersson wrote:
On Thu 12 Mar 12:31 PDT 2015, Lina Iyer wrote:
On Fri, Feb 27 2015 at 15:30 -0700, Bjorn Andersson wrote:
Add driver for Qualcomm Hardware Mutex block found in many Qualcomm
SoCs.
Based on initial effort by Kumar Gala
On Thu 12 Mar 15:29 PDT 2015, Lina Iyer wrote:
On Fri, Feb 27 2015 at 15:30 -0700, Bjorn Andersson wrote:
Add driver for Qualcomm Hardware Mutex block found in many Qualcomm
SoCs.
Based on initial effort by Kumar Gala ga...@codeaurora.org
Signed-off-by: Bjorn Andersson
On Thu 12 Mar 12:31 PDT 2015, Lina Iyer wrote:
On Fri, Feb 27 2015 at 15:30 -0700, Bjorn Andersson wrote:
Add driver for Qualcomm Hardware Mutex block found in many Qualcomm
SoCs.
Based on initial effort by Kumar Gala ga...@codeaurora.org
Signed-off-by: Bjorn Andersson
On 11/24/14 02:38, Lee Jones wrote:
On Thu, 20 Nov 2014, Josh Cartwright wrote:
The IPQ8064 also includes an RPM following the same message structure as
other chips. In addition, it supports a few new resource types to
support the NSS fabric clocks and the SMB208/SMB209 regulators found on
On 11/24/14 02:38, Lee Jones wrote:
On Thu, 20 Nov 2014, Josh Cartwright wrote:
The IPQ8064 SoC has several RPM-controlled resources, an NSS fabrick
clock and four regulator resources. Provide definitions for them.
Signed-off-by: Josh Cartwright jo...@codeaurora.org
---
On 03/18/15 06:32, Georgi Djakov wrote:
This patchset introduces the parent_map index tables, which solve the
issue discussed here [1].
While doing this, fix also some of the code around (patches 1 and 2)
[1] https://lkml.org/lkml/2015/3/5/682
Patchset based on clk-next.
The concept looks
On Wed, Mar 18 2015 at 10:12 -0600, Bjorn Andersson wrote:
On Thu 12 Mar 15:29 PDT 2015, Lina Iyer wrote:
On Fri, Feb 27 2015 at 15:30 -0700, Bjorn Andersson wrote:
Add driver for Qualcomm Hardware Mutex block found in many Qualcomm
SoCs.
Based on initial effort by Kumar Gala
On Wed 18 Mar 09:45 PDT 2015, Lina Iyer wrote:
On Wed, Mar 18 2015 at 09:56 -0600, Bjorn Andersson wrote:
On Thu 12 Mar 12:31 PDT 2015, Lina Iyer wrote:
On Fri, Feb 27 2015 at 15:30 -0700, Bjorn Andersson wrote:
[..]
+#define QCOM_MUTEX_NUM_LOCKS 32
Also, talking to Jeff it seems
Hi Archit,
Thanks for your comments. Please see my response for some comments below.
Comments without response will be addressed in patch version 2. I will
wait for other comments if any to push patch V2.
+static int dsi_gpio_init(struct msm_dsi_host *msm_host)
+{
+int ret;
+
+
On Tue, Mar 17, 2015 at 04:33:40PM -0600, Lina Iyer wrote:
snip
Tested on: 8074, 8084.
These worked fine for me on IPQ8064 (ap148), however I did have to add my own DT
entries for the idle states and saw changes.
Also tested on APQ8064 (ifc6410).
Tested-by: Andy Gross
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