On 09/29, Rob Clark wrote:
> On Tue, Sep 29, 2015 at 5:38 PM, Stephen Boyd wrote:
> > On 09/29, Rob Clark wrote:
> >> diff --git a/drivers/firmware/qcom_scm-32.c
> >> b/drivers/firmware/qcom_scm-32.c
> >> index c1e4325..e1ac97f 100644
> >> --- a/drivers/firmware/qcom_scm-32.c
> >> +++ b/drivers/f
On Tue, Sep 29, 2015 at 5:38 PM, Stephen Boyd wrote:
> On 09/29, Rob Clark wrote:
>> diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c
>> index c1e4325..e1ac97f 100644
>> --- a/drivers/firmware/qcom_scm-32.c
>> +++ b/drivers/firmware/qcom_scm-32.c
>> @@ -500,6 +500,59 @@
On 09/29, Rob Clark wrote:
> diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c
> index c1e4325..e1ac97f 100644
> --- a/drivers/firmware/qcom_scm-32.c
> +++ b/drivers/firmware/qcom_scm-32.c
> @@ -500,6 +500,59 @@ int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req,
> u3
On 09/29, Rob Clark wrote:
> Add missing #include for types.h to have u32, etc. And fwd declare
> 'struct cpumask'.
>
> Signed-off-by: Rob Clark
> ---
We should change the arguments for the implementation too.
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On 09/29, Rob Clark wrote:
> Signed-off-by: Rob Clark
> ---
Reviewed-by: Stephen Boyd
--
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a Linux Foundation Collaborative Project
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the body of a mess
For now, since the GPU is the only upstream consumer, just stuff this
into drm/msm. Eventually if we have other consumers, we'll have to
split this out and make the allocation less hard coded. But I'll punt
on that until I better understand the non-gpu uses-cases (and whether
the allocation *real
Signed-off-by: Rob Clark
---
drivers/firmware/qcom_scm-32.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c
index e9c306b..c1e4325 100644
--- a/drivers/firmware/qcom_scm-32.c
+++ b/drivers/firmware/qcom_scm-
Update generated headers to pull in OCMEM register definitions.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a2xx.xml.h | 9 +-
drivers/gpu/drm/msm/adreno/a3xx.xml.h | 27 --
drivers/gpu/drm/msm/adreno/a4xx.xml.h | 15 ++--
drivers/gpu/drm/msm/adreno
Signed-off-by: Rob Clark
---
include/linux/qcom_scm.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
index c536b70..e407c0a 100644
--- a/include/linux/qcom_scm.h
+++ b/include/linux/qcom_scm.h
@@ -26,6 +26,8 @@ struct qcom_scm_hdcp_req {
Add interfaces needed for configuring OCMEM.
Signed-off-by: Rob Clark
---
drivers/firmware/qcom_scm-32.c | 53
drivers/firmware/qcom_scm-64.c | 16 +++
drivers/firmware/qcom_scm.c| 61 ++
drivers/firmware/qc
Add missing #include for types.h to have u32, etc. And fwd declare
'struct cpumask'.
Signed-off-by: Rob Clark
---
include/linux/qcom_scm.h | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
index 46d41e4..c536b70 100644
Updates for review comments, plus a couple misc qcom-scm fixes
>From original cover-letter:
For devices such as 8x74 and 8084, which have a separate OCMEM block
used by the GPU (and some other devices), rather than an internal GMEM
block inside the GPU, we need a driver to power up and configure
On Fri, 2015-09-25 at 00:27 +0100, Srinivas Kandagatla wrote:
> Hi Ivan,
> On 12/09/15 14:02, Ivan T. Ivanov wrote:
> > Hi,
> >
> > Following patches add DMA support for UARTDM type of hardware.
> >
> > Changes have been tested on UARTDM v1.3(APQ8064) and v1.4(APQ8016).
> >
> > Patches from Gur
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