> On Dec 16, 2015, at 12:18 PM, Ulf Hansson wrote:
>
> [...]
>
>>> It seems like a reasonable assumption that the controller can't cope
>>> with a higher clock rate than 100 MHz as "input" clock. That would
>>> then mean that there are different versions of the
ctually need them.
>
> Cc: <devicet...@vger.kernel.org>
> Cc: "Ivan T. Ivanov" <iiva...@mm-sol.com>
> Cc: Bjorn Andersson <bjorn.anders...@sonymobile.com>
> Signed-off-by: Stephen Boyd <sb...@codeaurora.org>
Thanks.
Acked-by: Ivan T. Ivanov <iivanov.
Make function naming consistent across this driver.
Also rename msm_irq to msm_uart_irq. No functional changes.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
Reviewed-by: Stephen Boyd <sb...@codeaurora.org>
---
drivers/tty/serial/msm_s
Add receive DMA support for UARTDM type of controllers.
Tested on APQ8064, which have UARTDM v1.3 and ADM DMA engine
and APQ8016, which have UARTDM v1.4 and BAM DMA engine.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
.../devicetree/bindings/serial/qcom,msm-uartdm.txt
Add transmit DMA support for UARTDM type of controllers.
Tested on APQ8064, which have UARTDM v1.3 and ADM DMA engine
and APQ8016, which have UARTDM v1.4 and BAM DMA engine.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
.../devicetree/bindings/serial/qcom,msm-uartdm.txt
UART controller is capable to perform transfers up to 4 Mbps.
Remove artificial 115.2 Kbps limitation.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
drivers/tty/serial/msm_serial.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drive
Hi,
This is second version of patches which DMA support for UARTDM type
of hardware found in Qualcomm chip sets.
Changes since v0 (https://lkml.org/lkml/2015/9/12/108):
* Fixed SysRq issue reported by Srini.
* Dropped [PATCH 3/7], which did not make any functional change.
Ivan T. Ivanov (4
From: Pramod Gurav <gpra...@codeaurora.org>
Replaces (1 << x) with BIT(x) macro
Signed-off-by: Pramod Gurav <gpra...@codeaurora.org>
Reviewed-by: Stephen Boyd <sb...@codeaurora.org>
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
driver
no bit setting as UART_IPR_RXSTALE_LAST for UART_DM core so do
it only for UART core.
Signed-off-by: Pramod Gurav <gpra...@codeaurora.org>
Reviewed-by: Stephen Boyd <sb...@codeaurora.org>
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
drivers/tty/
Make function naming consistent across this driver.
Also rename msm_irq to msm_uart_irq. No functional changes.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
Reviewed-by: Stephen Boyd <sb...@codeaurora.org>
---
drivers/tty/serial/msm_s
UART controller is capable to perform transfers up to 4 Mbps.
Remove artificial 115.2 Kbps limitation.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
drivers/tty/serial/msm_serial.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drive
On Wed, 2015-09-30 at 15:08 +0300, Ivan T. Ivanov wrote:
> Hi,
>
> This is second version of patches which DMA support for UARTDM type
> of hardware found in Qualcomm chip sets.
>
Please ignore this patch set. Wrong set of changes.
Sorry,
Ivan
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To unsubscribe from this list
On Wed, 2015-09-30 at 14:29 +0100, Mark Rutland wrote:
> On Wed, Sep 30, 2015 at 01:08:24PM +0100, Ivan T. Ivanov wrote:
> > Add transmit DMA support for UARTDM type of controllers.
> >
> > Tested on APQ8064, which have UARTDM v1.3 and ADM DMA engine
> > and APQ8
Add receive DMA support for UARTDM type of controllers.
Tested on APQ8064, which have UARTDM v1.3 and ADM DMA engine
and APQ8016, which have UARTDM v1.4 and BAM DMA engine.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
.../devicetree/bindings/serial/qcom,msm-uartdm.txt
Hi,
This is the third version of patches which add DMA support for UARTDM type
of hardware found in Qualcomm chip sets.
Changes since v0 (https://lkml.org/lkml/2015/9/12/108):
* Fixed SysRq issue reported by Srini.
* Dropped [PATCH 3/7], because it did not make functional change.
Ivan T
From: Pramod Gurav <gpra...@codeaurora.org>
Replaces (1 << x) with BIT(x) macro
Signed-off-by: Pramod Gurav <gpra...@codeaurora.org>
Reviewed-by: Stephen Boyd <sb...@codeaurora.org>
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
driver
On Fri, 2015-09-25 at 00:27 +0100, Srinivas Kandagatla wrote:
> Hi Ivan,
> On 12/09/15 14:02, Ivan T. Ivanov wrote:
> > Hi,
> >
> > Following patches add DMA support for UARTDM type of hardware.
> >
> > Changes have been tested on UARTDM v1.3(APQ8064) and
On Fri, 2015-09-25 at 00:27 +0100, Srinivas Kandagatla wrote:
> Hi Ivan,
> On 12/09/15 14:02, Ivan T. Ivanov wrote:
> > Hi,
> >
> > Following patches add DMA support for UARTDM type of hardware.
> >
> > Changes have been tested on UARTDM v1.3(APQ8064) and
> On Sep 19, 2015, at 2:33 AM, Stephen Boyd <sb...@codeaurora.org> wrote:
>
> On 09/12, Ivan T. Ivanov wrote:
>> Stale Event Enable command should be 5 not 8, fix this.
>>
>> Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
>> ---
>&g
Add DMA channels definitions for UART1 and UART2 controllers.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm891
/cgit/quic/kernel/agross-msm/
Ivan T. Ivanov (2):
arm64: dts: qcom: 8x16: UART1 add CTS_N, RTS_N pin configurations
arm64: dts: qcom: 8x16: UART1 and UART2 use DMA for RX and TX
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 13 +
arch/arm64/boot/dts/qcom/msm8916.dtsi | 4
Add devicetree bindings for UART1 CTS_N and RTS_N pins.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
b/arch
less for debug purposes.
Would following patch work for you? Of course it will be difficult
to guaranties that some other driver misbehave and touch non-existing
register, right?
Regards,
IvanFrom d7c9c59b7134f093cf3f829832f4f7771a65664e Mon Sep 17 00:00:00 2001
From: "Ivan T. Ivanov" <ivan
On Fri, 2015-01-23 at 16:19 -0800, Bjorn Andersson wrote:
> From: Courtney Cavin ca...@sonymobile.com>
>
> Signed-off-by: Courtney Cavin ca...@sonymobile.com>
> Signed-off-by: Bjorn Andersson anders...@sonymobile.com>
>
>
> +config INPUT_PM8941_PWRKEY
> + tristate "Qualcomm PM8941
From: Pramod Gurav <gpra...@codeaurora.org>
Replaces (1 << x) with BIT(x) macro
Signed-off-by: Pramod Gurav <gpra...@codeaurora.org>
Reviewed-by: Stephen Boyd <sb...@codeaurora.org>
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
driver
UART controller is capable to perform transfers up to 4 Mbps.
Remove artificial 115.2 Kbps limitation.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
drivers/tty/serial/msm_serial.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drive
Add devicetree bindings for UART1 pins and device
controller with DMA channel specifiers.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 29 +
arch/arm64/boot/dts/qcom/msm8916.dtsi | 12 +
Add receive DMA support for UARTDM type of controllers.
Tested on APQ8064, which have UARTDM v1.3 and ADM DMA engine
and APQ8016, which have UARTDM v1.4 and BAM DMA engine.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
.../devicetree/bindings/serial/qcom,msm-uartdm.txt
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index f10ff7a2d0e3..6874221ec355 100644
--- a/arch/arm64/bo
Make function naming consistent across this driver.
No functional changes.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
drivers/tty/serial/msm_serial.c | 38 +++---
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/drivers/tty/
Add transmit DMA support for UARTDM type of controllers.
Tested on APQ8064, which have UARTDM v1.3 and ADM DMA engine
and APQ8016, which have UARTDM v1.4 and BAM DMA engine.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
.../devicetree/bindings/serial/qcom,msm-uartdm.txt
Stale Event Enable command should be 5 not 8, fix this.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
drivers/tty/serial/msm_serial.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/tty/serial/msm_serial.h b/drivers/tty/serial/msm_serial.h
T. Ivanov (5):
tty: serial: msm: Fix command Stale Event Enable definition
tty: serial: msm: Add msm prefix to all driver functions
tty: serial: msm: Add TX DMA support
tty: serial: msm: Add RX DMA support
tty: serial: msm: Remove 115.2 Kbps maximum baud rate limitation
Pramod Gurav (2
no bit setting as UART_IPR_RXSTALE_LAST for UART_DM core so do
it only for UART core.
Signed-off-by: Pramod Gurav <gpra...@codeaurora.org>
Reviewed-by: Stephen Boyd <sb...@codeaurora.org>
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
drivers/tty/
ction")
Reported-by: Tim Bird <tim.b...@sonymobile.com>
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
Patch reworked to use new extcon API.
drivers/usb/phy/phy-msm-usb.c | 25 -
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/d
On Mon, 2015-08-24 at 10:11 -0700, Tim Bird wrote:
> On 08/18/2015 12:56 AM, Ivan T. Ivanov wrote:
> > Right now even if driver failed to probe extcon framework will
> > still deliver its VBUS and ID events, which will lead to random
> > exception codes.
> >
>
[un]register_interest and reading cable state by
name have been deprecated. Switch to new API.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
drivers/usb/phy/phy-qcom-8x16-usb.c | 21 +++--
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/drive
On recent Qualcomm platforms VBUS and ID lines are not routed to
USB PHY LINK controller. Use extcon framework to receive connect
and disconnect ID and VBUS notification.
Signed-off-by: Ivan T. Ivanov <ivan.iva...@linaro.org>
---
Changes sice v3 [1]:
* Migrate to new extcon framewo
On Fri, 2015-06-05 at 17:26 +0800, Peter Chen wrote:
> On Fri, Jun 05, 2015 at 10:37:07AM +0300, Ivan T. Ivanov wrote:
>
> > > > +
> > > > +static int ci_id_notifier(struct notifier_block *nb, unsigned long
> > > > event,
> > >
On Wed, 2015-08-26 at 12:35 -0700, Stephen Boyd wrote:
> This doesn't match the binding, and the driver doesn't look to
> be using it. Remove the extra element.
>
> CC: Ivan T. Ivanov iva...@linaro.org>
> Signed-off-by: Stephen Boyd <sb...@codeaurora.org>
Acked-by:
detection)
Reported-by: Tim Bird tim.b...@sonymobile.com
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/usb/phy/phy-msm-usb.c | 26 +-
1 file changed, 17 insertions(+), 9 deletions(-)
diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm
On Mon, 2015-08-17 at 16:46 -0700, Tim Bird wrote:
Sorry - I mistyped Ivan's e-mail the first time.
On 08/17/2015 04:43 PM, Tim Bird wrote:
Ivan,
I'm seeing a bug in the phy-msm-usb.c code, when I get an EPROBE defer
during probing the driver.
The code is statically linked in the
On Wed, 2015-07-29 at 12:10 -0700, Tim Bird wrote:
On Tue, Jun 2, 2015 at 6:14 AM, Ivan T. Ivanov iva...@linaro.org wrote:
On recent Qualcomm platforms VBUS and ID lines are not routed to
USB PHY LINK controller. Use extcon framework to receive connect
and disconnect ID and VBUS
Hi Sricharan,
On Thu, 2015-07-09 at 08:55 +0530, Sricharan R wrote:
static int qup_i2c_read_one(struct qup_i2c_dev *qup, struct i2c_msg *msg)
{
- unsigned long left;
- int ret;
+ int ret = 0;
- qup-msg = msg;
- qup-pos = 0;
+ /*
+
Hi,
On Thu, 2015-07-09 at 08:55 +0530, Sricharan R wrote:
snip
#define ONE_BYTE 0x1
+#define QUP_I2C_MX_CONFIG_DURING_RUN BIT(31)
struct qup_i2c_block {
int count;
@@ -121,6 +122,7 @@ struct qup_i2c_block {
int rx_tag_len;
int
Hi Sricharan,
On Thu, 2015-07-09 at 08:55 +0530, Sricharan R wrote:
QUP cores can be attached to a BAM module, which acts as a dma engine for the
QUP core. When DMA with BAM is enabled, the BAM consumer pipe transmitted data
is written to the output FIFO and the BAM producer pipe received
Qualcomm Debug Subsystem clock is used by CoreSight components.
Add required definitions for it. qcom_rpm_resource::status_id is
not used by driver, so just mark it as ~0.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
Changes since first version:
* Use ~0 initializer for status_id
apq8016-sbc board is using Dual SPDT USB Switch (TC7USB40MU),
witch is controlled by GPIO to de/multiplex D+/D- USB lines to
USB2513B Hub and uB connector. Add support for this.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
.../devicetree/bindings/usb/msm-hsusb.txt | 4
On Mon, 2015-07-06 at 13:33 -0700, Bjorn Andersson wrote:
On Mon 18 May 07:35 PDT 2015, Ivan T. Ivanov wrote:
Qualcomm Debug Subsystem clock is used by CoreSight components.
Add required definitions for it.
Signed-off-by: Ivan T. Ivanov iva...@linaro.org
Sorry for the slow response
/gmane.linux.kernel.mmc/32875
Ivan T. Ivanov (3):
mmc: sdhci: let GPIO based card detection have higher precedence
mmc: sdhci: don't use card state polling when CD GPIO is defined
mmc: sdhci: properly check card present state when quirk
NO_CARD_NO_RESET is set
drivers/mmc/host/sdhci.c | 20
There is no reason to use polling for card detection state change when
drivers are using dedicated GPIO for this. Don't poll in this case.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/mmc/host/sdhci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Ensure SDCC is working with maximum clock otherwise card
detection could be extremely slow, up to 7 seconds.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
Reviewed-by: Georgi Djakov georgi.dja...@linaro.org
Acked-by: Stephen Boyd sb...@codeaurora.org
---
Changes since v0:
- s/falied
Controller could have BROKEN_CARD_DETECTION quirk set, but drivers
could use GPIO to detect card present state. Let, when defined, GPIO
take precedence, so drivers could properly detect card state and not
use polling.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/mmc/host
Controller could have both NO_CARD_NO_RESET and BROKEN_CARD_DETECTION
quirks set. Use sdhci_do_get_cd() when applying NO_CARD_NO_RESET, which
properly check for BROKEN_CARD_DETECTION quirk.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/mmc/host/sdhci.c | 3 +--
1 file changed
Following changes aimed to fix some aspects of card detection, when
BROKEN_CARD_DETECTION quirk is set.
Ivan T. Ivanov (3):
mmc: sdhci: let GPIO based card detection have higher precedence
mmc: sdhci: don't use card state polling when CD GPIO is defined
mmc: sdhci: properly check card
Controller could have BROKEN_CARD_DETECTION quirk set, but drivers
could use GPIO to detect card present state. Let, when defined, GPIO
take precedence, so drivers could properly detect card state and not
use polling.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/mmc/host
There is no reason to use polling for card detection state change when
drivers are using dedicated GPIO for this. Don't poll in this case.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/mmc/host/sdhci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Ensure SDCC is working with maximum clock otherwise card
detection could be extremely slow, up to 7 seconds.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/mmc/host/sdhci-msm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc
On Fri, 2015-06-26 at 19:31 +0900, Jaehoon Chung wrote:
Hi, Ivan.
On 06/26/2015 07:00 PM, Ivan T. Ivanov wrote:
Following changes aimed to fix some aspects of card detection, when
BROKEN_CARD_DETECTION quirk is set.
As i know, when there is no card detection scheme
On Fri, 2015-06-26 at 14:09 +0300, Adrian Hunter wrote:
On 26/06/15 14:00, Ivan T. Ivanov wrote:
On Fri, 2015-06-26 at 13:19 +0300, Adrian Hunter wrote:
On 26/06/15 13:00, Ivan T. Ivanov wrote:
Controller could have BROKEN_CARD_DETECTION quirk set, but drivers
could use GPIO
On Fri, 2015-06-26 at 14:34 +0300, Georgi Djakov wrote:
On 06/26/2015 02:16 PM, Ivan T. Ivanov wrote:
Ensure SDCC is working with maximum clock otherwise card
detection could be extremely slow, up to 7 seconds.
Signed-off-by: Ivan T. Ivanov iva...@linaro.org
---
drivers/mmc/host
Hi Bjorn,
On Wed, 2015-06-17 at 23:47 -0700, Bjorn Andersson wrote:
This introduces pinctrl drivers for gpio and mpp blocks found in family A
PMICs.
+
+static struct platform_driver pm8xxx_gpio_driver = {
+ .driver = {
+ .name = pm8xxx_gpio,
Name of the SPMI based
Hi Bjorn,
On Wed, 2015-06-17 at 23:47 -0700, Bjorn Andersson wrote:
When the MPP is configured for analog output the output level is selected by
the AOUT_CTL register, this patch makes it possible to control this.
snip
}
@@ -748,6 +765,10 @@ static int pmic_mpp_populate(struct
-by: Ivan T. Ivanov iiva...@mm-sol.com
--
To unsubscribe from this list: send the line unsubscribe linux-arm-msm in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Following patches add configuration nodes for SPI, I2C, USB and SDHC devices
found in msm8916 and related pinctrl definitions. Also several GPIO have been
incorrectly assigned and are fixed now. LED control devices for apq 8016-sbc
board are added.
Regards,
Ivan
Ivan T. Ivanov (6):
arm64: dts
Create separate file for MSM8916 pinctrl default/sleep pins state
definitions. Move in UART2 states and add SPI, I2C and SDC configurations.
Signed-off-by: Stanimir Varbanov stanimir.varba...@linaro.org
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
Signed-off-by: Ivan T
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
Add sdhci1 and sdhci2 device configuration nodes.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 34
Add device nodes for SPI1, SPI2, SPI3, I2C4, SPI5, SPI6 and
BAM(DMA) engine connected to them.
Signed-off-by: Stanimir Varbanov stanimir.varba...@linaro.org
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 128 ++
1
-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
.../arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 22 --
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
index
Add Host, Device and OTG configuration nodes.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom
Hogging pins from pinctrl driver prevents client drivers
to probe.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 3 ---
arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi | 3 ---
2 files changed, 6 deletions(-)
diff --git a/arch
Hi Stephane,
On Mon, 2015-06-01 at 16:28 -0400, Stephane Viau wrote:
Some targets (eg: msm8994) use the pinctrl framework to configure
interface pins. This change adds support for initialization and
pinctrl active/sleep state control for the HDMI driver.
Signed-off-by: Stephane Viau
On Tue, 2015-06-02 at 10:12 -0500, Stéphane Viau wrote:
Hi Ivan,
Hi Stephane,
On Mon, 2015-06-01 at 16:28 -0400, Stephane Viau wrote:
Some targets (eg: msm8994) use the pinctrl framework to configure
interface pins. This change adds support for initialization and
pinctrl
Hi Stephane,
On Fri, 2015-05-29 at 09:49 -0400, Stephane Viau wrote:
Some targets (eg: msm8994) use the pinctrl framework to configure
interface pins. This change adds support for initialization and
pinctrl active/sleep state control for the HDMI driver.
Signed-off-by: Stephane Viau
On Wed, 2015-04-15 at 16:35 +0300, Ivan T. Ivanov wrote:
On recent Qualcomm platforms VBUS and ID lines are not routed to
USB PHY LINK controller. Use extcon framework to receive connect
and disconnect ID and VBUS notification.
Signed-off-by: Ivan T. Ivanov iva...@linaro.org
---
Changes
Add Qualcomm's PTM v1.1 peripheral ID to supported devices.
This device could be found at least in MSM8974 and APQ8064
chipsets.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
Changes since v1:
- s/PFT/PTM/ to describe device and not protocol implementation
drivers/hwtracing
On Thu, 2015-05-21 at 08:10 -0600, Mathieu Poirier wrote:
On 20 May 2015 at 09:02, Ivan T. Ivanov iva...@linaro.org wrote:
Add Qualcomm's PFT v1.1 peripheral ID to supported devices.
This device could be found at least in MSM8974 and APQ8064
chipsets.
Signed-off-by: Ivan T. Ivanov iva
, to reflect supported replicator
version
* Add comment how replicator output port is disabled.
[1] http://www.spinics.net/lists/arm-kernel/msg412873.html
[2] https://lwn.net/Articles/641585/
[3] https://lkml.org/lkml/2015/4/29/241
Ivan T. Ivanov (1):
arm64: dts: qcom: Add msm8916 CoreSight
: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
Changes since v0:
* Add note to patch description that also commit e507bf577e5a is reverted.
drivers/usb/host/ehci-msm.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git
Hi Rajendra,
On Apr 23, 2015, at 11:45 AM, Rajendra Nayak rna...@codeaurora.org wrote:
Remove all clock handling from the driver as this is not handled from
within platform runtime callbacks.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
---
drivers/i2c/busses/i2c-qup.c | 74
On Thu, 2015-04-09 at 11:34 +0300, Ivan T. Ivanov wrote:
On recent Qualcomm platforms VBUS and ID lines are not routed to
USB PHY LINK controller. Use extcon framework to receive connect
and disconnect ID and VBUS notification.
Signed-off-by: Ivan T. Ivanov iva...@linaro.org
Hi Felipe
This reverts commit 70843f623b58 (usb: host: ehci-msm: Use
devm_ioremap_resource instead of devm_ioremap), because msm_otg
and this driver are using same address space to access AHB mode
and USB command registers.
Cc: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Ivan T. Ivanov ivan.iva
On Tue, 2015-04-21 at 16:46 +0530, Vivek Gautam wrote:
Hi,
On Tuesday, April 21, 2015 12:41 PM Ivan T. Ivanov
iva...@linaro.org wrote:
This reverts commit 70843f623b58 (usb: host: ehci-msm: Use
devm_ioremap_resource instead of devm_ioremap), because msm_otg
and this driver are using
On Tue, 2015-04-21 at 11:04 -0400, Alan Stern wrote:
On Tue, 21 Apr 2015, Ivan T. Ivanov wrote:
This reverts commit 70843f623b58 (usb: host: ehci-msm: Use
devm_ioremap_resource instead of devm_ioremap), because msm_otg
and this driver are using same address space to access AHB mode
Add the restart node so we can reboot the device.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 92c96eb
), with multiple inputs
* Thermal sensor device, which is using on chip VADC
channel report PMIC die temperature.
* Power key device, which is responsible for clean system
reboot or shutdown
* RTC device
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
Add SPMI PMIC Arbiter configuration nodes for MSM8916.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm8916
for clean system
reboot or shutdown
* White LED device
* RTC device
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm/boot/dts/qcom-pm8941.dtsi | 133 -
1 file changed, 132 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-pm8941
in the interrupt bidings.
Patches are created top of Kumar's kernel tree and tags/qcom-dt-for-4.1 [1].
[1] https://lkml.org/lkml/2015/3/27/599
[2] http://comments.gmane.org/gmane.linux.ports.arm.msm/12610
Ivan T. Ivanov (7):
ARM: dts: qcom: Add PM8841 functions device nodes
ARM: dts: qcom: Add
Add configuration nodes for multi purpose pins and
thermal sensor devices. Thermal sensor will report
PMIC die temperature.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm/boot/dts/qcom-pm8841.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm
On Thu, 2015-04-16 at 10:42 +0300, Ivan T. Ivanov wrote:
Hi,
On Wed, 2015-04-15 at 21:28 +0530, Vivek Gautam wrote:
On Thu, Apr 9, 2015 at 8:19 PM, Alan Stern st...@rowland.harvard.edu
wrote:
On Thu, 9 Apr 2015, Ivan T. Ivanov wrote:
This allow same IO space to be shared
Add initial device configuration nodes for APQ8016 and PM8916 GPIO's.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
.../arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 30 ++
arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi | 21 +++
arch/arm64/boot
Add configuration nodes for following devices:
* GPIO block, with 22 pins
* MPP block, with 8 pins
* Volatage ADC (VADC), with multiple inputs
* Thermal sensor device, which is using on chip VADC
channel report PMIC die temperature.
* RTC device
Signed-off-by: Ivan T. Ivanov ivan.iva
On Mon, 2015-04-20 at 10:14 -0400, Alan Stern wrote:
On Mon, 20 Apr 2015, Ivan T. Ivanov wrote:
Hi Alan,
Perhaps I have to resend this patch with updated commit
message? Are they any other obstacles?
Instead of submitting this new patch, would it be okay to revert commit
With 'dx' equal to 0.625V and 15 bit ADC, calculations overflow
when difference against GND is ~20% of the ADC range. Fix this.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/iio/adc/qcom-spmi-vadc.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git
Pin direction configuration was incorrectly overwritten
by output and function values in set_mux(). Fix this.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 1 +
drivers/pinctrl/qcom/pinctrl-spmi-mpp.c | 1 +
2 files changed, 2 insertions
Hi Sricharan,
On Wed, 2015-04-15 at 20:14 +0530, Sricharan R wrote:
+#define QUP_I2C_MX_CONFIG_DURING_RUN BIT(31)
Could you explain what is this for?
This is a new feature in the V2 version of the controller,
to support multiple i2c sub transfers
Hi,
On Wed, 2015-04-15 at 21:28 +0530, Vivek Gautam wrote:
On Thu, Apr 9, 2015 at 8:19 PM, Alan Stern st...@rowland.harvard.edu wrote:
On Thu, 9 Apr 2015, Ivan T. Ivanov wrote:
This allow same IO space to be shared between HCD and Device
controller driver. Which can be loaded
On recent Qualcomm platforms VBUS and ID lines are not routed to
USB PHY LINK controller. Use extcon framework to receive connect
and disconnect ID and VBUS notification.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
Changes since v0 [1], as per Peter Chen suggestions:
* Moved
Hi Robert,
On Wed, 2015-04-15 at 16:11 +0200, Robert Baldyga wrote:
Hi Ivan,
On 04/15/2015 03:35 PM, Ivan T. Ivanov wrote:
On recent Qualcomm platforms VBUS and ID lines are not routed to
USB PHY LINK controller. Use extcon framework to receive connect
and disconnect ID and VBUS
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