Re: [PATCH v8 2/9] nvmem: Add a simple NVMEM framework for consumers

Thanks Stefan, On 21/07/15 17:25, Stefan Wahren wrote: + + addr = of_get_property(cell_np, reg, len); + if (!addr || (len 2 * sizeof(int))) { I'm not sure, but shouldn't be sizeof(u32) more portable? yes it makes sense, I will change it. [...] + + addr = of_get_property(cell_np, bits,

[PATCH v6 11/13] clk: qcom: gdsc: Add GDSCs in apq8084 GCC

Add the GDSC instances that exist as part of apq8084 GCC block Signed-off-by: Rajendra Nayak rna...@codeaurora.org --- drivers/clk/qcom/Kconfig | 1 + drivers/clk/qcom/gcc-apq8084.c | 42 include/dt-bindings/clock/qcom,gcc-apq8084.h

[PATCH v6 10/13] clk: qcom: gdsc: Add GDSCs in msm8974 MMCC

From: Stephen Boyd sb...@codeaurora.org Add the GDSC instances that exist as part of msm8974 MMCC block Signed-off-by: Stephen Boyd sb...@codeaurora.org Signed-off-by: Rajendra Nayak rna...@codeaurora.org --- drivers/clk/qcom/Kconfig | 1 + drivers/clk/qcom/mmcc-msm8974.c

[PATCH v6 08/13] clk: qcom: gdsc: Add GDSCs in msm8916 GCC

Add all data for the GDSCs which are part of msm8916 GCC block. Signed-off-by: Rajendra Nayak rna...@codeaurora.org --- drivers/clk/qcom/Kconfig | 1 + drivers/clk/qcom/gcc-msm8916.c | 52

[PATCH v6 12/13] clk: qcom: gdsc: Add GDSCs in apq8084 MMCC

From: Stephane Viau sv...@codeaurora.org Add the GDSC instances that exist as part of apq8084 MMCC block. Signed-off-by: Stephane Viau sv...@codeaurora.org Signed-off-by: Rajendra Nayak rna...@codeaurora.org --- drivers/clk/qcom/Kconfig | 1 +

[PATCH v6 13/13] arm: dts: qcom: Add #power-domain-cells property

msm8974 has gcc and mmcc nodes, and apq8084 has a gcc node which implement gdsc powerdomains. Add the #power-domain-cells property to them. Signed-off-by: Rajendra Nayak rna...@codeaurora.org --- arch/arm/boot/dts/qcom-apq8084.dtsi | 1 + arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++

RE: [RFC PATCH 1/4] iommu/arm-smmu: Init driver using IOMMU_OF_DECLARE

Hi Will, -Original Message- From: Will Deacon [mailto:will.dea...@arm.com] Sent: Tuesday, July 21, 2015 8:33 PM To: Sricharan R Cc: linux-arm-ker...@lists.infradead.org; io...@lists.linux-foundation.org; devicet...@vger.kernel.org; linux-arm-msm@vger.kernel.org;

[PATCH v6 02/13] clk: qcom: gdsc: Prepare common clk probe to register gdscs

The common clk probe registers a clk provider and a reset controller. Update it to register a genpd provider using the gdsc data provided by each platform. Signed-off-by: Rajendra Nayak rna...@codeaurora.org --- drivers/clk/qcom/common.c | 16 +++- drivers/clk/qcom/common.h | 2 ++

[PATCH v6 06/13] clk: qcom: gdsc: Add support for Memory RET/OFF

Along with the GDSC power switch, there is additional control to either retain all memory (core and peripheral) within a given powerdomain or to turn them off while the GDSC is powered down. Add support for these by modelling a RET state where all memory is retained and an OFF state where all

[PATCH v6 01/13] clk: qcom: Add support for GDSCs

From: Stephen Boyd sb...@codeaurora.org GDSCs (Global Distributed Switch Controllers) are responsible for safely collapsing and restoring power to peripherals in the SoC. These are best modelled as power domains using genpd and given the registers are scattered throughout the clock controller

[PATCH v6 05/13] clk: qcom: gdsc: Enable an RCG before turing on the gdsc

Some gdsc instances require a certain root clock (RCG) to be turned on *before* the power domain itself can be turned on. Handle this as part of the gdsc enable/disable callbacks. Signed-off-by: Rajendra Nayak rna...@codeaurora.org --- drivers/clk/qcom/gdsc.c | 20 +++-

[PATCH v6 00/13] qcom: Add support for GDSCs

GDSCs (Global Distributed Switch Controllers) control switches that supply power to an on-chip power domain and hence can be programmed in SW to safely power collapse and restore power to the respective PDs. They are part of a considerable number of recent QCOM SoCs (This series adds support for

[PATCH v6 03/13] clk: qcom: gdsc: Use PM clocks to control gdsc clocks

The devices within a gdsc power domain, quite often have additional clocks to be turned on/off along with the power domain itself. Once the drivers for these devices are converted to use runtime PM, it would be possible to remove all clock handling from the drivers if the gdsc driver can handle

[PATCH v6 07/13] clk: qcom: gdsc: Add support for ON only state

Certain devices can have GDSCs' which support ON as the only state. They can't be power collapsed to either hit RET or OFF. The clients drivers for these GDSCs' however would expect the state of the core to be reset following a GDSC disable and re-enable. To do this assert/deassert reset lines

[PATCH v6 04/13] clk: qcom: gdsc: Manage clocks with !CONFIG_PM

With CONFIG_PM disabled, turn the devices clocks on during driver binding to the device, and turn them off when the driver is unbound from the device. Signed-off-by: Rajendra Nayak rna...@codeaurora.org --- drivers/clk/qcom/gdsc.c | 59 + 1 file

[PATCH v6 09/13] clk: qcom: gdsc: Add GDSCs in msm8974 GCC

From: Stephen Boyd sb...@codeaurora.org Theres just one GDSC as part of the msm8974 GCC block. Signed-off-by: Stephen Boyd sb...@codeaurora.org Signed-off-by: Rajendra Nayak rna...@codeaurora.org --- drivers/clk/qcom/Kconfig | 1 + drivers/clk/qcom/gcc-msm8974.c

Re: [PATCH v6 09/13] clk: qcom: gdsc: Add GDSCs in msm8974 GCC

On 07/22/2015 12:11 AM, Rajendra Nayak wrote: From: Stephen Boyd sb...@codeaurora.org Theres just one GDSC as part of the msm8974 GCC block. s/Theres/There's/ -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe

Re: [PATCH v6 10/13] clk: qcom: gdsc: Add GDSCs in msm8974 MMCC

On 07/22/2015 12:11 AM, Rajendra Nayak wrote: From: Stephen Boyd sb...@codeaurora.org Add the GDSC instances that exist as part of msm8974 MMCC block Signed-off-by: Stephen Boyd sb...@codeaurora.org Signed-off-by: Rajendra Nayak rna...@codeaurora.org From here on it looks fine, just routine

Re: [PATCH v6 07/13] clk: qcom: gdsc: Add support for ON only state

On 07/22/2015 12:11 AM, Rajendra Nayak wrote: @@ -200,6 +224,12 @@ static int gdsc_init(struct gdsc *sc) if (ret) return ret; + /* Force gdsc ON if only ON state is supported */ + if (sc-pwrsts == PWRSTS_ON) + ret = gdsc_toggle_logic(sc, true); +

Re: [PATCH v6 03/13] clk: qcom: gdsc: Use PM clocks to control gdsc clocks

On 07/22/2015 12:10 AM, Rajendra Nayak wrote: @@ -104,6 +105,37 @@ static int gdsc_disable(struct generic_pm_domain *domain) return gdsc_toggle_logic(sc, false); } +static int gdsc_attach(struct generic_pm_domain *domain, struct device *dev) +{ + int ret; + struct gdsc

Re: [PATCH v6 02/13] clk: qcom: gdsc: Prepare common clk probe to register gdscs

On 07/22/2015 12:10 AM, Rajendra Nayak wrote: @@ -120,8 +121,20 @@ int qcom_cc_really_probe(struct platform_device *pdev, ret = reset_controller_register(reset-rcdev); if (ret) - of_clk_del_provider(dev-of_node); + goto err_reset; + if (desc-gdscs

Re: [PATCH v6 04/13] clk: qcom: gdsc: Manage clocks with !CONFIG_PM

On 07/22/2015 12:11 AM, Rajendra Nayak wrote: With CONFIG_PM disabled, turn the devices clocks on during driver binding to the device, and turn them off when the driver is unbound from the device. Signed-off-by: Rajendra Nayak rna...@codeaurora.org --- drivers/clk/qcom/gdsc.c | 59

Re: [PATCH v6 01/13] clk: qcom: Add support for GDSCs

On 07/22/2015 12:10 AM, Rajendra Nayak wrote: diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index 59d1666..a7c2eea 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -39,6 +39,11 @@ config IPQ_LCC_806X Say Y if you want to use audio devices such

Re: [PATCH v6 08/13] clk: qcom: gdsc: Add GDSCs in msm8916 GCC

On 07/22/2015 12:11 AM, Rajendra Nayak wrote: @@ -2562,6 +2563,47 @@ static struct clk_branch gcc_venus0_vcodec0_clk = { }, }; +static struct gdsc venus_gdsc = { + .gdscr = 0x4c018, + .pd = { + .name = venus, + }, + .pwrsts = PWRDM_OFF_ON, +};