On Tue 2015-07-28 18:37:41, Bjorn Andersson wrote:
From: Werner Johansson werner.johans...@sonymobile.com
This adds support for the Sharp panel found on the Qualcomm
Snapdragon 800 Dragonboard (APQ8074)
Signed-off-by: Werner Johansson werner.johans...@sonymobile.com
Signed-off-by: Bjorn
Decrement device node refcount if of_get_child_by_name is successfully
called.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
The dsi host looks for the connected panel node by parsing for a child
named 'panel'. This hierarchy isn't very flexible. The connected
panel is forced to be a child to the dsi host, and hence, a mipi dsi
device. This isn't suitable for dsi devices that don't use mipi dsi
as their control bus.
drm/msm currently relies on phandles/child nodes to get data about
connected panels to LVDS and DSI. This method has known limitations.
Use device graphs in DT to represent the connections between the encoder
outputs and the panels. Use of_graph helpers in the driver to get the
panel device node.
There are platforms where the DSI output can be connected to another
encoder bridge chip (DSI to HDMI, DSI to LVDS etc).
Add support for external bridge support to the dsi driver. We assume that
the external bridge chip would be of the type drm_bridge. The dsi driver's
internal drm_bridge
The dsi bridge ops call drm_panel functions to set up the connected
drm_panel. Add checks to make sure these aren't called when we're
connected to an external bridge.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi_manager.c | 43
We currently get the output connected to LVDS by looking for a phandle
called 'qcom,lvds-panel' under the mdp DT node.
Use the more standard of_graph approach to create an lvds output port,
and retrieve the panel node from the port's endpoint data.
v3
- Fix return value checks of of_graph_*
We currently support only panels connected to dsi output. We're going to
also support external bridge chips now.
Change 'panel_node' to 'device_node' in the struct msm_dsi_host and
'panel_flags' to 'device_flags' in msm_dsi. This makes things sound a
bit more generic.
Signed-off-by: Archit
Platforms containing only DSI video mode devices don't need a TE gpio.
Make TE gpio optional.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
The dsi driver only connects to drm_panel devices right now. drm_bridge
based devices can be used to implement external encoder chips (like DSI to
HDMI, DSI to LVDS) etc.
Make changes such that the dsi driver works with drm_bridge devices. This
enables the driver to connect with the encoder chips
Create a helper msm_dsi_device_connected() which checks whether we have a
device connected to the dsi host or not. This check gets messy when we
have support external bridges too. Having an inline function makes it
more legible.
For now, the check only consists of msm_dsi-panel being non-NULL.
Add support for the NAND controller driver for SoC's that contain EBI2.
For now, the only SoC upstream that has EBI2 is IPQ806x.
The original version was posted a while back. The main comments were
about the driver not being able to use nand_bbt. This was because the
controller could read factory
The nand controller in IPQ806x is of the 'EBI2 type'. Use the corresponding
compatible string.
Cc: devicet...@vger.kernel.org
Reviewed-by: Andy Gross agr...@codeaurora.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 15 +++
1 file
Enable the NAND controller node on the AP148 platform. Provide pinmux
information.
Cc: devicet...@vger.kernel.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 36
1 file changed, 36 insertions(+)
diff --git
Add DT bindings document for the Qualcomm NAND controller driver.
Cc: devicet...@vger.kernel.org
v3:
- Don't use '0x' when specifying nand controller address space
- Add optional property for on-flash bbt usage
Acked-by: Andy Gross agr...@codeaurora.org
Signed-off-by: Archit Taneja
The Qualcomm NAND controller is found in SoCs like IPQ806x, MSM7xx,
MDM9x15 series.
It exists as a sub block inside the IPs EBI2 (External Bus Interface 2)
and QPIC (Qualcomm Parallel Interface Controller). These IPs provide a
broader interface for external slow peripheral devices such as LCD and
Some controllers can access the factory bad block marker from OOB only
when they read it in raw mode. When ECC is enabled, these controllers
discard reading/writing bad block markers, preventing access to them
altogether.
The bbt driver assumes MTD_OPS_PLACE_OOB when scanning for bad blocks.
This
On 07/28/2015 08:57 AM, Bjorn Andersson wrote:
On Sun 26 Jul 23:16 PDT 2015, Archit Taneja wrote:
From: Lars-Peter Clausen l...@metafoo.de
[..]
diff --git a/drivers/gpu/drm/i2c/adv7511.c b/drivers/gpu/drm/i2c/adv7511.c
[..]
+static const struct of_device_id adv7511_of_ids[] = {
+
18 matches
Mail list logo
