On Fri 20 Nov 17:49 PST 2015, Stephen Boyd wrote:
> Add the generic compatible strings for the PMIC gpio and MPP
> modules found on qcom based PMICs.
>
> Cc:
> Cc: "Ivan T. Ivanov"
> Cc: Bjorn Andersson
> Cc: Rob
On Wed 18 Nov 11:33 PST 2015, Stephen Boyd wrote:
> The number of interrupts is always equal to the number of pins
> provided by the PMIC gpio and MPP hardware blocks. Count the
> number of irqs to figure out the number of pins instead of adding
> more compatible strings or doing math on the reg
On Tue 17 Nov 16:52 PST 2015, Stephen Boyd wrote:
> Update the driver and binding for pm8994-mpp devices.
>
> Cc:
> Cc: "Ivan T. Ivanov"
> Cc: Bjorn Andersson
> Signed-off-by: Stephen Boyd
>
On Mon, Nov 23, 2015 at 4:28 AM, Sinan Kaya wrote:
> The Qualcomm Technologies HIDMA device has been designed
> to support virtualization technology. The driver has been
> divided into two to follow the hardware design.
>
> 1. HIDMA Management driver
> 2. HIDMA Channel
On 11/23/2015 12:29 AM, Peter Chen wrote:
> On Fri, Nov 20, 2015 at 03:47:20PM -0800, Tim Bird wrote:
>> Register the chipidea driver with the phy, so that the phy
>> driver can kick the gadget driver when it resumes from low power.
>> The phy-msm-usb (Qualcomm) driver requires this in order to
On Mon 23 Nov 01:29 PST 2015, Stanimir Varbanov wrote:
> From: Stanimir Varbanov
>
> Document Qualcomm PCIe driver devicetree bindings.
>
> Signed-off-by: Stanimir Varbanov
> Signed-off-by: Stanimir Varbanov
> ---
>
On Tue 17 Nov 17:00 PST 2015, Stephen Boyd wrote:
> The drivers don't really need to know which PMIC they're for, so
> make a generic binding for them. This alleviates us from updating
> the drivers every time a new PMIC comes out. It's still
> recommended that we update the binding with new PMIC
On Tue 17 Nov 16:35 PST 2015, Stephen Boyd wrote:
> From: Joonwoo Park
>
> Add initial pinctrl driver to support pin configuration with
> pinctrl framework for msm8996.
>
> Cc:
> Cc: Bjorn Andersson
>
On Tue 17 Nov 16:52 PST 2015, Stephen Boyd wrote:
> Update the binding and driver for pm8994-gpio devices.
>
> Cc:
> Cc: "Ivan T. Ivanov"
> Cc: Bjorn Andersson
> Signed-off-by: Stephen Boyd
On 11/23, Arnd Bergmann wrote:
> On Monday 23 November 2015 09:14:39 Christopher Covington wrote:
> > On 11/23/2015 03:15 AM, Arnd Bergmann wrote:
> > > On Sunday 22 November 2015 21:36:45 Nicolas Pitre wrote:
> > >> On Sun, 22 Nov 2015, Arnd Bergmann wrote:
> > >
> > > Ok, thanks a lot! So the
On Sunday 22 November 2015 21:36:45 Nicolas Pitre wrote:
> On Sun, 22 Nov 2015, Arnd Bergmann wrote:
>
> > I've also found some /proc/cpuinfo output to cross-reference SoCs
> > to their core names.
> >
> > variant partrevisionnamefeatures
> > dove: 0
Hi Stanimir,
[auto build test ERROR on: v4.4-rc2]
[also build test ERROR on: next-20151123]
url:
https://github.com/0day-ci/linux/commits/Stanimir-Varbanov/Qualcomm-PCIe-driver-and-designware-fixes/20151123-173312
config: i386-allmodconfig (attached as .config)
reproduce:
# save
On Mon, Nov 23, 2015 at 11:28:59AM +0200, Stanimir Varbanov wrote:
> Add 'write memory' barrier after enable region in PCIE_ATU_CR2
> register. The barrier is needed to ensure that the region enable
> request has been reached it's destination at time when we
> read/write to PCI configuration
On Fri, Oct 30, 2015 at 03:34:29PM -0700, Bjorn Andersson wrote:
> From: Werner Johansson
>
> Signed-off-by: Werner Johansson
> Signed-off-by: Bjorn Andersson
> ---
>
> Change since v1:
> -
On Fri, Oct 30, 2015 at 03:34:30PM -0700, Bjorn Andersson wrote:
> From: Werner Johansson
>
> This adds support for the Sharp panel found on the Qualcomm
> Snapdragon 800 Dragonboard (APQ8074)
>
> Signed-off-by: Werner Johansson
On Fri, Nov 20, 2015 at 03:47:20PM -0800, Tim Bird wrote:
> Register the chipidea driver with the phy, so that the phy
> driver can kick the gadget driver when it resumes from low power.
> The phy-msm-usb (Qualcomm) driver requires this in order to
> recover gadget operation after you disconnect
Add the pcie dt node so that it can probe and used.
Signed-off-by: Stanimir Varbanov
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 36 +++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
From: Stanimir Varbanov
Document Qualcomm PCIe driver devicetree bindings.
Signed-off-by: Stanimir Varbanov
Signed-off-by: Stanimir Varbanov
---
.../devicetree/bindings/pci/qcom,pcie.txt | 231
From: Stanimir Varbanov
The PCIe driver reuse the Designware common code for host
and MSI initialization, and also program the Qualcomm
application specific registers.
Signed-off-by: Stanimir Varbanov
Signed-off-by: Stanimir Varbanov
Add 'write memory' barrier after enable region in PCIE_ATU_CR2
register. The barrier is needed to ensure that the region enable
request has been reached it's destination at time when we
read/write to PCI configuration space.
Without this barrier PCI device enumeration during kernel boot
is not
This patch set is continuation of previous v2 at [1]. This time I
decided to drop the PHY driver needed by pcie driver for apq8084
and send it separately soon (when sort out the need of separate phy
driver).
First two patches in the set are fixes in pcie designware driver
found during testing the
The io_base is used to keep the cpu physical address parsed
from ranges dt property. After issue pci_remap_iospace the
io_base has been assigned with io->start, which is not correct
cause io->start is a PCI bus address.
Signed-off-by: Stanimir Varbanov
---
On Monday 23 November 2015 11:28:58 Stanimir Varbanov wrote:
> The io_base is used to keep the cpu physical address parsed
> from ranges dt property. After issue pci_remap_iospace the
> io_base has been assigned with io->start, which is not correct
> cause io->start is a PCI bus address.
>
>
Am Mittwoch, den 18.11.2015, 07:57 -0700 schrieb Lina Iyer:
> From: Axel Haslam
>
> The generic_pm_domain structure uses an array of latencies to be able to
> declare multiple intermediate states.
>
> Declare a single "OFF" state with the default latencies So that
Am Montag, den 23.11.2015, 14:31 +0100 schrieb Lucas Stach:
> Am Mittwoch, den 18.11.2015, 07:57 -0700 schrieb Lina Iyer:
> > From: Axel Haslam
> >
> > The generic_pm_domain structure uses an array of latencies to be able to
> > declare multiple intermediate states.
On 11/23/2015 03:15 AM, Arnd Bergmann wrote:
> On Sunday 22 November 2015 21:36:45 Nicolas Pitre wrote:
>> On Sun, 22 Nov 2015, Arnd Bergmann wrote:
>>
>>> I've also found some /proc/cpuinfo output to cross-reference SoCs
>>> to their core names.
>>>
>>> variant partrevision
On Monday 23 November 2015 13:32:06 Stephen Boyd wrote:
> On 11/23, Arnd Bergmann wrote:
> > On Monday 23 November 2015 12:38:47 Stephen Boyd wrote:
> > > On 11/23, Arnd Bergmann wrote:
> > > > On Monday 23 November 2015 09:14:39 Christopher Covington wrote:
> > > > > On 11/23/2015 03:15 AM, Arnd
On Mon, Nov 23, 2015 at 11:29:00AM +0200, Stanimir Varbanov wrote:
> From: Stanimir Varbanov
>
> Document Qualcomm PCIe driver devicetree bindings.
>
> Signed-off-by: Stanimir Varbanov
> Signed-off-by: Stanimir Varbanov
On 11/23, Arnd Bergmann wrote:
> On Monday 23 November 2015 13:32:06 Stephen Boyd wrote:
> > On 11/23, Arnd Bergmann wrote:
> > > On Monday 23 November 2015 12:38:47 Stephen Boyd wrote:
> >
> > It would be nice to drop the ARCH_MSM* configs entirely. If we
> > could select the right timers from
Make the get_maintainer script pick up the proper maintainers for the
Qualcomm dts files.
Signed-off-by: Bjorn Andersson
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index bcf40fdc8178..a11764c15b62 100644
---
Signed-off-by: Bjorn Andersson
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index acd4cdb9c934..777adb9204c7 100644
---
On 11/21, Bjorn Andersson wrote:
> On Fri 20 Nov 16:39 PST 2015, Stephen Boyd wrote:
>
> > On 11/19, Georgi Djakov wrote:
> > > diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
> > > b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
> > > new file mode 100644
> > >
On 11/23, Arnd Bergmann wrote:
>
> Ok, thanks for the confirmation.
>
> Summarizing what we've found, I think we can get away with just
> introducing two Kconfig symbols ARCH_MULTI_V7VE and CPU_V7VE.
> Most CPUs fall clearly into one category or the other, and then
> we can allow LPAE to be
On 11/22, Rob Herring wrote:
> On Fri, Nov 20, 2015 at 03:31:16PM -0800, Stephen Boyd wrote:
> > Some qcom based bootloaders identify the dtb blob based on a set
> > of device properties like SoC, platform, PMIC, and revisions of
> > those components. In downstream kernels, these values are added
On 11/21, Srinivas Kandagatla wrote:
> Hi Stephen,
>
> Thanks for the fix.
>
> I will send it to Greg for next rc.
Thanks. The change in regmap core that causes the problem is only
in -next. I'm not sure if it's going to hit mainline this release
cycle, so if it doesn't you could queue this for
On 11/23, Rajendra Nayak wrote:
>
> On 11/18/2015 06:42 AM, Stephen Boyd wrote:
> > Add initial device tree support for the Qualcomm MSM8996 SoC and
> > MTP8996 evaluation board.
> >
> > Signed-off-by: Stephen Boyd
> > ---
> []...
>
> > +
> > + spmi_bus:
On 11/23, Russell King - ARM Linux wrote:
> On Mon, Nov 23, 2015 at 01:16:01PM -0800, Stephen Boyd wrote:
> > Thanks. I don't see the prints on my system even with this config
> > on top of allyesconfig. Odd.
>
> Hmm.
>
> It could be because I use ccache in hardlink mode to avoid the disk
>
On Monday 23 November 2015 09:14:39 Christopher Covington wrote:
> On 11/23/2015 03:15 AM, Arnd Bergmann wrote:
> > On Sunday 22 November 2015 21:36:45 Nicolas Pitre wrote:
> >> On Sun, 22 Nov 2015, Arnd Bergmann wrote:
> >
> > Ok, thanks a lot! So the reporting in /proc/cpuinfo clearly matches
>
On 11/23/2015 12:27 PM, Gabriele Paoloni wrote:
> Hi Stanimir, Many Thanks for this fix
>
>> -Original Message-
>> From: linux-kernel-ow...@vger.kernel.org [mailto:linux-kernel-
>> ow...@vger.kernel.org] On Behalf Of Arnd Bergmann
>> Sent: 23 November 2015 10:00
>> To: Stanimir Varbanov
On 11/23/2015 1:06 PM, Andy Shevchenko wrote:
> Thanks for an update!
>
> Looks cool! Though still few errors spelling and style nitpicks (you
> may ignore them if you wish) below.
>
> Reviewed-by: Andy Shevchenko
Thanks, I'll post an updated version next week.
--
The properties specified in the wled node could harm connected hardware,
so move the properties to Honami and disable the platform node.
Signed-off-by: Bjorn Andersson
---
arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts | 13 +
On 11/23/2015 01:27 PM, Russell King - ARM Linux wrote:
> On Mon, Nov 23, 2015 at 11:28:59AM +0200, Stanimir Varbanov wrote:
>> Add 'write memory' barrier after enable region in PCIE_ATU_CR2
>> register. The barrier is needed to ensure that the region enable
>> request has been reached it's
On 11/21, Måns Rullgård wrote:
> Stephen Boyd writes:
>
> > +static int module_patch_aeabi_uidiv(unsigned long loc, const Elf32_Sym
> > *sym)
> > +{
> > + extern char __aeabi_uidiv[], __aeabi_idiv[];
> > + unsigned long udiv_addr = (unsigned long)__aeabi_uidiv;
> > +
On 11/21, Russell King - ARM Linux wrote:
> On Fri, Nov 20, 2015 at 05:23:16PM -0800, Stephen Boyd wrote:
> > @@ -452,14 +631,14 @@ static char const *
> > __has_rel_mcount(Elf_Shdr const *const relhdr, /* is SHT_REL or SHT_RELA
> > */
> > Elf_Shdr const *const shdr0,
> >
On Mon, 23 Nov 2015 12:53:35 -0800
Stephen Boyd wrote:
>
> This comment in recordmcount.pl may tell us something.
>
> #
> # Somehow the make process can execute this script on an
> # object twice. If it does, we would duplicate the mcount
> #
Stephen Boyd writes:
> On 11/21, Måns Rullgård wrote:
>> Stephen Boyd writes:
>>
>> > +static int module_patch_aeabi_uidiv(unsigned long loc, const Elf32_Sym
>> > *sym)
>> > +{
>> > + extern char __aeabi_uidiv[], __aeabi_idiv[];
>> > + unsigned
On Mon, Nov 23, 2015 at 12:53:35PM -0800, Stephen Boyd wrote:
> On 11/21, Russell King - ARM Linux wrote:
> > On Fri, Nov 20, 2015 at 05:23:16PM -0800, Stephen Boyd wrote:
> > > @@ -452,14 +631,14 @@ static char const *
> > > __has_rel_mcount(Elf_Shdr const *const relhdr, /* is SHT_REL or
> > >
On 11/23, Russell King - ARM Linux wrote:
> On Mon, Nov 23, 2015 at 12:53:35PM -0800, Stephen Boyd wrote:
> > On 11/21, Russell King - ARM Linux wrote:
> > > On Fri, Nov 20, 2015 at 05:23:16PM -0800, Stephen Boyd wrote:
> > > > @@ -452,14 +631,14 @@ static char const *
> > > >
On 11/23, Måns Rullgård wrote:
> Stephen Boyd writes:
>
> > On 11/21, Måns Rullgård wrote:
> >>
> >> These functions are rather similar. Perhaps they could be combined
> >> somehow.
> >>
> >
> > Yes. I have this patch on top, just haven't folded it in because
> > it
On Monday 23 November 2015 12:38:47 Stephen Boyd wrote:
> On 11/23, Arnd Bergmann wrote:
> > On Monday 23 November 2015 09:14:39 Christopher Covington wrote:
> > > On 11/23/2015 03:15 AM, Arnd Bergmann wrote:
> > > LPAE is only supported in the Krait 450.
> > >
> > >
On 11/23, Arnd Bergmann wrote:
> On Monday 23 November 2015 12:38:47 Stephen Boyd wrote:
> > On 11/23, Arnd Bergmann wrote:
> > > On Monday 23 November 2015 09:14:39 Christopher Covington wrote:
> > > > On 11/23/2015 03:15 AM, Arnd Bergmann wrote:
> > > > LPAE is only supported in the Krait 450.
>
On Mon, Nov 23, 2015 at 01:16:01PM -0800, Stephen Boyd wrote:
> Thanks. I don't see the prints on my system even with this config
> on top of allyesconfig. Odd.
Hmm.
It could be because I use ccache in hardlink mode to avoid the disk
overhead of having two copies and having to duplicate the file
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