Enables generic pinconf support and add handling for 'input-enable'
pinconf property.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/pinctrl/qcom/pinctrl-msm.c | 17 -
1 files changed, 12 insertions(+), 5 deletions(-)
diff --git
Thankyou for sending the patch..
here are some comments
On 27/01/15 04:09, Narendran Rajan wrote:
...
+
+#include linux/kernel.h
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/thermal.h
+#include linux/interrupt.h
+#include linux/delay.h
+#include linux/slab.h
Hi Narendran,
What a coincidence.. I was just in the middle of forward porting the
same driver from 3.4 kernel :-) You look fast... :-)
On 27/01/15 04:08, Narendran Rajan wrote:
Add binding documentation for the QCOM tsens device tree node
---
On 01/27/2015 02:35 AM, Kevin Cernekee wrote:
On Wed, Jan 21, 2015 at 10:36 PM, Archit Taneja arch...@codeaurora.org wrote:
On 01/21/2015 06:24 AM, Daniel Ehrenberg wrote:
On Fri, Jan 16, 2015 at 6:48 AM, Archit Taneja arch...@codeaurora.org
wrote:
+/*
+ * the bad block marker is readable
TSENS supports reading temperature from multiple thermal
sensors present in QCOM SOCs.
TSENS HW is enabled only when the main sensor is requested.
The TSENS block is disabled if the main senors is disabled
irrespective of any other sensors that are being enabled.
TSENS driver supports configurable
Add binding documentation for the QCOM tsens device tree node
---
.../devicetree/bindings/thermal/qcom-thermal.txt | 58 ++
1 file changed, 58 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/qcom-thermal.txt
diff --git
Hi All,
This discussion is triggered once again from recent chat with Stephen Boyd and
my need to access qfprom for tsens driver.
On MSM parts there are some efuses (called qfprom) these fuses store things like
calibration data, speed bins.. etc. Drivers like cpufreq, thermal sensors would
read
This patch adds register stride to dt bindings so that the consumers of
the syscon could change it to there need. One of the the use case for
this feature is Qualcomm qfprom which needs a byte access to regmap
returned from syscon.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
Syscon fits very well to access qfprom. This also means drivers which needs to
access qfprom have to talk to syscon and get regmap, offset, size and then do
regmap reads. This will be kinda redone in every driver. Having a wrapper for
this would avoid lot of code duplications and also provide a
On Thu 18 Dec 12:59 PST 2014, Andy Gross wrote:
Qualcomm pinctrl devices support functions that can be routed to multiple
pins.
In some cases, there are additional mux registers that must be set for the
pins
to work correctly.
I've described it as second level muxing, but your
Hi Dave,
Main pull for 3.20. Highlights:
1) YUV support for mdp4 and mdp5
2) eDP support
3) hw cursor support for mdp5[*]
4) additional hdmi support for apq8084 (snapdragon 805)
5) few bug fixes
Note that I may have a later pull to enable hdmi hpd irqs.. but
(un)fortunately I seem to have a
On 01/21/15 20:39, Andy Gross wrote:
Added myself as a co-maintainer. Updated the files to include the Qualcomm
SoC
directory. Added linux-soc mailing list.
Signed-off-by: Andy Gross agr...@codeaurora.org
---
MAINTAINERS |3 +++
1 file changed, 3 insertions(+)
diff --git
On Wed, Jan 21, 2015 at 10:36 PM, Archit Taneja arch...@codeaurora.org wrote:
On 01/21/2015 06:24 AM, Daniel Ehrenberg wrote:
On Fri, Jan 16, 2015 at 6:48 AM, Archit Taneja arch...@codeaurora.org
wrote:
+/*
+ * the bad block marker is readable only when we read the page with ECC
+ *
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