On Tue, Mar 24, 2015 at 10:30:19PM +, Srinivas Kandagatla wrote:
This patch adds just consumers part of the framework just to enable easy
review.
Up until now, EEPROM drivers were stored in drivers/misc, where they all had
to
duplicate pretty much the same code to register a sysfs
On Wed, Mar 25, 2015 at 12:23:19PM +0530, rtat...@codeaurora.org wrote:
From: Rupesh Tatiya rtat...@codeaurora.org
USB 2.01+ full-speed devices can have extended descriptor as well
and can support LPM.
Change-Id: Ic055d51c02651810d3eb7141bab20a090fe8453b
We can't take patches with this in
From: Rupesh Tatiya rtat...@codeaurora.org
USB 2.01+ full-speed devices can have extended descriptor as well
and can support LPM.
Change-Id: Ic055d51c02651810d3eb7141bab20a090fe8453b
Signed-off-by: Rupesh Tatiya rtat...@codeaurora.org
---
drivers/usb/core/hub.c | 2 +-
1 file changed, 1
On Tue, Mar 24, 2015 at 10:30:30PM +, Srinivas Kandagatla wrote:
This patch adds bindings for simple eeprom framework which allows eeprom
consumers to talk to eeprom providers to get access to eeprom cell data.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
[Maxime Ripard:
On Wed, 2015-03-25 at 12:23 +0530, rtat...@codeaurora.org wrote:
From: Rupesh Tatiya rtat...@codeaurora.org
USB 2.01+ full-speed devices can have extended descriptor as well
and can support LPM.
Yes, they in theory can, but what happens if they are actually
asked to do so? On how many
On 23 March 2015 at 17:47, Georgi Djakov georgi.dja...@linaro.org wrote:
Some versions of this controller do not advertise their 3.0v and
8bit bus-width support capabilities. It is required to explicitly
set these capabilities for the specific controller versions.
Signed-off-by: Georgi Djakov
Hi,
On 03/13/2015 02:36 PM, Daniel Vetter wrote:
On Fri, Mar 13, 2015 at 11:55:07AM +0530, Archit Taneja wrote:
On 03/11/2015 08:47 PM, Daniel Vetter wrote:
On Wed, Mar 11, 2015 at 01:51:02PM +0530, Archit Taneja wrote:
On 03/10/2015 05:47 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015
On Wed, Mar 25, 2015 at 01:47:54PM +0530, Archit Taneja wrote:
Hi,
On 03/13/2015 02:36 PM, Daniel Vetter wrote:
On Fri, Mar 13, 2015 at 11:55:07AM +0530, Archit Taneja wrote:
On 03/11/2015 08:47 PM, Daniel Vetter wrote:
On Wed, Mar 11, 2015 at 01:51:02PM +0530, Archit Taneja wrote:
Add the GDSC instances that exist as part of apq8084 MMCC block.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
drivers/clk/qcom/Kconfig | 1 +
drivers/clk/qcom/mmcc-apq8084.c | 56 ++-
On 25/03/15 07:16, Sascha Hauer wrote:
On Tue, Mar 24, 2015 at 10:30:19PM +, Srinivas Kandagatla wrote:
This patch adds just consumers part of the framework just to enable easy
review.
Up until now, EEPROM drivers were stored in drivers/misc, where they all had to
duplicate pretty much
Hi Sricharan,
On Fri, 2015-03-13 at 23:19 +0530, Sricharan R wrote:
From: Andy Gross agr...@codeaurora.org
QUP from version 2.1.1 onwards, supports a new format of
i2c command tags. Tag codes instructs the controller to
perform a operation like read/write. This new tagging version
Hi Sricharan,
On Fri, 2015-03-13 at 23:19 +0530, Sricharan R wrote:
#define QUP_I2C_MASTER_GEN 0x408
+#define QUP_I2C_MASTER_CONFIG 0x408
Unused.
#define QUP_READ_LIMIT 256
+#define MX_TX_RX_LEN SZ_64K
+#define MX_BLOCKS
Qualcomm PMIC Arbiter version-2 changes from version-1 are:
- Some different register offsets.
- New channel register space, one per PMIC peripheral (ppid).
All tx traffic uses these channels.
- New observer register space. All rx trafic uses this space.
- Different command format for spmi
According to spmi spec a slave powers up into startup state and then
transitions into active state. Thus, the wakeup command is not required
before calling the slave's probe. The wakeup command is only needed for
slaves that are in sleep state after receiving the sleep command.
Cc:
pmic_arb v2 has no support for spmi non-data commands and thus
returns -EOPNOTSUPP on .cmd callback. This causes a failure in
spmi_drv_probe() which sends a wakeup command to the slave before
probing its driver. This patchset removes the wakeup from
spmi_drv_probe() since the spmi spec stipulates
On Wed, Mar 25, 2015 at 08:10:06AM +0100, Sascha Hauer wrote:
On Tue, Mar 24, 2015 at 10:30:30PM +, Srinivas Kandagatla wrote:
This patch adds bindings for simple eeprom framework which allows eeprom
consumers to talk to eeprom providers to get access to eeprom cell data.
Document cpuidle states of QCOM cpus. In addition to arm-idle-state
compatible string, the ARM idle state definition must define one of the
following compatible strings -
qcom,idle-state-ret,
qcom,idle-state-spc,
qcom,idle-state-pc,
The compatibles helps the SPM platform
Each Krait CPU in the QCOM 8084 SoC has an SAW power controller to
regulate the power to the cpu and aide the core in entering idle states.
Reference the SAW instance and associate the instance with the CPU core.
Cc: Kumar Gala ga...@codeaurora.org
Signed-off-by: Lina Iyer lina.i...@linaro.org
Each Krait CPU in the QCOM 8074/8974 SoC has an SAW power controller to
regulate the power to the cpu and aide the core in entering idle states.
Reference the SAW instance and associate the instance with the CPU core.
Cc: Kumar Gala ga...@codeaurora.org
Signed-off-by: Lina Iyer
SPM is a hardware block that controls the peripheral logic surrounding
the application cores (cpu/l$). When the core executes WFI instruction,
the SPM takes over the putting the core in low power state as
configured. The wake up for the SPM is an interrupt at the GIC, which
then completes the rest
Add ARM common idle state device bindings for cpuidle support for APQ
8064.
Support Standalone power collapse (SPC) idle state (power down that does not
affect any SoC idle states) for each cpu.
Cc: Kumar Gala ga...@codeaurora.org
Signed-off-by: Lina Iyer lina.i...@linaro.org
---
Update the SAW2 DT bindings to add qcom,apq8064-saw2-v1.1-cpu compatible
binding string to configure SPM registers and allow the SPM to put the
core in deeper idle states when the core is idle.
Cc: Kumar Gala ga...@codeaurora.org
Signed-off-by: Lina Iyer lina.i...@linaro.org
Reviewed-by: Stephen
Update qcom,saw2 node bindings with compatible strings to identify nodes
that provides cpuidle functionality for a particular SoC. Remove
unused compatible strings.
Update examples for different SAW nodes.
Signed-off-by: Lina Iyer lina.i...@linaro.org
---
Add ARM common idle states device bindings for cpuidle support for APQ
8974/8074.
Support Standalone power collapse (SPC) idle state (power down that does
not affect any SoC idle states) for each cpu.
Cc: Kumar Gala ga...@codeaurora.org
Signed-off-by: Lina Iyer lina.i...@linaro.org
---
Update defconfig to allow cpuidle for QCOM cpus.
* Enable QCOM_PM
* Enable ARM_QCOM_CPUIDLE
Cc: Kumar Gala ga...@codeaurora.org
Signed-off-by: Lina Iyer lina.i...@linaro.org
---
arch/arm/configs/qcom_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/qcom_defconfig
Add ARM common idle states device bindings for cpuidle support for APQ
8084.
Support Standalone power collapse (SPC) idle state (power down that does not
affect any SoC idle states) for each cpu.
Cc: Kumar Gala ga...@codeaurora.org
Signed-off-by: Lina Iyer lina.i...@linaro.org
---
Define ARM_QCOM_CPUIDLE config item to enable cpuidle support.
Cc: Stephen Boyd sb...@codeaurora.org
Cc: Arnd Bergmann a...@arndb.de
Cc: Kevin Hilman khil...@linaro.org
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Lina Iyer lina.i...@linaro.org
---
drivers/cpuidle/Kconfig.arm | 7
Hi,
This v18 revision of patch has minor changes since v17.
Changes since v17:
- Added: SPM changes submitted on v17, per Daniel's comments.
- Moved: The DT documentation out of SPM driver patch. It was getting bigger.
- Fixed: Per Kumar's comments on removing qcom,saw and other unused
Hi Ivan,
On 03/25/2015 05:54 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Fri, 2015-03-13 at 23:19 +0530, Sricharan R wrote:
From: Andy Gross agr...@codeaurora.org
QUP from version 2.1.1 onwards, supports a new format of
i2c command tags. Tag codes instructs the controller to
perform a
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