On Tue, 2014-11-11 at 23:39 +0100, Hartmut Knaack wrote:
Ivan T. Ivanov schrieb am 11.11.2014 09:21:
Hi Hartmut,
On Mon, 2014-11-10 at 22:11 +0100, Hartmut Knaack wrote:
Ivan T. Ivanov schrieb am 03.11.2014 16:24:
From: Stanimir Varbanov svarba...@mm-sol.com
The voltage
On Tue, 2014-11-11 at 12:27 -0800, Courtney Cavin wrote:
On Fri, Nov 07, 2014 at 04:40:52PM +0100, Ivan T. Ivanov wrote:
Forgot to add. PMIC subtype and version are used also in charger and BMS
drivers to workaround hardware issues.
All of the blocks on the PM8x41 series have their own
On Mon, 2014-11-17 at 23:12 +0100, Hartmut Knaack wrote:
Ivan T. Ivanov schrieb am 12.11.2014 09:55:
On Tue, 2014-11-11 at 23:39 +0100, Hartmut Knaack wrote:
Ivan T. Ivanov schrieb am 11.11.2014 09:21:
Hi Hartmut,
On Mon, 2014-11-10 at 22:11 +0100, Hartmut Knaack wrote
Hi,
On Wed, 2014-11-26 at 22:24 -0700, Lina Iyer wrote:
- compatible:
@@ -14,10 +23,13 @@ PROPERTIES
Value type: string
Definition: shall contain qcom,saw2. A more specific value should be
one of:
Which driver is supposed
On Tue, 2014-04-15 at 10:56 -0700, Stephen Boyd wrote:
On 04/04/14 11:45, Stephen Boyd wrote:
These patches add support for the multimedia GDSCs on the
apq8074 dragonboard. The first two patches (and potentially the last)
should go through Mike's tree and the DTS patch should go through
On Thu, 2014-12-18 at 15:43 -0800, Bjorn wrote:
On Tue 16 Dec 16:54 PST 2014, Bryan Wu wrote:
On Mon, Dec 8, 2014 at 4:22 PM, Bjorn Andersson
[..]
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
[..]
+config LEDS_PM8941_WLED
+ tristate LED support for the
Add SPMI PMIC Arbiter configuration nodes for APQ8084 and MSM8974.
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
arch/arm/boot/dts/qcom-apq8084.dtsi | 16
arch/arm/boot/dts/qcom-msm8974.dtsi | 16
2 files changed, 32 insertions(+)
diff --git a/arch/arm
by this thermal
sensor device should reflect the actual PMIC die temperature if an
ADC is present on the given PMIC. If no ADC is present, then the
reported temperature should be estimated from the over temperature
stage value.
Cc: David Collins colli...@codeaurora.org
Signed-off-by: Ivan T. Ivanov iiva...@mm
On Mon, 2015-02-02 at 17:38 +0200, Stanimir Varbanov wrote:
+
+ chip-tz_dev = thermal_zone_of_sensor_register(pdev-dev, 0, chip,
+
qpnp_tm_sensor_ops);
+ if (IS_ERR(chip-tz_dev)) {
+ dev_err(pdev-dev,
PMA8084 have 2 SPMI devices per physical package. Add their
configuration nodes and include them in boards which are using
AQP8084 based chipset.
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
arch/arm/boot/dts/qcom-apq8084-ifc6540.dts | 1 +
arch/arm/boot/dts/qcom-apq8084-mtp.dts
Following set of patches add initial DT support for PMIC devices
found on recent Quqalcomm chipsets. Details for SPMI bus and PMIC arbiter
could be found here [1].
Regards,
Ivan
[1] http://lwn.net/Articles/564637/
Ivan T. Ivanov (3):
ARM: dts: qcom: Add SPMI PMIC Arbiter nodes for APQ8084
PM8841 and PM8941 have 2 SPMI devices per physical package.
Add their configuration nodes and include them in boards
which are using 8x74 based chipset.
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
arch/arm/boot/dts/qcom-apq8074-dragonboard.dts| 2 ++
arch/arm/boot/dts/qcom
by this thermal
sensor device should reflect the actual PMIC die temperature if an
ADC is present on the given PMIC. If no ADC is present, then the
reported temperature should be estimated from the over temperature
stage value.
Cc: David Collins colli...@codeaurora.org
Signed-off-by: Ivan T. Ivanov iiva...@mm
Hi Gilad,
Just few comments.
On Mon, 2015-01-19 at 18:10 -0700, Gilad Avidov wrote:
Qualcomm PMIC Arbiter version-2 changes from version-1 are:
- Some diffrent register offsets.
- New channel register space, one per PMIC peripheral (ppid).
All tx tarffic uses these channels.
- New
On Thu, 2015-02-12 at 20:07 -0800, Stephen Boyd wrote:
On 01/29/15 04:48, Ivan T. Ivanov wrote:
Otherwise it looks good. Driver is loaded and device is detected
properly (i have added readings for type and subtype registers).
Do you know where I can measure result from changing brightness
On Tue, 2015-01-20 at 12:15 +0200, Ivan T. Ivanov wrote:
This type of volatage ADC could be found in Qualcomm's SPMI PMIC's.
I'm sorry that it took me so long to send the updated version.
Changes since v4.
- Addressed review comments from Hartmut Knaack and Jonathan Cameron:
Fixed
Hi Bjorn,
Just few nitpick comments.
On Fri, 2015-01-23 at 16:54 -0800, Bjorn Andersson wrote:
From: Courtney Cavin ca...@sonymobile.com
This adds support for the WLED ('White' LED) block on Qualcomm's
PM8941 PMICs.
Signed-off-by: Courtney Cavin ca...@sonymobile.com
Signed-off-by:
On Tue, 2015-02-03 at 12:38 -0800, Bjorn Andersson wrote:
On Tue, Feb 3, 2015 at 4:17 AM, Ivan T. Ivanov iiva...@mm-sol.com wrote:
Following set of patches add initial DT support for PMIC devices
found on recent Quqalcomm chipsets. Details for SPMI bus and PMIC arbiter
could be found here
Courtney Cavin (2):
input: Add Qualcomm PM8941 power key driver
input: pm8941-pwrkey: Add DT binding documentation
Tested-by: Ivan T. Ivanov iiva...@mm-sol.com
Thanks.
.../bindings/input/qcom,pm8941-pwrkey.txt | 43
drivers/input/misc/Kconfig
://lwn.net/Articles/564637/
[2] https://lkml.org/lkml/2015/2/3/228
Ivan T. Ivanov (3):
ARM: dts: qcom: Add SPMI PMIC Arbiter nodes for APQ8084 and MSM8974
ARM: dts: qcom: Add 8x74 chipset SPMI PMIC's nodes
ARM: dts: qcom: Add APQ8084 chipset SPMI PMIC's nodes
arch/arm/boot/dts/qcom-apq8074
PMA8084 have 2 SPMI devices per physical package. Add their
configuration nodes and include them in boards which are using
AQP8084 based chipset.
Reviewed-by: Bjorn Andersson bjorn.anders...@sonymobile.com
Reviewed-by: Andy Gross agr...@codeaurora.org
Signed-off-by: Ivan T. Ivanov iiva...@mm
Some of the PMIC's could have specific regmap configuration
tables in future, so add specific compatible strings for known
PMIC's. Also print runtime detected chip revision information.
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
Changes since v2
* Fixed error checks from
Hi,
On Mon, 2015-03-09 at 11:53 -0700, Stephen Boyd wrote:
On 03/09/15 01:20, Ivan T. Ivanov wrote:
Hi Stephen,
On Mar 6, 2015, at 8:34 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 03/06/15 07:26, Ivan T. Ivanov wrote:
Ensure that driver is owner of the GPIO's used for CS
PM8841 and PM8941 have 2 SPMI devices per physical package.
Add their configuration nodes and include them in boards
which are using 8x74 based chipset.
Reviewed-by: Bjorn Andersson bjorn.anders...@sonymobile.com
Reviewed-by: Andy Gross agr...@codeaurora.org
Signed-off-by: Ivan T. Ivanov iiva
Add SPMI PMIC Arbiter configuration nodes for APQ8084 and MSM8974.
Reviewed-by: Bjorn Andersson bjorn.anders...@sonymobile.com
Reviewed-by: Andy Gross agr...@codeaurora.org
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
arch/arm/boot/dts/qcom-apq8084.dtsi | 16
arch/arm
USB_ULPI_VIEWPORT didn't depend on USB_ULPI, while USB_ULPI
is using non user selectable USB_ULPI_VIEWPORT. Fix this.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/usb/phy/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/phy/Kconfig b
On Fri, 2015-03-13 at 18:43 +0200, Ivan T. Ivanov wrote:
Some devices samples state of the chip select signal during power up
and act differently based on this state, so SPI core should ensure
that CS line is driven in non-active state after spi_setup().
Signed-off-by: Ivan T. Ivanov iiva
Hi Stephen,
On Mar 6, 2015, at 8:34 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 03/06/15 07:26, Ivan T. Ivanov wrote:
Ensure that driver is owner of the GPIO's used for CS signals.
Why? What happens if we don’t?
We can have wrong DT configuration, which could reconfigure
GPIO’s without
Ping.
On Mon, 2015-02-23 at 11:59 +0200, Ivan T. Ivanov wrote:
Hi Gilad,
On Thu, 2015-02-19 at 15:54 -0700, Gilad Avidov wrote:
Qualcomm PMIC Arbiter version-2 changes from version-1 are:
- Some different register offsets.
- New channel register space, one per PMIC peripheral (ppid
On Tue, 2015-03-10 at 11:06 +, Mark Brown wrote:
On Tue, Mar 10, 2015 at 10:10:56AM +0200, Ivan T. Ivanov wrote:
On Mon, 2015-03-09 at 18:28 +, Mark Brown wrote:
About the API usage, point taken. GPIO requesting part is more important
in this case. pinctrl core did
than the length of a block.
Signed-off-by: Andy Gross agr...@codeaurora.org
Signed-off-by: Stanimir Varbanov varba...@linaro.org
Reviewed-by: Ivan T. Ivanov iiva...@mm-sol.com
Tested on top of Archit's DMA patch[1].
Thanks,
Ivan
[1] https://lkml.org/lkml/2015/1/22/52
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multiplier for BAM_IRQ_SRCS_EE
and
BAM_IRQ_SRCS_MSK_EE
.../devicetree/bindings/dma/qcom_bam_dma.txt | 1 +
drivers/dma/qcom_bam_dma.c | 30
++
2 files changed, 31 insertions(+)
Tested-by: Ivan T. Ivanov iiva...@mm-sol.com
num-cs is 32 bit property, don't read just upper 16 bits.
Fixes: 4a8573abe965 spi: qup: Remove chip select function
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
drivers/spi/spi-qup.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi-qup.c b
Ensure that driver is owner of the GPIO's used for CS signals.
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
drivers/spi/spi-qup.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c
index 2b2c359..a07ba46
When drivers didn't provide setup() method, SPI core should ensure
that CS line is driven in non-active state after spi_setup().
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
drivers/spi/spi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
On Sun, 2015-03-08 at 20:01 +, Mark Brown wrote:
On Fri, Mar 06, 2015 at 05:45:15PM +0200, Ivan T. Ivanov wrote:
if (spi-master-setup)
status = spi-master-setup(spi);
+ else
+ spi_set_cs(spi, false);
Why would this be conditional
Some devices samples state of the chip select signal during power up
and act differently based on this state, so SPI core should ensure
that CS line is driven in non-active state after spi_setup().
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
drivers/spi/spi.c | 2 ++
1 file changed, 2
On Mon, 2015-03-09 at 18:28 +, Mark Brown wrote:
On Mon, Mar 09, 2015 at 10:23:35AM +0200, Ivan T. Ivanov wrote:
Hi,
Don't reply off list unless there's a good reason...
Sorry, it was not intentional. Wrong button.
Any new GPIO users should really be using the gpiod API, however
Hi Sricharan,
On Fri, 2015-03-13 at 23:19 +0530, Sricharan R wrote:
From: Andy Gross agr...@codeaurora.org
QUP from version 2.1.1 onwards, supports a new format of
i2c command tags. Tag codes instructs the controller to
perform a operation like read/write. This new tagging version
Hi Sricharan,
On Fri, 2015-03-13 at 23:19 +0530, Sricharan R wrote:
#define QUP_I2C_MASTER_GEN 0x408
+#define QUP_I2C_MASTER_CONFIG 0x408
Unused.
#define QUP_READ_LIMIT 256
+#define MX_TX_RX_LEN SZ_64K
+#define MX_BLOCKS
is the appropriate tree to merge this?
Kumar?
Tested-by: Ivan T. Ivanov iiva...@mm-sol.com
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Qualcomm PMIC arbiter driver already depends on ARCH_QCOM,
which could be either ARM or ARM64. New version of the PMIC
arbiter controller is available on 64 bit platforms.
Remove ARM dependency to allow driver to be build for 64 bit
platforms.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
characters, but I hope that in this case this is in favor
in readability.
Patches are created top of Kumar's kernel tree and tags/qcom-dt-for-4.1 [1].
Any comments are welcome.
Regards,
Ivan
[1] https://lkml.org/lkml/2015/3/27/599
Ivan T. Ivanov (7):
ARM: dts: qcom: Add PM8841 functions device
* GPIO block, with 22 pins
* MPP block, with 8 pins
* Volatage ADC (VADC), with multiple inputs
* Thermal sensor device, which is using on chip VADC
channel report PMIC die temperature.
* RTC device
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm/boot/dts/qcom-pma8084.dtsi
Add SPMI PMIC Arbiter configuration nodes for MSM8916.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm8916
), with multiple inputs
* Thermal sensor device, which is using on chip VADC
channel report PMIC die temperature.
* Power key device, which is responsible for clean system
reboot or shutdown
* RTC device
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
for clean system
reboot or shutdown
* White LED device
* RTC device
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm/boot/dts/qcom-pm8941.dtsi | 98 ++
1 file changed, 98 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi
b/arch
On Wed, 2015-03-04 at 11:05 -0800, Stephen Boyd wrote:
On 03/04/15 02:19, Ivan T. Ivanov wrote:
+
+static const struct of_device_id pmic_spmi_id_table[] = {
+ [COMMON_SUBTYPE] = { .compatible = qcom,spmi-pmic },
+ [PM8941_SUBTYPE] = { .compatible = qcom,pm8941
On Wed, 2015-03-04 at 11:01 -0800, Stephen Boyd wrote:
On 03/04/15 02:19, Ivan T. Ivanov wrote:
diff --git a/drivers/mfd/qcom-spmi-pmic.c b/drivers/mfd/qcom-spmi-pmic.c
index 4b8beb2..a1af4e5 100644
--- a/drivers/mfd/qcom-spmi-pmic.c
+++ b/drivers/mfd/qcom-spmi-pmic.c
+
+static
On Tue, 2015-03-03 at 00:19 -0800, Stephen Boyd wrote:
On 02/26, Ivan T. Ivanov wrote:
Hi Stephen,
Sorry for delayed answer.
On Thu, 2015-02-19 at 16:49 -0800, Stephen Boyd wrote:
On 02/03/15 04:17, Ivan T. Ivanov wrote:
Following set of patches add initial DT support for PMIC
Hi Stan,
It looks good now, except it doesn't apply and two small issues below:
On Fri, 2015-02-27 at 18:58 +0200, Stanimir Varbanov wrote:
From: Andy Gross agr...@codeaurora.org
This patch adds DMA capabilities to the spi-qup driver. If DMA channels are
present, the QUP will use DMA
Some of the PMIC's could have specific regmap configuration
tables in future, so add specific compatible strings for known
PMIC's. Also print runtime detected chip revision information.
Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
Changes since first version of this patch[1]:
- Drop
On Wed, 2015-02-04 at 19:46 +0100, Paul Bolle wrote:
On Wed, 2015-02-04 at 17:27 +0200, Stanimir Varbanov wrote:
On 02/04/2015 05:14 PM, Paul Bolle wrote:
On Wed, 2015-02-04 at 17:05 +0200, Stanimir Varbanov wrote:
On 02/03/2015 10:42 PM, Paul Bolle wrote:
On Tue, 2015-02-03 at
Hi Gilad,
On Thu, 2015-02-19 at 15:54 -0700, Gilad Avidov wrote:
+
+static u32 pmic_arb_fmt_cmd_v1(u8 opc, u8 sid, u16 addr, u8 bc)
+{
+ return (opc 27) | ((sid 0xf) 20) | (addr 4) | (bc 0x7);
+}
+
+static u32 pmic_arb_fmt_cmd_v2(u8 opc, u8 sid, u16 addr, u8 bc)
+{
+
Hi Gilad,
On Thu, 2015-02-19 at 15:54 -0700, Gilad Avidov wrote:
Qualcomm PMIC Arbiter version-2 changes from version-1 are:
- Some different register offsets.
- New channel register space, one per PMIC peripheral (ppid).
All tx traffic uses these channels.
- New observer register space.
On Mon, 2015-02-23 at 16:51 -0400, Eduardo Valentin wrote:
On Thu, Feb 05, 2015 at 07:12:56PM +0200, Ivan T. Ivanov wrote:
Add support for the temperature alarm peripheral found inside
Qualcomm plug-and-play (QPNP) PMIC chips. The temperature alarm
peripheral outputs a pulse
Hi Gilad,
One more comment :-).
On Thu, 2015-02-19 at 15:54 -0700, Gilad Avidov wrote:
snip
-static int pmic_arb_wait_for_done(struct spmi_controller *ctrl)
+static int pmic_arb_wait_for_done(struct spmi_controller *ctrl,
+ void __iomem *base, u8
Hi Stan,
On Tue, 2015-02-24 at 15:00 +0200, Stanimir Varbanov wrote:
snip
#define SPI_MAX_RATE 5000
@@ -143,6 +147,11 @@ struct spi_qup {
int tx_bytes;
int rx_bytes;
int qup_v1;
+
+ int dma_available;
This is more
Hi Stan,
Sorry I didn't saw this first look.
On Tue, 2015-02-24 at 15:00 +0200, Stanimir Varbanov wrote:
snip
+static bool spi_qup_can_dma(struct spi_master *master, struct spi_device
*spi,
+ struct spi_transfer
*xfer)
+{
+
Hi Stephan,
Sorry for delayed answer.
On Thu, 2015-02-19 at 16:49 -0800, Stephen Boyd wrote:
On 02/03/15 04:17, Ivan T. Ivanov wrote:
Following set of patches add initial DT support for PMIC devices
found on recent Quqalcomm chipsets. Details for SPMI bus and PMIC arbiter
could be found
Hi Sricharan,
On Thu, 2015-03-26 at 11:14 +0530, Sricharan R wrote:
+ if (msg-flags I2C_M_RD)
+ qup-rx_tag_len = (qup-blocks 1);
here again.
hmm, why not shift ?
Because it makes reading code harder and because compiler
is smart enough to choose
On Thu, 2015-04-09 at 11:34 +0300, Ivan T. Ivanov wrote:
On recent Qualcomm platforms VBUS and ID lines are not routed to
USB PHY LINK controller. Use extcon framework to receive connect
and disconnect ID and VBUS notification.
Signed-off-by: Ivan T. Ivanov iva...@linaro.org
Hi Felipe
This reverts commit 70843f623b58 (usb: host: ehci-msm: Use
devm_ioremap_resource instead of devm_ioremap), because msm_otg
and this driver are using same address space to access AHB mode
and USB command registers.
Cc: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Ivan T. Ivanov ivan.iva
On Tue, 2015-04-21 at 16:46 +0530, Vivek Gautam wrote:
Hi,
On Tuesday, April 21, 2015 12:41 PM Ivan T. Ivanov
iva...@linaro.org wrote:
This reverts commit 70843f623b58 (usb: host: ehci-msm: Use
devm_ioremap_resource instead of devm_ioremap), because msm_otg
and this driver are using
Add the restart node so we can reboot the device.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 92c96eb
), with multiple inputs
* Thermal sensor device, which is using on chip VADC
channel report PMIC die temperature.
* Power key device, which is responsible for clean system
reboot or shutdown
* RTC device
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
Add SPMI PMIC Arbiter configuration nodes for MSM8916.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm8916
for clean system
reboot or shutdown
* White LED device
* RTC device
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm/boot/dts/qcom-pm8941.dtsi | 133 -
1 file changed, 132 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-pm8941
in the interrupt bidings.
Patches are created top of Kumar's kernel tree and tags/qcom-dt-for-4.1 [1].
[1] https://lkml.org/lkml/2015/3/27/599
[2] http://comments.gmane.org/gmane.linux.ports.arm.msm/12610
Ivan T. Ivanov (7):
ARM: dts: qcom: Add PM8841 functions device nodes
ARM: dts: qcom: Add
Add configuration nodes for multi purpose pins and
thermal sensor devices. Thermal sensor will report
PMIC die temperature.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm/boot/dts/qcom-pm8841.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm
On Thu, 2015-04-16 at 10:42 +0300, Ivan T. Ivanov wrote:
Hi,
On Wed, 2015-04-15 at 21:28 +0530, Vivek Gautam wrote:
On Thu, Apr 9, 2015 at 8:19 PM, Alan Stern st...@rowland.harvard.edu
wrote:
On Thu, 9 Apr 2015, Ivan T. Ivanov wrote:
This allow same IO space to be shared
Add initial device configuration nodes for APQ8016 and PM8916 GPIO's.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
.../arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 30 ++
arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi | 21 +++
arch/arm64/boot
Add configuration nodes for following devices:
* GPIO block, with 22 pins
* MPP block, with 8 pins
* Volatage ADC (VADC), with multiple inputs
* Thermal sensor device, which is using on chip VADC
channel report PMIC die temperature.
* RTC device
Signed-off-by: Ivan T. Ivanov ivan.iva
On Tue, 2015-04-21 at 11:04 -0400, Alan Stern wrote:
On Tue, 21 Apr 2015, Ivan T. Ivanov wrote:
This reverts commit 70843f623b58 (usb: host: ehci-msm: Use
devm_ioremap_resource instead of devm_ioremap), because msm_otg
and this driver are using same address space to access AHB mode
Hi Rajendra,
On Apr 23, 2015, at 11:45 AM, Rajendra Nayak rna...@codeaurora.org wrote:
Remove all clock handling from the driver as this is not handled from
within platform runtime callbacks.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
---
drivers/i2c/busses/i2c-qup.c | 74
On Mon, 2015-04-20 at 10:14 -0400, Alan Stern wrote:
On Mon, 20 Apr 2015, Ivan T. Ivanov wrote:
Hi Alan,
Perhaps I have to resend this patch with updated commit
message? Are they any other obstacles?
Instead of submitting this new patch, would it be okay to revert commit
: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
Changes since v0:
* Add note to patch description that also commit e507bf577e5a is reverted.
drivers/usb/host/ehci-msm.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git
, to reflect supported replicator
version
* Add comment how replicator output port is disabled.
[1] http://www.spinics.net/lists/arm-kernel/msg412873.html
[2] https://lwn.net/Articles/641585/
[3] https://lkml.org/lkml/2015/4/29/241
Ivan T. Ivanov (1):
arm64: dts: qcom: Add msm8916 CoreSight
On recent Qualcomm platforms VBUS and ID lines are not routed to
USB PHY LINK controller. Use extcon framework to receive connect
and disconnect ID and VBUS notification.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
Changes since v0 [1], as per Peter Chen suggestions:
* Moved
Hi Robert,
On Wed, 2015-04-15 at 16:11 +0200, Robert Baldyga wrote:
Hi Ivan,
On 04/15/2015 03:35 PM, Ivan T. Ivanov wrote:
On recent Qualcomm platforms VBUS and ID lines are not routed to
USB PHY LINK controller. Use extcon framework to receive connect
and disconnect ID and VBUS
Hi Sricharan,
On Wed, 2015-04-15 at 20:14 +0530, Sricharan R wrote:
+#define QUP_I2C_MX_CONFIG_DURING_RUN BIT(31)
Could you explain what is this for?
This is a new feature in the V2 version of the controller,
to support multiple i2c sub transfers
Hi,
On Wed, 2015-04-15 at 21:28 +0530, Vivek Gautam wrote:
On Thu, Apr 9, 2015 at 8:19 PM, Alan Stern st...@rowland.harvard.edu wrote:
On Thu, 9 Apr 2015, Ivan T. Ivanov wrote:
This allow same IO space to be shared between HCD and Device
controller driver. Which can be loaded
With 'dx' equal to 0.625V and 15 bit ADC, calculations overflow
when difference against GND is ~20% of the ADC range. Fix this.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/iio/adc/qcom-spmi-vadc.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git
Pin direction configuration was incorrectly overwritten
by output and function values in set_mux(). Fix this.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 1 +
drivers/pinctrl/qcom/pinctrl-spmi-mpp.c | 1 +
2 files changed, 2 insertions
On Apr 13, 2015, at 6:53 AM, Peter Chen peter.c...@freescale.com wrote:
On Thu, Apr 09, 2015 at 11:33:38AM +0300, Ivan T. Ivanov wrote:
On recent Qualcomm platforms VBUS and ID lines are not routed to
USB PHY LINK controller. Use extcon framework to receive connect
and disconnect ID
Hi Sricharan,
On Wed, 2015-04-15 at 12:09 +0530, Sricharan R wrote:
+/* frequency definitions for high speed and max speed */
+#define I2C_QUP_CLK_FAST_FREQ 100
This is fast mode, if I am not mistaken.
ya, up to 1MHZ is fast and up to 3.4MHZ is HS.
We use this
On Wed, 2015-04-01 at 14:54 -0500, Kumar Gala wrote:
On Apr 1, 2015, at 10:05 AM, Ivan T. Ivanov iva...@linaro.org wrote:
Add configuration nodes for multi purpose pins and
thermal sensor devices. Thermal sensor will report
PMIC die temperature.
Signed-off-by: Ivan T. Ivanov iva
Read input buffer when input is enabled, not when it is
disabled. Also fix interpretation of the pmic_gpio_read()
return code, negative value means an error.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 11 ++-
1 file changed, 6
On recent Qualcomm platforms VBUS and ID lines are not routed to
USB PHY LINK controller. Use extcon framework to receive connect
and disconnect ID and VBUS notification.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
Suggestions for better solution are welcome!
.../devicetree
Fix interpretation of the pmic_mpp_read() return code,
negative value means an error.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/pinctrl/qcom/pinctrl-spmi-mpp.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-spmi
This allow same IO space to be shared between HCD and Device
controller driver. Which can be loaded simultaneously and
started/stopped on demand by USB OTG PHY driver.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
drivers/usb/host/ehci-msm.c | 10 +++---
1 file changed, 7
...@codeaurora.org
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
.../devicetree/bindings/usb/msm-hsusb.txt | 4
drivers/usb/phy/phy-msm-usb.c | 26 ++
include/linux/usb/msm_hsusb.h | 5 +
include/linux/usb/msm_hsusb_hw.h
Hi Stephane,
On Mon, 2015-06-01 at 16:28 -0400, Stephane Viau wrote:
Some targets (eg: msm8994) use the pinctrl framework to configure
interface pins. This change adds support for initialization and
pinctrl active/sleep state control for the HDMI driver.
Signed-off-by: Stephane Viau
Following patches add configuration nodes for SPI, I2C, USB and SDHC devices
found in msm8916 and related pinctrl definitions. Also several GPIO have been
incorrectly assigned and are fixed now. LED control devices for apq 8016-sbc
board are added.
Regards,
Ivan
Ivan T. Ivanov (6):
arm64: dts
Create separate file for MSM8916 pinctrl default/sleep pins state
definitions. Move in UART2 states and add SPI, I2C and SDC configurations.
Signed-off-by: Stanimir Varbanov stanimir.varba...@linaro.org
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
Signed-off-by: Ivan T
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
Add sdhci1 and sdhci2 device configuration nodes.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 34
Add device nodes for SPI1, SPI2, SPI3, I2C4, SPI5, SPI6 and
BAM(DMA) engine connected to them.
Signed-off-by: Stanimir Varbanov stanimir.varba...@linaro.org
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 128 ++
1
-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
.../arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 22 --
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
index
Add Host, Device and OTG configuration nodes.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom
Hogging pins from pinctrl driver prevents client drivers
to probe.
Signed-off-by: Ivan T. Ivanov ivan.iva...@linaro.org
---
arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 3 ---
arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi | 3 ---
2 files changed, 6 deletions(-)
diff --git a/arch
401 - 500 of 569 matches
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