[PATCH] drm/msm: add calls to prepare and unprepare panel

Prepare the panel before it's enabled and un-prepare after disable, this will make sure that the regulators are switched on and off correctly. Tested it on APQ8064 based IFC6410 with panel. Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- drivers/gpu/drm/msm/mdp/mdp4

Re: [PATCH v8 2/9] nvmem: Add a simple NVMEM framework for consumers

Thanks Stefan, On 21/07/15 17:25, Stefan Wahren wrote: + + addr = of_get_property(cell_np, reg, len); + if (!addr || (len 2 * sizeof(int))) { I'm not sure, but shouldn't be sizeof(u32) more portable? yes it makes sense, I will change it. [...] + + addr = of_get_property(cell_np, bits,

Re: [PATCH v8 1/9] nvmem: Add a simple NVMEM framework for nvmem providers

On 21/07/15 18:59, Stephen Boyd wrote: On 07/21/2015 02:41 AM, Srinivas Kandagatla wrote: Thanks Stephen for review, On 20/07/15 22:11, Stephen Boyd wrote: On 07/20/2015 07:43 AM, Srinivas Kandagatla wrote: diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c new file mode 100644 index

Re: [PATCH v8 1/9] nvmem: Add a simple NVMEM framework for nvmem providers

On 21/07/15 18:59, Stephen Boyd wrote: On 07/21/2015 02:41 AM, Srinivas Kandagatla wrote: Thanks Stephen for review, On 20/07/15 22:11, Stephen Boyd wrote: On 07/20/2015 07:43 AM, Srinivas Kandagatla wrote: diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c new file mode 100644 index

Re: [PATCH v8 8/9] nvmem: sunxi: Move the SID driver to the nvmem framework

On 21/07/15 17:38, Stefan Wahren wrote: Hi Srinivas, Srinivas Kandagatla srinivas.kandaga...@linaro.org hat am 20. Juli 2015 um 16:44 geschrieben: From: Maxime Ripard maxime.rip...@free-electrons.com Now that we have the nvmem framework, we can consolidate the common driver code. Move

Re: [PATCH v8 8/9] nvmem: sunxi: Move the SID driver to the nvmem framework

On 23/07/15 16:18, Stefan Wahren wrote: Hi Srinivas, Am 20.07.2015 um 16:44 schrieb Srinivas Kandagatla: From: Maxime Ripard maxime.rip...@free-electrons.com Now that we have the nvmem framework, we can consolidate the common driver code. Move the driver to the framework, and hopefully

Re: [PATCH v8 1/9] nvmem: Add a simple NVMEM framework for nvmem providers

On 23/07/15 16:26, Stefan Wahren wrote: Hi Srinivas, Am 20.07.2015 um 16:43 schrieb Srinivas Kandagatla: This patch adds just providers part of the framework just to enable easy review. Up until now, NVMEM drivers like eeprom were stored in drivers/misc, where they all had to duplicate

Re: [PATCH v7 4/9] nvmem: Add bindings for simple nvmem framework

Thanks Rob for quick review, On 10/07/15 20:04, Rob Herring wrote: On Fri, Jul 10, 2015 at 4:45 AM, Srinivas Kandagatla srinivas.kandaga...@linaro.org wrote: This patch adds bindings for simple nvmem framework which allows nvmem consumers to talk to nvmem providers to get access to nvmem cell

Re: [PATCH v7 5/9] Documentation: nvmem: add nvmem api level and how-to doc

On 14/07/15 22:32, Stephen Boyd wrote: On 07/10, Srinivas Kandagatla wrote: diff --git a/Documentation/nvmem/nvmem.txt b/Documentation/nvmem/nvmem.txt new file mode 100644 index 000..b074b71 --- /dev/null +++ b/Documentation/nvmem/nvmem.txt @@ -0,0 +1,152

Re: [PATCH v7 6/9] nvmem: qfprom: Add Qualcomm QFPROM support.

Thanks Stephen for the comments. On 14/07/15 22:18, Stephen Boyd wrote: On 07/10, Srinivas Kandagatla wrote: This patch adds QFPROM support driver which is used by other drivers like thermal sensor and cpufreq. On MSM parts there are some efuses (called qfprom) these fuses store things like

Re: [PATCH v7 3/9] nvmem: Add nvmem_device based consumer apis.

Thanks Stephen, On 14/07/15 23:06, Stephen Boyd wrote: On 07/10, Srinivas Kandagatla wrote: +static int devm_nvmem_device_match(struct device *dev, void *res, void *data) +{ + struct nvmem_device **nvmem = res; + + if (!nvmem || !*nvmem) { + WARN_ON(!nvmem || !*nvmem

[PATCH v8 4/9] nvmem: Add bindings for simple nvmem framework

This patch adds bindings for simple nvmem framework which allows nvmem consumers to talk to nvmem providers to get access to nvmem cell data. Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com [Maxime Ripard: intial version of eeprom framework] Signed-off-by: Srinivas Kandagatla

[PATCH v8 9/9] nvmem: Add to MAINTAINERS for nvmem framework

This patch adds MAINTAINERS to nvmem framework. Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- MAINTAINERS | 9 + 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 8133cef..90e0d94 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7263,6

[PATCH v8 6/9] nvmem: qfprom: Add Qualcomm QFPROM support.

the driver. Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- drivers/nvmem/Kconfig | 15 + drivers/nvmem/Makefile | 4 +++ drivers/nvmem/qfprom.c | 86 ++ 3 files changed, 105 insertions(+) create mode 100644 drivers

[PATCH v8 5/9] Documentation: nvmem: add nvmem api level and how-to doc

This patch add basic how-to and api summary documentation for simple NVMEM framework. Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- Documentation/nvmem/nvmem.txt | 152 ++ 1 file changed, 152 insertions(+) create mode 100644

[PATCH v8 7/9] nvmem: qfprom: Add bindings for qfprom

This patch adds bindings for qfprom found in QCOM SOCs. QFPROM driver is based on simple nvmem framework. Reviewed-by: Stephen Boyd sb...@codeaurora.org Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- Documentation/devicetree/bindings/nvmem/qfprom.txt | 35

[PATCH v8 1/9] nvmem: Add a simple NVMEM framework for nvmem providers

-electrons.com [Maxime Ripard: intial version of eeprom framework] Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- drivers/Kconfig| 2 + drivers/Makefile | 1 + drivers/nvmem/Kconfig | 13 ++ drivers/nvmem/Makefile | 6 + drivers

[PATCH v8 0/9] Add simple NVMEM Framework via regmap.

and do eeprom lookup by using class_find_device() Thanks, srini Maxime Ripard (1): nvmem: sunxi: Move the SID driver to the nvmem framework Srinivas Kandagatla (8): nvmem: Add a simple NVMEM framework for nvmem providers nvmem: Add a simple NVMEM framework for consumers nvmem: Add

[PATCH v8 2/9] nvmem: Add a simple NVMEM framework for consumers

[Maxime Ripard: intial version of the framework] Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- drivers/nvmem/core.c | 415 + include/linux/nvmem-consumer.h | 61 ++ 2 files changed, 476 insertions(+) diff --git a/drivers

[PATCH v8 3/9] nvmem: Add nvmem_device based consumer apis.

, which is what these new APIS provide. These wrapper apis would help such users to avoid code duplication in there drivers and also avoid them reading a big eeprom blob and parsing it internally in there driver. Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- drivers/nvmem/core.c

Re: [PATCH v7 0/9] Add simple NVMEM Framework via regmap.

On 13/07/15 19:54, Stefan Wahren wrote: Hi Srinivas, [add Ezequiel Garcia to CC] Srinivas Kandagatla srinivas.kandaga...@linaro.org hat am 10. Juli 2015 um 11:43 geschrieben: Hi Greg, This patchset adds a new simple NVMEM framework to kernel, and it is tested with various drivers like

Re: [PATCH v7 2/9] nvmem: Add a simple NVMEM framework for consumers

On 13/07/15 20:06, Stefan Wahren wrote: -#include linux/nvmem-provider.h #include linux/export.h #include linux/fs.h #include linux/idr.h #include linux/init.h -#include linux/regmap.h please avoid such changes in your patch series. This should be fixed in the first patch. Sure, I know why

Re: [PATCH v7 0/9] Add simple NVMEM Framework via regmap.

On 13/07/15 21:11, Stefan Wahren wrote: Hi Srinivas, Srinivas Kandagatla srinivas.kandaga...@linaro.org hat am 13. Juli 2015 um 21:35 geschrieben: On 13/07/15 19:54, Stefan Wahren wrote: Hi Srinivas, [...] Providers APIs: nvmem_register/unregister(); How do i get the cell info from

Re: [PATCH v8 1/9] nvmem: Add a simple NVMEM framework for nvmem providers

Hi Stefan, On 21/07/15 10:54, Stefan Wahren wrote: Hi Srinivas, Am 21.07.2015 um 11:41 schrieb Srinivas Kandagatla: Ok, make sense. I moved this too. I have v9 ready will send it. --srini this is not a race. Please give the other (including me:-) ) some time for testing and reviewing v8

Re: [PATCH v8 6/9] nvmem: qfprom: Add Qualcomm QFPROM support.

On 20/07/15 22:20, Stephen Boyd wrote: On 07/20/2015 07:44 AM, Srinivas Kandagatla wrote: This patch adds QFPROM support driver which is used by other drivers like thermal sensor and cpufreq. On MSM parts there are some efuses (called qfprom) these fuses store things like calibration data

Re: [PATCH v8 1/9] nvmem: Add a simple NVMEM framework for nvmem providers

Thanks Stephen for review, On 20/07/15 22:11, Stephen Boyd wrote: On 07/20/2015 07:43 AM, Srinivas Kandagatla wrote: diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c new file mode 100644 index 000..bde5528 --- /dev/null +++ b/drivers/nvmem/core.c @@ -0,0 +1,384 @@ + +static int

[PATCH 0/4] arm64: dts: qcom: add support to LS and HS connectors

Hi Andy, This patchset adds support for i2c and spi on High-Speed and Low speed connectors on DB410c. One of the patch fixes the sleep state of existing i2c node. thanks, srini Srinivas Kandagatla (4): arm64: dts: fix i2c pinconf sleep state function arm64: dts: qcom: Add msm8916 I2C

[PATCH 1/4] arm64: dts: fix i2c pinconf sleep state function

This patch fixes the i2c pinctrl sleep state by changing the pinconf function to be in gpio mode rather than i2c. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[PATCH 4/4] arm64: dts: apq8016-sbc: enable spi buses on LS and HS

This patch enables spi buses on low speed and high speed expansion connectors on DB410C Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dt

[PATCH 3/4] arm64: dts: apq8016-sbc: enable i2c buses on LS and HS

This patch enables i2c buses on low speed and high speed expansion connectors on DB410C. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 15 +++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dt

[PATCH 2/4] arm64: dts: qcom: Add msm8916 I2C nodes.

This patch adds missing support for i2c0 and i2c6, this support is required to connect the i2c slaves on LS expansion on DB410c. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 48 ++ arch/arm6

[PATCH v2 1/4] arm64: dts: fix i2c pinconf sleep state function

This patch fixes the i2c pinctrl sleep state by changing the pinconf function to be in gpio mode rather than i2c. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

Re: [PATCH 2/4] arm64: dts: qcom: Add msm8916 I2C nodes.

On 08/10/15 19:17, Stephen Boyd wrote: On 10/08/2015 04:19 AM, Srinivas Kandagatla wrote: diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 85f7bee..d49ac37 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom

[PATCH v2 4/4] arm64: dts: apq8016-sbc: enable spi buses on LS and HS

This patch enables spi buses on low speed and high speed expansion connectors on DB410C Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dt

[PATCH v2 3/4] arm64: dts: apq8016-sbc: enable i2c buses on LS and HS

This patch enables i2c buses on low speed and high speed expansion connectors on DB410C. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 15 +++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dt

[PATCH v2 2/4] arm64: dts: qcom: Add msm8916 I2C nodes.

This patch adds missing support for i2c0 and i2c6, this support is required to connect the i2c slaves on LS expansion on DB410c. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 48 ++ arch/arm6

Re: [PATCH 4/4] arm64: dts: apq8016-sbc: enable spi buses on LS and HS

On 08/10/15 19:16, Stephen Boyd wrote: On 10/08/2015 04:19 AM, Srinivas Kandagatla wrote: This patch enables spi buses on low speed and high speed expansion connectors on DB410C Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm64/boot/dts/qcom/a

[PATCH v2 0/4] arm64: dts: qcom: add support to LS and HS connectors

of lables for consistency suggested by Stephen Boyd. Srinivas Kandagatla (4): arm64: dts: fix i2c pinconf sleep state function arm64: dts: qcom: Add msm8916 I2C nodes. arm64: dts: apq8016-sbc: enable i2c buses on LS and HS arm64: dts: apq8016-sbc: enable spi buses on LS and HS arch/arm64

[PATCH v7 0/9] Add simple NVMEM Framework via regmap.

and Stephen. * Added non-DT support. * Move kerneldoc to the src files spotted by Mark Brown. * Remove local list and do eeprom lookup by using class_find_device() Thanks, srini Maxime Ripard (1): nvmem: sunxi: Move the SID driver to the nvmem framework Srinivas Kandagatla (8): nvmem: Add a simple

[PATCH v7 4/9] nvmem: Add bindings for simple nvmem framework

This patch adds bindings for simple nvmem framework which allows nvmem consumers to talk to nvmem providers to get access to nvmem cell data. Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com [Maxime Ripard: intial version of eeprom framework] Signed-off-by: Srinivas Kandagatla

[PATCH v7 2/9] nvmem: Add a simple NVMEM framework for consumers

[Maxime Ripard: intial version of the framework] Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- drivers/nvmem/core.c | 424 - include/linux/nvmem-consumer.h | 76 2 files changed, 498 insertions(+), 2 deletions

[PATCH v7 6/9] nvmem: qfprom: Add Qualcomm QFPROM support.

the driver. Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- drivers/nvmem/Kconfig | 15 + drivers/nvmem/Makefile | 4 +++ drivers/nvmem/qfprom.c | 87 ++ 3 files changed, 106 insertions(+) create mode 100644 drivers

[PATCH v7 9/9] nvmem: Add to MAINTAINERS for nvmem framework

This patch adds MAINTAINERS to nvmem framework. Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- MAINTAINERS | 9 + 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 8133cef..b69c11f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7263,6

[PATCH v7 5/9] Documentation: nvmem: add nvmem api level and how-to doc

This patch add basic how-to and api summary documentation for simple NVMEM framework. Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- Documentation/nvmem/nvmem.txt | 152 ++ 1 file changed, 152 insertions(+) create mode 100644

[PATCH v7 3/9] nvmem: Add nvmem_device based consumer apis.

, which is what these new APIS provide. These wrapper apis would help such users to avoid code duplication in there drivers and also avoid them reading a big eeprom blob and parsing it internally in there driver. Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org --- drivers/nvmem/core.c

Re: [PATCH v2 3/6] ARM: dts: apq8064-ifc6410: add notify led support.

On 25/08/15 22:36, Stephen Boyd wrote: On 08/18/2015 06:10 AM, Srinivas Kandagatla wrote: diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index b1f9ddb..08daafe 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts

Re: [PATCH v2 1/6] ARM: dts: ifc6410: Add pwrseq support for WLAN

On 25/08/15 22:33, Stephen Boyd wrote: On 08/18/2015 06:06 AM, Srinivas Kandagatla wrote: @@ -10,6 +11,20 @@ serial1 = _serial; }; +pwrseq { +#address-cells = <1>; +#size-cells = <1>; +ranges; Why do we need any of these three prope

Re: [PATCH 5/9] clk: qcom: gcc-msm8960: add child devices support.

On 09/09/15 04:33, Rajendra Nayak wrote: On 09/09/2015 12:51 AM, Stephen Boyd wrote: On 09/07, Rajendra Nayak wrote: Yeah this might happen though because we've assigned the of_node pointer to the tsens device before we register it on the platform bus. The other way to pass that data down

Re: [PATCH 09/14] ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart

Hi Kevin, Thanks for reporting this issue. On 25/09/15 19:54, Kevin Hilman wrote: Hi Srini, On Fri, Sep 18, 2015 at 5:31 AM, Srinivas Kandagatla <srinivas.kandaga...@linaro.org> wrote: This patch adds missing 2pin uart pinctrl property to gsbi7 uart on IFC6410. Signed-off-by: Sr

Re: [PATCH 0/7] tty: serial: msm: Add DMA support and fix bit definitions

Hi Ivan, On 12/09/15 14:02, Ivan T. Ivanov wrote: Hi, Following patches add DMA support for UARTDM type of hardware. Changes have been tested on UARTDM v1.3(APQ8064) and v1.4(APQ8016). Patches from Gurav were published long ago here[1], I just addressed remaining comments and coding style

[PATCH 13/14] ARM: dts: apq8064-ifc6410: add notify led support.

This patch adds notify led support on IFC6410, whose trigger can be configured from userspace. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 21 + 1 file changed, 21 insertions(+) diff --git a/ar

[PATCH 14/14] ARM: dts: qs600: Add SD card detect support.

This patch adds SD card detect support. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dt

[PATCH 02/14] ARM: dts: ifc6410: remove unnecessary eeprom label

This patch removes unnecessary eeprom label, which is not used anywhere in the board file. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dt

[PATCH 01/14] ARM: dts: apq8064: remove redundant i2c pinctrl properties

This patch removes i2c pinctrl properties from board which which are now mentioned in the SOC specific file. This will avoid redundant properties across multiple board fiiles. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dt

[PATCH 00/14] ARM: dts: apq8064 dt cleanups and additions

entry to qcom-apq8064.dtsi Srinivas Kandagatla (13): ARM: dts: apq8064: remove redundant i2c pinctrl properties ARM: dts: ifc6410: remove unnecessary eeprom label ARM: dts: qs600: remove unnecessary eeprom label ARM: dts: apq8064: add pm8921 rtc ARM: dts: apq8064: add pm8921 pwrkey support

[PATCH 04/14] devicetree: Add hardware rng entry to qcom-apq8064.dtsi

From: John Stultz <john.stu...@linaro.org> Add devicetree data to add support for hw_rng support to the apq8064 dts. Tested on the Nexus7 (2013). Cc: Kumar Gala <ga...@codeaurora.org> Cc: Stephen Boyd <sb...@codeaurora.org> Cc: Srinivas Kandagatla <srinivas.kandaga...@li

[PATCH 05/14] ARM: dts: apq8064: add pm8921 rtc

This patch adds rtc node for pmic8921. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm/boot/dts/qcom-apq8064.dtsi | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index d

[PATCH 10/14] ARM: dts: qs600: Add missing pinctrl property for gsbi7 uart

This patch adds missing 2pin uart pinctrl property to gsbi7 uart on CM-QS600. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.

[PATCH 12/14] ARM: dts: qs600: add pwrseq support to WLAN

Add pwrseq support to sdcc4 which would enable a proper reset of WLAN without ugly hacks in the board support file. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 32 + 1 file chang

[PATCH 06/14] ARM: dts: apq8064: add pm8921 pwrkey support

This patch adds support to pm8921 power button. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm/boot/dts/qcom-apq8064.dtsi | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi

[PATCH 11/14] ARM: dts: ifc6410: Add pwrseq support for WLAN

This patch adds pwrseq for WLAN which resets the WLAN just before the SDIO bus is up. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 28 1 file changed, 28 insertions(+) diff --git a/arch/ar

[PATCH 07/14] ARM: dts: apq8064: Prefix the gsbi6 uart pins correctly

Usage of generic names like "uart_pins" is confusing to the reader, given the fact that there could be more than one uart on APQ8064. This patch adds gsbi prefix to uart pinctrl nodes so as to avoid such confusion. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org&g

[PATCH 03/14] ARM: dts: qs600: remove unnecessary eeprom label

This patch removes unnecessary eeprom label, which is not used anywhere in the board file. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/bo

[PATCH 08/14] ARM: dts: apq8064: add missing gsbi7 uart pinctrl

This patch adds missing gsbi7 uart pinctrl, this is the default debug uart on most boards. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm/boot/dts/qcom-apq8064.dtsi | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dt

[PATCH 09/14] ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart

This patch adds missing 2pin uart pinctrl property to gsbi7 uart on IFC6410. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts

Re: [PATCH v4 0/5] Qualcomm PCIe driver and designware fixes

DT: PCI: qcom: Document PCIe devicetree bindings PCI: qcom: Add Qualcomm PCIe controller driver ARM: dts: apq8064: add pcie devicetree node ARM: dts: ifc6410: enable pcie dt node for this board Thanks for the patches, Tested on IFC6410. Tested-by: Srinivas Kandagatla <srinivas.kand

Re: [PATCH 0/4] arm: dts: qcom-apq8064: add smem and hwspinlock support

On 12/12/15 00:22, Bjorn Andersson wrote: On Fri 11 Dec 10:26 PST 2015, Srinivas Kandagatla wrote: Hi Andy, Here are 3 patches for smem/hwspinlock which I have tested with QDSP on IFC6410. Also a fix from Ivan which I think can be taken aswell. As far as I can tell my patch for adding

[PATCH] clk:gcc-msm8916: add missing mss_q6_bimc_axi clock

This clock is required for loading the qdsp firmware. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- drivers/clk/qcom/gcc-msm8916.c | 18 ++ include/dt-bindings/clock/qcom,gcc-msm8916.h | 1 + 2 files changed, 19 insertions(+) diff

[PATCH 0/2] arm64: dts: qcom: few i2c fixes

Hi Andy, Here are two i2c dt fixes which I have been using for long time on Landing team tree. Can you please consider fixes for v4.5. Thanks, srini Srinivas Kandagatla (2): arm64: dts: fix the i2c aliasing to match to schematics. arm64: dts: set the default i2c pin drive strength

[PATCH 1/2] arm64: dts: fix the i2c aliasing to match to schematics.

This patch fixes the i2c bus number aliasing so that it matches with the schematics bus naming. Without this patch the user might would get bus numbers depending on the order the devices are probed. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm64/boot/dt

[PATCH 2/2] arm64: dts: set the default i2c pin drive strength to 16mA

-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi index 49ec55a..1991af7 100644 ---

Re: [PATCH] clk:gcc-msm8916: add missing mss_q6_bimc_axi clock

On 15/12/15 13:15, Georgi Djakov wrote: Hi Srini, Thanks for the patch. On 12/12/2015 05:39 PM, Srinivas Kandagatla wrote: This clock is required for loading the qdsp firmware. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- drivers/clk/qcom/gcc-msm

[PATCH 0/4] arm: dts: qcom-apq8064: add smem and hwspinlock support

Hi Andy, Here are 3 patches for smem/hwspinlock which I have tested with QDSP on IFC6410. Also a fix from Ivan which I think can be taken aswell. Thanks, srini Ivan T. Ivanov (1): ARM: dts: qcom: apq8064-ifc6410 Use hardware flow control for GSBI6 Srinivas Kandagatla (3): arm: dts

[PATCH 1/4] ARM: dts: qcom: apq8064-ifc6410 Use hardware flow control for GSBI6

From: "Ivan T. Ivanov" GSBI6 UART module is connected to BT chip, which uses hardware flow control lines. Enable them on SoC side. Signed-off-by: Ivan T. Ivanov --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 2 +- 1 file changed, 1

[PATCH v2] clk:gcc-msm8916: add missing mss_q6_bimc_axi clock

This clock is required for loading the qdsp firmware. Signed-off-by: Srinivas Kandagatla <srinivas.kandaga...@linaro.org> --- Changes since v1: fixed parent name as spotted by Georgi drivers/clk/qcom/gcc-msm8916.c | 18 ++ include/dt-bindings/clock/qc

Re: [PATCH] nvmem: qfprom: Specify LE device endianness

Hi Stephen, Thanks for the fix. I will send it to Greg for next rc. --srini On 20/11/15 23:37, Stephen Boyd wrote: The qfprom is a little endian device, but so far we've been relying on the regmap mmio bus handling this for us without explicitly stating that fact. After commit 4a98da2164cf

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