Re: [PATCH v4 2/5] mtd: nand: Qualcomm NAND controller driver

On Wed, Dec 16, 2015 at 05:27:48PM +0530, Archit Taneja wrote: > On 12/16/2015 02:45 PM, Boris Brezillon wrote: > >On Wed, 19 Aug 2015 10:19:03 +0530 > >Archit Taneja wrote: > >>+ return mtd_device_parse_register(mtd, NULL, , NULL, 0); > > > > return

Re: [PATCH v4 1/5] mtd: nand: Create a BBT flag to access bad block markers in raw mode

Hi Boris, On Fri, Oct 02, 2015 at 08:27:38AM +0200, Boris Brezillon wrote: > Brian, Archit, > > On Thu, 1 Oct 2015 19:44:34 -0700 > Brian Norris <computersforpe...@gmail.com> wrote: > > > On Wed, Aug 19, 2015 at 10:19:02AM +0530, Archit Taneja wrote: > &

Re: [PATCH v4 2/5] mtd: nand: Qualcomm NAND controller driver

Hi Archit, On Mon, Oct 05, 2015 at 12:21:54PM +0530, Archit Taneja wrote: > On 10/02/2015 08:35 AM, Brian Norris wrote: > >On Wed, Aug 19, 2015 at 10:19:03AM +0530, Archit Taneja wrote: > >>The Qualcomm NAND controller is found in SoCs like IPQ806x, MSM7xx, > >>MDM9x15

Re: [PATCH v4 2/5] mtd: nand: Qualcomm NAND controller driver

One more nit noticed by my build tests: On Wed, Aug 19, 2015 at 10:19:03AM +0530, Archit Taneja wrote: [...] > +static int qcom_nandc_ecc_init(struct qcom_nandc_data *this) > +{ > + struct mtd_info *mtd = >mtd; > + struct nand_chip *chip = >chip; > + struct nand_ecc_ctrl *ecc =

Re: [PATCH v4 1/5] mtd: nand: Create a BBT flag to access bad block markers in raw mode

On Wed, Aug 19, 2015 at 10:19:02AM +0530, Archit Taneja wrote: > Some controllers can access the factory bad block marker from OOB only > when they read it in raw mode. When ECC is enabled, these controllers > discard reading/writing bad block markers, preventing access to them > altogether. > >

Re: [PATCH v4 2/5] mtd: nand: Qualcomm NAND controller driver

Hi Archit, On Wed, Aug 19, 2015 at 10:19:03AM +0530, Archit Taneja wrote: > The Qualcomm NAND controller is found in SoCs like IPQ806x, MSM7xx, > MDM9x15 series. > > It exists as a sub block inside the IPs EBI2 (External Bus Interface 2) > and QPIC (Qualcomm Parallel Interface Controller). These