On 12/09/2010 11:24 AM, Stephen Caudle wrote:
It is also unreasonable to have one core enabling the PPI on other
cores where the hardware behind the interrupt may not have been
initialized yet. If it is a private interrupt for a private peripheral,
then only the associated CPU should
On 12/01/2010 12:14 PM, Russell King - ARM Linux wrote:
On Wed, Dec 01, 2010 at 11:36:10AM -0500, Stephen Caudle wrote:
On 11/30/2010 01:07 PM, Russell King - ARM Linux wrote:
Sorry, missed this.
If it's a private peripheral, it can only be accessed from its associated
CPU. What that means
On 11/30/2010 01:07 PM, Russell King - ARM Linux wrote:
Sorry, missed this.
If it's a private peripheral, it can only be accessed from its associated
CPU. What that means is you don't want to enable the interrupt on other
CPUs as the peripheral may not be present or initialized on that CPU.
-by: Stephen Caudle scau...@codeaurora.org
---
arch/arm/Kconfig |5 +++
arch/arm/common/gic.c | 86 +
2 files changed, 91 insertions(+), 0 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 30ddd06..7f11e31 100644
--- a/arch
is implemented instead of disable
to allow for lazy IRQ disabling.
Signed-off-by: Stephen Caudle scau...@codeaurora.org
---
arch/arm/Kconfig |5 +++
arch/arm/common/gic.c | 83 +
2 files changed, 88 insertions(+), 0 deletions(-)
diff --git
