Re: [PATCH 1/5] [v2] usb: host: ehci-msm: Allow LS devices to work

2016-01-06 Thread Timur Tabi
Timur Tabi wrote: From: Jack Pham <ja...@codeaurora.org> Disable the silicon quirk which is normally enabled for HSIC host mode. This would otherwise prevent low speed devices from enumerating properly. Signed-off-by: Jack Pham <ja...@codeaurora.org> Signed-off-by: Ti

[PATCH 1/2] [v2] tty: amba-pl011: fix earlycon register offsets

2016-01-04 Thread Timur Tabi
k> Tested-by: Huang Shijie <shijie.hu...@arm.com> Signed-off-by: Timur Tabi <ti...@codeaurora.org> --- drivers/tty/serial/amba-pl011.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c index

Re: [PATCH V10 7/7] dma: qcom_hidma: add support for object hierarchy

2015-12-21 Thread Timur Tabi
On Sat, Dec 19, 2015 at 12:37 PM, Andy Shevchenko wrote: >> +static int __init hidma_mgmt_of_populate_channels(struct device_node *np) >> +{ >> + struct platform_device *pdev_parent = of_find_device_by_node(np); >> + struct platform_device_info pdevinfo; >>

Re: [PATCH] net: emac: emac gigabit ethernet controller driver

2015-12-15 Thread Timur Tabi
David Miller wrote: I think you did something much worse. You quoted the entire huge patch which is entirely inappropriate given the feedback you were trying to give. Sorry about that. I usually do trim it, but I got tired and forgot before I hit send. -- Sent by an employee of the

Re: [PATCH] net: emac: emac gigabit ethernet controller driver

2015-12-15 Thread Timur Tabi
Arnd Bergmann wrote: We generally want to use readl/writel rather than the relaxed versions, unless it is in performance-critical code. What about if we have 20+ writes in a row, for example, when initializing a part? I've seen code like this: writel_relaxed(...);

[PATCH 4/5] [v2] usb: host: ehci-msm: Fix register initialization

2015-12-10 Thread Timur Tabi
g PM suspend/resume support. Signed-off-by: Jack Pham <ja...@codeaurora.org> Signed-off-by: Timur Tabi <ti...@codeaurora.org> --- drivers/usb/host/ehci-msm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c index 102837e..b719

[PATCH 2/5] [v2] usb: host: ehci-msm: Remove dependency on OTG PHY

2015-12-10 Thread Timur Tabi
ndency on having an OTG PHY being present and call usb_add_hcd() directly. Signed-off-by: Jack Pham <ja...@codeaurora.org> Signed-off-by: Timur Tabi <ti...@codeaurora.org> --- drivers/usb/host/ehci-msm.c | 53 ++--- 1 file changed, 31 insertion

[PATCH 1/5] [v2] usb: host: ehci-msm: Allow LS devices to work

2015-12-10 Thread Timur Tabi
From: Jack Pham <ja...@codeaurora.org> Disable the silicon quirk which is normally enabled for HSIC host mode. This would otherwise prevent low speed devices from enumerating properly. Signed-off-by: Jack Pham <ja...@codeaurora.org> Signed-off-by: Timur Tabi <ti...@codeaurora.or

[PATCH 3/5] [v2] usb: host: ehci-msm: Add support for ACPI probing

2015-12-10 Thread Timur Tabi
From: Jack Pham <ja...@codeaurora.org> Allow the EHCI MSM driver to probe against an ACPI enumerated device with ID QCOM8040. Signed-off-by: Jack Pham <ja...@codeaurora.org> Signed-off-by: Timur Tabi <ti...@codeaurora.org> --- drivers/usb/host/ehci-msm.c | 8

Re: [PATCH 2/2] usb: host: ehci-msm: Use posted data writes on AHB

2015-12-10 Thread Timur Tabi
On Fri, Nov 6, 2015 at 12:04 AM, Andy Gross <agr...@codeaurora.org> wrote: > This patch sets the AHBMODE to allow for posted data writes. This > results in higher performance. > > Signed-off-by: Andy Gross <agr...@codeaurora.org> I know it's a little late, but ...

[PATCH 4/5] usb: ehci-msm: Fix register initialization

2015-12-09 Thread Timur Tabi
g PM suspend/resume support. Also, update to use the correct value of AHBMODE to allow data transfers to be posted AHB transactions. This aligns with the value used in the downstream MSM kernel. Signed-off-by: Jack Pham <ja...@codeaurora.org> Signed-off-by: Timur Tabi <ti...@codeaurora.org&g

[PATCH 2/5] usb: ehci-msm: Remove dependency on OTG PHY

2015-12-09 Thread Timur Tabi
ndency on having an OTG PHY being present and call usb_add_hcd() directly. Signed-off-by: Jack Pham <ja...@codeaurora.org> Signed-off-by: Timur Tabi <ti...@codeaurora.org> --- drivers/usb/host/ehci-msm.c | 53 ++--- 1 file changed, 31 insertion

[PATCH 1/5] usb: ehci-msm: Allow LS devices to work

2015-12-09 Thread Timur Tabi
From: Jack Pham <ja...@codeaurora.org> Disable the silicon quirk which is normally enabled for HSIC host mode. This would otherwise prevent low speed devices from enumerating properly. Signed-off-by: Jack Pham <ja...@codeaurora.org> Signed-off-by: Timur Tabi <ti...@codeaurora.or

[PATCH 5/5] usb: ehci-msm: Register usb shutdown function

2015-12-09 Thread Timur Tabi
Samson <asam...@codeaurora.org> Signed-off-by: Timur Tabi <ti...@codeaurora.org> --- drivers/usb/host/ehci-msm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c index b8c0df0..cde3d18 100644 --- a/drivers/usb/host/ehci-msm.c

[PATCH 3/5] usb: ehci-msm: Add support for ACPI probing

2015-12-09 Thread Timur Tabi
From: Jack Pham <ja...@codeaurora.org> Allow the EHCI MSM driver to probe against an ACPI enumerated device with ID QCOM8040. Signed-off-by: Jack Pham <ja...@codeaurora.org> Signed-off-by: Timur Tabi <ti...@codeaurora.org> --- drivers/usb/host/ehci-msm.c | 8

Re: [PATCH 4/5] usb: ehci-msm: Fix register initialization

2015-12-09 Thread Timur Tabi
Jack Pham wrote: Andy already sent a patch for just this register change. http://marc.info/?l=linux-usb=144678991912202=2 I see it's already been queued on Greg's usb-next. I think it would be good to rebase. Ok, I will do that in my next patch version. -- Sent by an employee of the Qualcomm

Re: [PATCH] net: emac: emac gigabit ethernet controller driver

2015-12-09 Thread Timur Tabi
Gilad Avidov wrote: pointer math on void* ? what is the size of void ? I'm talking about adding and subtracting pointer values, so u32 pkt_len =((void *)ip_hdr(skb) - skb->data) -- Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of

Re: [PATCH V4 1/4] dma: qcom_bam_dma: move to qcom directory

2015-11-12 Thread Timur Tabi
Sinan Kaya wrote: @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. + * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. I don't think this is appropriate. You're not making any real changes to this driver, so you can't make any

Re: [PATCH V2 1/3] scsi: mptxsas: try 64 bit DMA when 32 bit DMA fails

2015-11-10 Thread Timur Tabi
On 11/10/2015 10:47 AM, Arnd Bergmann wrote: What BenH was worried about here is that the driver sets different masks for streaming and coherent mappings, which is indeed a worry that could hit us on ARM as well, but I suppose we'll have to deal with that in platform code. Setting both masks to

Re: [PATCH V2 1/3] scsi: mptxsas: try 64 bit DMA when 32 bit DMA fails

2015-11-10 Thread Timur Tabi
On 11/10/2015 01:13 PM, Arnd Bergmann wrote: If the mask is 64-bit by default on ARM64, that is a bug that we need to fix urgently. Can you verify this? I think the mask is 0 by default, because there's no code in ARM64 that actually sets the mask. Take a look at arch_setup_pdev_archdata()

Re: [PATCH V2 1/3] scsi: mptxsas: try 64 bit DMA when 32 bit DMA fails

2015-11-10 Thread Timur Tabi
On 11/10/2015 03:54 PM, Arnd Bergmann wrote: In our drivers for 32-bit devices, we have to explicitly set the DMA mask to 32-bits in order to get any DMA working. Do you mean PCI devices or platform devices? Platform. Maybe the parent bus is lacking a dma-ranges property? All of this

Re: [PATCH V3 3/4] dmaselftest: add memcpy selftest support functions

2015-11-09 Thread Timur Tabi
Sinan Kaya wrote: And why kmalloc anyway? Why not leave it on the stack? char src[] = "hello world"; ? I need to call dma_map_single on this address to convert it to a DMA address. That's why. And you can't do that with an object that's on the stack? -- Sent by an employee of the

Re: [PATCH] acpi: add support for extended IRQ to PCI link

2015-11-09 Thread Timur Tabi
Sinan Kaya wrote: I'm concerned about this though since you warned. This used to consume 1024 bytes now 4096 bytes. static int acpi_irq_penalty[ACPI_MAX_IRQS] = { PIRQ_PENALTY_ISA_ALWAYS,/* IRQ0 timer */ ... } As long as it's not ever put on the stack, it should be fine. -- Sent by

Re: [PATCH V2 2/3] scsi: fix compiler warning for sg

2015-11-09 Thread Timur Tabi
Sinan Kaya wrote: The code says it is using these macros for small integers only which can't overflow. I was trying to get rid of compiler warning and it seems to have disappeared. I would double-check the assembly code, if I were you. I don't like it when warnings just go away like that.

Re: [PATCH V3 3/4] dmaselftest: add memcpy selftest support functions

2015-11-09 Thread Timur Tabi
Sinan Kaya wrote: OK. I did an internal code review before posting the patch. Nobody complained about iterator types. I am trying to find what goes as a good practice vs. what is personal style. I normally check for inappropriate usage of sized integers in my reviews, but I admit I'm

Re: [PATCH V2 2/3] scsi: fix compiler warning for sg

2015-11-09 Thread Timur Tabi
Sinan Kaya wrote: I created this patch back in March with an older version of the compiler and older kernel (3.19). I'm no longer able to reproduce this with this compiler and linux-next. Thread model: posix gcc version 4.8.3 20140401 (prerelease) (crosstool-NG linaro-1.13.1-4.8-2014.04 -

Re: [PATCH V2 1/3] scsi: mptxsas: try 64 bit DMA when 32 bit DMA fails

2015-11-09 Thread Timur Tabi
On 11/09/2015 05:22 PM, Sinan Kaya wrote: if (ioc->dma_mask) consistent_dma_mask = DMA_BIT_MASK(64); else consistent_dma_mask = DMA_BIT_MASK(32); <-- why here? So this change is from this patch: http://permalink.gmane.org/gmane.linux.kernel/1759343 Note that this was

Re: [PATCH] dma: fix returnvar.cocci warnings

2015-11-08 Thread Timur Tabi
Andy Shevchenko wrote: >CC: Sinan Kaya >Signed-off-by: Fengguang Wu Who is the author? I suppose Fengguang is the reporter, right? These are Julia Lawall's coccinelle scripts that automatically run on patches and report problems. Just treat

Re: [PATCH] acpi: add support for extended IRQ to PCI link

2015-11-08 Thread Timur Tabi
Sinan Kaya wrote: 1020 is the maximum interrupt ID that can be directed to an ARM SPI interrupt according to ARM architecture. IMHO, that's something that belongs in the patch description. -- Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is

Re: [PATCH] acpi: add support for extended IRQ to PCI link

2015-11-08 Thread Timur Tabi
Sinan Kaya wrote: -#define ACPI_MAX_IRQS 256 +#define ACPI_MAX_IRQS 1020 Why 1020? Why not 1024? -- Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation. -- To

Re: [PATCH V3 1/4] dma: qcom_bam_dma: move to qcom directory

2015-11-07 Thread Timur Tabi
Sinan Kaya wrote: Creating a QCOM directory for all QCOM DMA source files. Signed-off-by: Sinan Kaya --- drivers/dma/Kconfig| 13 +- drivers/dma/Makefile |2 +- drivers/dma/qcom/Kconfig |9 + drivers/dma/qcom/Makefile |1 +

Re: [PATCH V3 3/4] dmaselftest: add memcpy selftest support functions

2015-11-07 Thread Timur Tabi
Sinan Kaya wrote: +static int dma_selftest_sg(struct dma_device *dmadev, + struct dma_chan *dma_chanptr, u64 size, + unsigned long flags) +{ + dma_addr_t src_dma, dest_dma, dest_dma_it; + u8 *dest_buf; + u32 i, j = 0; +

[PATCH] [v2] pinctrl: add support for Qualcomm Technologies QDF2xxx ARM64 SoCs

2015-07-15 Thread Timur Tabi
will handle all pin control configuration, so this driver does not provide pin control functions. It is effectively a GPIO-only driver. Signed-off-by: Timur Tabi ti...@codeaurora.org --- drivers/pinctrl/qcom/Kconfig | 8 +++ drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl

[PATCH] pinctrl: add support for Qualcomm Technologies QDF2xxx ARM64 SoCs

2015-07-14 Thread Timur Tabi
will handle all pin control configuration, so this driver does not provide pin control functions. It is effectively a GPIO-only driver. Signed-off-by: Timur Tabi ti...@codeaurora.org --- drivers/pinctrl/qcom/Kconfig | 8 +++ drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl

Re: [PATCH 1/2] arm64: qcom: Add define for ARMv8 implementer (MIDR)

2015-06-22 Thread Timur Tabi
Catalin Marinas wrote: So if the second patch is no longer needed, what's using this patch? I would defer merging it until actually required in some part of the kernel. Fair enough. -- Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member

Re: [PATCH 1/2] arm64: qcom: Add define for ARMv8 implementer (MIDR)

2015-06-19 Thread Timur Tabi
On 06/15/2015 05:59 AM, Catalin Marinas wrote: I think this patch together with the second one could go through the kvm tree. For the core arm64 part: Acked-by: Catalin Marinascatalin.mari...@arm.com Suzuki Poulose posted a patch that adds generic support for ARMv8 KVM targets. I want to

Re: [PATCH v2 1/3] pinctrl: Add Qualcomm TLMM driver

2014-11-25 Thread Timur Tabi
On Thu, Dec 5, 2013 at 8:10 PM, Bjorn Andersson bjorn.anders...@sonymobile.com wrote: +static int msm_gpio_init(struct msm_pinctrl *pctrl) +{ + struct gpio_chip *chip; + int irq; + int ret; + int i; + int r; + + chip = pctrl-chip; + chip-base =