Re: [PATCH RFC 06/12] mmc: mmci: Add write delay to variant structure.

2014-04-22 Thread Srinivas Kandagatla

Thanks Felipe,

On 21/04/14 23:08, Felipe Balbi wrote:

+   if (var-reg_write_delay  host-mclk)
+   udelay(1 + ((var-reg_write_delay * USEC_PER_SEC)/host-mclk));

looks like this should be quirk flag instead of a write delay... No
strong feelings though, but it looks like the following would be better,
perhaps:

if (host_is_qualcom(host))
udelay(1 + ((3 * USEC_PER_SEC)/host-mclk));
Am ok with your proposal. I was wondering if someone else might need it 
in future.

If not I could change it as you suggested.

Thanks,
srini


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[PATCH RFC 06/12] mmc: mmci: Add write delay to variant structure.

2014-04-21 Thread srinivas . kandagatla
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org

This patch adds write delay parameter required after each write to controller
registers on some of the SOCs like Qualcomm ones. The delay parameter will
provide information on how many clock cycle delay required after each write.

Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
 drivers/mmc/host/mmci.c |8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 4f8d0ba..86bf330 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -55,6 +55,8 @@ static unsigned int fmax = 515633;
  *   is asserted (likewise for RX)
  * @fifohalfsize: number of bytes that can be written when MCI_TXFIFOHALFEMPTY
  *   is asserted (likewise for RX)
+ * @reg_write_delay: delay in number of clock cycles required after each write
+ *  to controller registers.
  * @sdio: variant supports SDIO
  * @st_clkdiv: true if using a ST-specific clock divider algorithm
  * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl 
register
@@ -72,6 +74,7 @@ struct variant_data {
unsigned intdatalength_bits;
unsigned intfifosize;
unsigned intfifohalfsize;
+   unsigned intreg_write_delay;
boolsdio;
boolst_clkdiv;
boolblksz_datactrl16;
@@ -178,7 +181,12 @@ static inline u32 mmci_readl(struct mmci_host *host, u32 
off)
 
 static inline void mmci_writel(struct mmci_host *host, u32 data, u32 off)
 {
+   struct variant_data *var = host-variant;
+
writel(data, host-base + off);
+
+   if (var-reg_write_delay  host-mclk)
+   udelay(1 + ((var-reg_write_delay * USEC_PER_SEC)/host-mclk));
 }
 
 static int mmci_card_busy(struct mmc_host *mmc)
-- 
1.7.9.5

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