Hi Srinivas,
+static struct variant_data variant_qcom = {
+ .fifosize = 16 * 4,
+ .fifohalfsize = 8 * 4,
+ .clkreg = MCI_CLK_ENABLE,
+ .datalength_bits= 24,
+ .blksz_datactrl4= true,
You get compile
On 23 May 2014 14:51, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
Most of the Qcomm SD card controller registers must be updated to the MCLK
domain so subsequent writes to registers will be ignored until 3 clock cycles
have passed.
This
On 23 May 2014 14:51, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
This patch adds ddrmode mask to variant structure giving more flexibility
to the driver to support more SOCs which have different datactrl register
layout.
Without this
On 23 May 2014 14:52, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
This patch adds 8bit bus enable to variant structure giving more flexibility
to the driver to support more SOCs which have different clock register layout.
Without this patch
On Fri, 2014-05-23 at 13:42 -0500, Kumar Gala wrote:
Ivan T. Ivanov (1):
ARM: debug: qcom: make UART address selection configuration option
This one just landed in linux-next (next-20140526).
It removed the Kconfig options DEBUG_MSM_UART1, DEBUG_MSM_UART3, and
DEBUG_MSM_UART3. It did
On 23.05.14, 19:39, Matthias Brugger wrote:
2014-05-23 17:12 GMT+02:00 Georgi Djakov gdja...@mm-sol.com:
Add information about the APQ8084 debug UART physical and virtual
addresses in the DEBUG_QCOM_UARTDM Kconfig help section.
Requires: https://lkml.org/lkml/2014/4/14/312
Signed-off-by:
On 05/26/2014 03:49 PM, Paul Bolle wrote:
On Fri, 2014-05-23 at 13:42 -0500, Kumar Gala wrote:
Ivan T. Ivanov (1):
ARM: debug: qcom: make UART address selection configuration option
This one just landed in linux-next (next-20140526).
It removed the Kconfig options DEBUG_MSM_UART1
On Mon, 2014-05-26 at 14:49 +0200, Paul Bolle wrote:
On Fri, 2014-05-23 at 13:42 -0500, Kumar Gala wrote:
Ivan T. Ivanov (1):
ARM: debug: qcom: make UART address selection configuration option
This one just landed in linux-next (next-20140526).
It removed the Kconfig options
The Kconfig options DEBUG_MSM_UART1, DEBUG_MSM_UART2 and DEBUG_MSM_UART3
are removed, but they are still referenced in arch/arm/mach-msm/io.c
Fix this by updating the reference to the new Kconfig option.
Reported-by: Paul Bolle pebo...@tiscali.nl
Signed-off-by: Georgi Djakov gdja...@mm-sol.com
On 23 May 2014 14:52, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
On Controllers like Qcom SD card controller where cclk is mclk and mclk should
be directly controlled by the driver.
This patch adds support to control mclk directly in the
On 26 May 2014 16:21, Ulf Hansson ulf.hans...@linaro.org wrote:
On 23 May 2014 14:52, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
On Controllers like Qcom SD card controller where cclk is mclk and mclk
should
be directly controlled by the
On 23 May 2014 14:53, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
MCIFIFOCNT register behaviour on Qcom chips is very different than the other
pl180 integrations. MCIFIFOCNT register contains the number of
words that are still waiting to be
Hi Georgi,
On Mon, 2014-05-26 at 16:58 +0300, Georgi Djakov wrote:
The Kconfig options DEBUG_MSM_UART1, DEBUG_MSM_UART2 and DEBUG_MSM_UART3
are removed, but they are still referenced in arch/arm/mach-msm/io.c
Fix this by updating the reference to the new Kconfig option.
Reported-by: Paul
On 05/26/2014 05:58 PM, Paul Bolle wrote:
Hi Georgi,
Hi Paul,
On Mon, 2014-05-26 at 16:58 +0300, Georgi Djakov wrote:
The Kconfig options DEBUG_MSM_UART1, DEBUG_MSM_UART2 and DEBUG_MSM_UART3
are removed, but they are still referenced in arch/arm/mach-msm/io.c
Fix this by updating the
Hi Ulf,
On 26/05/14 10:10, Ulf Hansson wrote:
Hi Srinivas,
+static struct variant_data variant_qcom = {
+ .fifosize = 16 * 4,
+ .fifohalfsize = 8 * 4,
+ .clkreg = MCI_CLK_ENABLE,
+ .datalength_bits= 24,
+
I am not sure I like this approach. For each and every writel
(including pio_writes) you will add a few cpu cycles, since you need
to check for mclk_delayed_writes no matter of variant.
How about, adding a new function pointer in the struct mmci_host, for
writel operations which you could
On 26/05/14 10:53, Ulf Hansson wrote:
On 23 May 2014 14:51, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
This patch adds ddrmode mask to variant structure giving more flexibility
to the driver to support more SOCs which have different
On 26/05/14 15:34, Ulf Hansson wrote:
This is hot path.
As I suggested for the readl and writel wrapper functions, I think it
would be better to use a function pointer in the struct mmci host,
which you set up in the probe phase. That means the variant data don't
need to be checked each an
2014-05-26 15:45 GMT+02:00 Georgi Djakov gdja...@mm-sol.com:
On 23.05.14, 19:39, Matthias Brugger wrote:
2014-05-23 17:12 GMT+02:00 Georgi Djakov gdja...@mm-sol.com:
Add information about the APQ8084 debug UART physical and virtual
addresses in the DEBUG_QCOM_UARTDM Kconfig help section.
Hi Ulf,
Thanks for the comments.
On 26/05/14 14:05, Ulf Hansson wrote:
On 23 May 2014 14:52, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
This patch adds specifics of clk and datactrl register on Qualcomm SD
Card controller. This patch also
Hi Ulf,
Thankyou for the comments.
On 26/05/14 15:21, Ulf Hansson wrote:
On 23 May 2014 14:52, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
On Controllers like Qcom SD card controller where cclk is mclk and mclk should
be directly controlled
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