On 11/9/2015 2:15 AM, Hannes Reinecke wrote:
On 11/09/2015 02:57 AM, Sinan Kaya wrote:
The mpt2sas and mpt3sas drivers are spinning forever in
their IRQ handlers if there are a lot of jobs queued up
by the PCIe card. This handler is causing spikes for
the rest of the system and sluggish
On 11/9/2015 2:09 AM, Hannes Reinecke wrote:
On 11/09/2015 02:57 AM, Sinan Kaya wrote:
Current code gives up when 32 bit DMA is not supported.
This problem has been observed on systems without any
memory below 4 gig.
This patch tests 64 bit support before bailing out to find
a working
Sinan Kaya wrote:
And why kmalloc anyway? Why not leave it on the stack?
char src[] = "hello world";
?
I need to call dma_map_single on this address to convert it to a DMA
address. That's why.
And you can't do that with an object that's on the stack?
--
Sent by an employee of the
On 11/9/2015 3:59 AM, Arnd Bergmann wrote:
On Monday 09 November 2015 08:09:39 Hannes Reinecke wrote:
On 11/09/2015 02:57 AM, Sinan Kaya wrote:
Current code gives up when 32 bit DMA is not supported.
This problem has been observed on systems without any
memory below 4 gig.
This patch tests
Sinan Kaya wrote:
I'm concerned about this though since you warned. This used to consume
1024 bytes now 4096 bytes.
static int acpi_irq_penalty[ACPI_MAX_IRQS] = {
PIRQ_PENALTY_ISA_ALWAYS,/* IRQ0 timer */
...
}
As long as it's not ever put on the stack, it should be fine.
--
Sent by
On Mon, Nov 9, 2015 at 3:57 AM, Sinan Kaya wrote:
> The MULDIV macro has been designed for small numbers.
> Compiler emits an overflow warning on 64 bit systems.
> This patch uses 64 bit numbers in order to suppress
> warning.
>
> Signed-off-by: Sinan Kaya
On Sunday, November 08, 2015 06:05:48 PM Timur Tabi wrote:
> Sinan Kaya wrote:
> >>
> > 1020 is the maximum interrupt ID that can be directed to an ARM SPI
> > interrupt according to ARM architecture.
>
> IMHO, that's something that belongs in the patch description.
Good point.
Thanks,
Rafael
On 11/9/2015 10:26 PM, Timur Tabi wrote:
Sinan Kaya wrote:
I created this patch back in March with an older version of the compiler
and older kernel (3.19). I'm no longer able to reproduce this with this
compiler and linux-next.
Thread model: posix
gcc version 4.8.3 20140401 (prerelease)
On 11/9/2015 8:48 AM, Timur Tabi wrote:
Sinan Kaya wrote:
And why kmalloc anyway? Why not leave it on the stack?
char src[] = "hello world";
?
I need to call dma_map_single on this address to convert it to a DMA
address. That's why.
And you can't do that with an object that's on
On 11/9/2015 4:26 AM, Andy Shevchenko wrote:
On Mon, Nov 9, 2015 at 5:07 AM, Sinan Kaya wrote:
On 11/8/2015 3:09 PM, Andy Shevchenko wrote:
On Sun, Nov 8, 2015 at 6:52 AM, Sinan Kaya wrote:
This patch adds supporting utility functions
for
Sinan Kaya wrote:
The code says it is using these macros for small integers only which
can't overflow. I was trying to get rid of compiler warning and it seems
to have disappeared.
I would double-check the assembly code, if I were you. I don't like it
when warnings just go away like that.
On 11/9/2015 1:25 PM, Rob Herring wrote:
On Sun, Nov 08, 2015 at 09:17:20PM -0500, Sinan Kaya wrote:
On 11/8/2015 12:08 AM, Timur Tabi wrote:
On 11/8/2015 12:08 AM, Timur Tabi wrote:
Sinan Kaya wrote:
+val = val & ~(MAX_BUS_REQ_LEN_MASK << MAX_BUS_WR_REQ_BIT_POS);
+val = val |
Sinan Kaya wrote:
OK. I did an internal code review before posting the patch. Nobody
complained about iterator types. I am trying to find what goes as a good
practice vs. what is personal style.
I normally check for inappropriate usage of sized integers in my
reviews, but I admit I'm
Hi,
On 10/12/2015 01:33 AM, Brian Norris wrote:
Hi Boris,
On Fri, Oct 02, 2015 at 08:27:38AM +0200, Boris Brezillon wrote:
Brian, Archit,
On Thu, 1 Oct 2015 19:44:34 -0700
Brian Norris wrote:
On Wed, Aug 19, 2015 at 10:19:02AM +0530, Archit Taneja wrote:
Some
On 11/9/2015 2:15 AM, Hannes Reinecke wrote:
On 11/09/2015 02:57 AM, Sinan Kaya wrote:
The mpt2sas and mpt3sas drivers are spinning forever in
their IRQ handlers if there are a lot of jobs queued up
by the PCIe card. This handler is causing spikes for
the rest of the system and sluggish
On Sat, Nov 07, 2015 at 11:53:00PM -0500, Sinan Kaya wrote:
> This patch adds support for hidma engine. The driver
> consists of two logical blocks. The DMA engine interface
> and the low-level interface. The hardware only supports
> memcpy/memset and this driver only support memcpy
> interface.
Hi Bjorn,
On 11/06/2015 10:50 PM, Bjorn Andersson wrote:
> On Mon 04 May 05:42 PDT 2015, Stanimir Varbanov wrote:
>
>> The PCIe driver reuse the Designware common code for host
>> and MSI initialization, and also program the Qualcomm
>> application specific registers.
>>
>
> I want to get the
On 11/06/2015 03:42 AM, Bjorn Andersson wrote:
> On Mon, Jul 6, 2015 at 4:53 AM, Ivan T. Ivanov wrote:
>> Ensure SDCC is working with maximum clock otherwise card
>> detection could be extremely slow, up to 7 seconds.
>>
>> Signed-off-by: Ivan T. Ivanov
On 11/9/2015 8:50 AM, Timur Tabi wrote:
Sinan Kaya wrote:
I'm concerned about this though since you warned. This used to consume
1024 bytes now 4096 bytes.
static int acpi_irq_penalty[ACPI_MAX_IRQS] = {
PIRQ_PENALTY_ISA_ALWAYS,/* IRQ0 timer */
...
}
As long as it's not ever put
On 11/9/2015 9:14 AM, Andy Shevchenko wrote:
Parens are useless, noticed later, sorry.
Isn't mult_frac() enough here?
Btw, can you mention explicitly what is the warning you get
(copy'n'paste of the line would be okay)?
I created this patch back in March with an older version of the
Sinan Kaya wrote:
I created this patch back in March with an older version of the compiler
and older kernel (3.19). I'm no longer able to reproduce this with this
compiler and linux-next.
Thread model: posix
gcc version 4.8.3 20140401 (prerelease) (crosstool-NG
linaro-1.13.1-4.8-2014.04 -
On 11/9/2015 1:19 PM, Rob Herring wrote:
On Sat, Nov 07, 2015 at 11:53:00PM -0500, Sinan Kaya wrote:
This patch adds support for hidma engine. The driver
consists of two logical blocks. The DMA engine interface
and the low-level interface. The hardware only supports
memcpy/memset and this
All these clock controllers are little endian devices, but so far
we've been relying on the regmap mmio bus handling this for us
without explicitly stating that fact. After commit 4a98da2164cf
(regmap-mmio: Use native endianness for read/write, 2015-10-29),
the regmap mmio bus will read/write with
On Monday 09 November 2015 08:09:39 Hannes Reinecke wrote:
> On 11/09/2015 02:57 AM, Sinan Kaya wrote:
> > Current code gives up when 32 bit DMA is not supported.
> > This problem has been observed on systems without any
> > memory below 4 gig.
> >
> > This patch tests 64 bit support before
On Fri, Nov 06, 2015 at 06:41:43PM -0800, Joonwoo Park wrote:
> On Fri, Nov 06, 2015 at 02:57:49PM +0100, Peter Zijlstra wrote:
> > On Tue, Oct 27, 2015 at 09:46:53PM -0700, Joonwoo Park wrote:
> > > @@ -1272,6 +1272,15 @@ void set_task_cpu(struct task_struct *p, unsigned
> > > int new_cpu)
> > >
> "Yaniv" == Yaniv Gardi writes:
I have applied this series.
--
Martin K. Petersen Oracle Linux Engineering
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On 11/09/2015 05:22 PM, Sinan Kaya wrote:
if (ioc->dma_mask)
consistent_dma_mask = DMA_BIT_MASK(64);
else
consistent_dma_mask = DMA_BIT_MASK(32); <-- why here?
So this change is from this patch:
http://permalink.gmane.org/gmane.linux.kernel/1759343
Note that this was
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