Add compatible string for BAM v1.3.0 in the DT bindings documentation. Mentioned
a few more SoCs which have BAM v1.4.0 in them.
Cc: devicet...@vger.kernel.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
Documentation/devicetree/bindings/dma/qcom_bam_dma.txt | 4 +++-
1 file changed
specified in the compatible string.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/dma/qcom_bam_dma.c | 58 +++---
1 file changed, 50 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/qcom_bam_dma.c b/drivers/dma/qcom_bam_dma.c
index
Reviewed-by: Andy Gross agr...@codeaurora.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/dma/qcom_bam_dma.c | 176 +
1 file changed, 113 insertions(+), 63 deletions(-)
diff --git a/drivers/dma/qcom_bam_dma.c b/drivers/dma/qcom_bam_dma.c
Add compatible string for BAM v1.3.0 in the DT bindings documentation. Mentioned
a few more SoCs which have BAM v1.4.0 in them.
Reviewed-by: Kumar Gala ga...@codeaurora.org
Reviewed-by: Andy Gross agr...@codeaurora.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
Update in v2: Added
specified in the compatible string.
Reviewed-by: Kumar Gala ga...@codeaurora.org
Reviewed-by: Andy Gross agr...@codeaurora.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/dma/qcom_bam_dma.c | 58 +++---
1 file changed, 50 insertions(+), 8
Add support for the NAND controller driver for SoC's that contain EBI2. For now,
the only SoC upstream that has EBI2 is IPQ806x.
The patchset requires the ADM dmaengine patches posted by Andy:
http://thread.gmane.org/gmane.linux.ports.arm.msm/11136
Archit Taneja (5):
clk: qcom: Add EBI2
-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/mtd/nand/Kconfig |7 +
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/qcom_nandc.c | 1995 +
3 files changed, 2003 insertions(+)
create mode 100644 drivers/mtd/nand/qcom_nandc.c
diff
The nand controller in IPQ806x is of the 'EBI2 type'. Use the corresponding
compatible string.
Cc: devicet...@vger.kernel.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 19 ++-
1 file changed, 18 insertions(+), 1 deletion
Enable the NAND controller node on the AP148 platform. Provide pinmux
information.
Cc: devicet...@vger.kernel.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 32
1 file changed, 32 insertions(+)
diff --git
Cc: devicet...@vger.kernel.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
.../devicetree/bindings/mtd/qcom_nandc.txt | 48 ++
1 file changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/qcom_nandc.txt
diff --git
-by: Archit Taneja arch...@codeaurora.org
---
drivers/clk/qcom/gcc-ipq806x.c | 34
include/dt-bindings/clock/qcom,gcc-ipq806x.h | 1 +
2 files changed, 35 insertions(+)
diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
index afed5eb
Hi,
On 01/21/2015 06:24 AM, Daniel Ehrenberg wrote:
On Fri, Jan 16, 2015 at 6:48 AM, Archit Taneja arch...@codeaurora.org wrote:
+/*
+ * the bad block marker is readable only when we read the page with ECC
+ * disabled. all the read/write commands like NAND_CMD_READOOB, NAND_CMD_READ0
Add register offset table entry for the newer (v1.7.0) version of the BAM IP
found on MSM8916. Update the DT bindings documentation.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
.../devicetree/bindings/dma/qcom_bam_dma.txt | 1 +
drivers/dma/qcom_bam_dma.c
Hi,
On 01/17/2015 03:26 AM, Stephen Boyd wrote:
On 01/16/2015 06:48 AM, Archit Taneja wrote:
The NAND controller within EBI2 requires EBI2_CLK and EBI2_ALWAYS_ON_CLK clocks.
Create structs for these clocks so that they can be used by the NAND controller
driver. Add an entry for EBI2_AON_CLK
Hi,
On 01/16/2015 08:18 PM, Archit Taneja wrote:
Add support for the NAND controller driver for SoC's that contain EBI2. For now,
the only SoC upstream that has EBI2 is IPQ806x.
The patchset requires the ADM dmaengine patches posted by Andy:
http://thread.gmane.org/gmane.linux.ports.arm.msm
, 0x00 },
[BAM_P_DATA_FIFO_ADDR] = { 0x1824, 0x00, 0x1000, 0x00 },
[BAM_P_DESC_FIFO_ADDR] = { 0x181C, 0x00, 0x1000, 0x00 },
[BAM_P_EVNT_GEN_TRSHLD] = { 0x1828, 0x00, 0x1000, 0x00 },
Didn't know how this crept in. Apologies for the inconvenience!
Reviewed-by: Archit Taneja
On 01/27/2015 02:35 AM, Kevin Cernekee wrote:
On Wed, Jan 21, 2015 at 10:36 PM, Archit Taneja arch...@codeaurora.org wrote:
On 01/21/2015 06:24 AM, Daniel Ehrenberg wrote:
On Fri, Jan 16, 2015 at 6:48 AM, Archit Taneja arch...@codeaurora.org
wrote:
+/*
+ * the bad block marker is readable
Hi,
On 01/08/2015 08:56 AM, Andy Gross wrote:
Signed-off-by: Andy Gross agr...@codeaurora.org
snip
+static struct dma_async_tx_descriptor *adm_prep_slave_sg(struct dma_chan *chan,
+ struct scatterlist *sgl, unsigned int sg_len,
+ enum dma_transfer_direction direction, unsigned
On 03/14/2015 01:15 AM, Stéphane Viau wrote:
Hi,
Hi,
On 03/09/2015 06:41 PM, Stephane Viau wrote:
This change adds the hw configuration for msm8x16 chipsets in
mdp5_cfg module.
Note that only one external display interface is present in this
configuration (DSI) but has not been enabled
On 03/20/2015 10:58 AM, Stephen Boyd wrote:
On 03/04, Archit Taneja wrote:
Currently, a RCG's M/N counter (used for fraction division) is set to either
'bypass' (counter disabled) or 'dual edge' (counter enabled) based on whether
the corresponding rcg struct has a mnd field specified
On 03/09/2015 01:14 PM, Daniel Vetter wrote:
On Mon, Mar 09, 2015 at 11:27:06AM +0530, Archit Taneja wrote:
On 03/05/2015 09:14 PM, Daniel Vetter wrote:
On Thu, Mar 05, 2015 at 07:10:44AM -0500, Rob Clark wrote:
On Thu, Mar 5, 2015 at 5:06 AM, Archit Taneja arch...@codeaurora.org wrote
in certain places.
We replace the #ifdef in imx_drm_driver_load with CONFIG_DRM_FBDEV_EMULATION.
It's probably okay to get remove the #ifdef itself, but just left it here for
now to be safe. It can be removed after some testing.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu
in drm_i915_private struct adding/removing members intel_fbdev and
fbdev_suspend_work has been removed. This helps us use stub drm helper functions
at not much cost.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/i915/Kconfig | 15 ---
drivers/gpu/drm/i915
okay to get remove the #ifdef itself, but just left it here for now to
be safe. It can be removed after some testing.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/sti/Kconfig | 6 --
drivers/gpu/drm/sti/sti_drm_drv.c | 2 +-
2 files changed, 1 insertion(+), 7
of distributions expect the fbdev interface in the kernel.
For now, this config selects both FB_SYS_* and FB_CFB_* configs as some
modesetting drivers use the former and other the later. This needs to be taken
care of in a better way.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm
-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/Kconfig | 14 --
drivers/gpu/drm/msm/Makefile | 2 +-
drivers/gpu/drm/msm/msm_drv.c | 4 ++--
3 files changed, 3 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm
On 03/10/2015 03:17 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015 at 03:11:28PM +0530, Archit Taneja wrote:
Legacy fbdev emulation support via DRM is achieved through KMS FB helpers.
Most modesetting drivers enable provide fbdev emulation by default by selecting
KMS FB helpers. A few provide
On 03/10/2015 03:31 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015 at 03:11:30PM +0530, Archit Taneja wrote:
DRM_I915_FBDEV config is currently used to enable/disable fbdev emulation for
the i915 kms driver.
Replace this with the top level DRM_FBDEV_EMULATION config option. Using this
config
in tegra_drm struct that adds/removes the terga_fbdev member has been
removed completely. This helps in calling stub drm fb helper functions at not
much
cost.
We could clean up fb.c a bit further to reduce the number of #ifdefs, but that's
left for later.
Signed-off-by: Archit Taneja arch
On 03/10/2015 03:35 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015 at 03:22:49PM +0530, Archit Taneja wrote:
On 03/10/2015 03:17 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015 at 03:11:28PM +0530, Archit Taneja wrote:
Legacy fbdev emulation support via DRM is achieved through KMS FB helpers
.
The drivers that provide fbdev emulation by default won't be impacted by
this. However, if we could make all drivers use DRM_FBDEV_EMULATION, it
would clean up individual Kconfigs, and have a centralized place where we
touch FB_* configs.
Archit Taneja (6):
drm: Add top level Kconfig option for DRM fbdev
On 03/10/2015 03:16 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015 at 03:11:28PM +0530, Archit Taneja wrote:
Legacy fbdev emulation support via DRM is achieved through KMS FB helpers.
Most modesetting drivers enable provide fbdev emulation by default by selecting
KMS FB helpers. A few provide
Hi,
On 03/09/2015 06:41 PM, Stephane Viau wrote:
This change adds the hw configuration for msm8x16 chipsets in
mdp5_cfg module.
Note that only one external display interface is present in this
configuration (DSI) but has not been enabled yet. It will be enabled
once drm/msm driver supports DSI
On 03/05/2015 09:14 PM, Daniel Vetter wrote:
On Thu, Mar 05, 2015 at 07:10:44AM -0500, Rob Clark wrote:
On Thu, Mar 5, 2015 at 5:06 AM, Archit Taneja arch...@codeaurora.org wrote:
On 02/23/2015 09:09 PM, Daniel Vetter wrote:
On Mon, Feb 23, 2015 at 10:03:21AM -0500, Rob Clark wrote
On 03/10/2015 09:03 PM, Jani Nikula wrote:
On Tue, 10 Mar 2015, Archit Taneja arch...@codeaurora.org wrote:
On 03/10/2015 03:35 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015 at 03:22:49PM +0530, Archit Taneja wrote:
On 03/10/2015 03:17 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015 at 03
On 03/10/2015 05:47 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015 at 03:52:41PM +0530, Archit Taneja wrote:
On 03/10/2015 03:35 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015 at 03:22:49PM +0530, Archit Taneja wrote:
On 03/10/2015 03:17 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015 at 03:11
On 03/10/2015 04:24 PM, Philipp Zabel wrote:
Hi Archit,
thanks for the cleanup!
Am Dienstag, den 10.03.2015, 15:11 +0530 schrieb Archit Taneja:
DRM_IMX_FB_HELPER config is currently used to enable/disable fbdev emulation for
the imx kms driver.
Remove this local config option and use
On 03/13/2015 02:36 PM, Daniel Vetter wrote:
On Fri, Mar 13, 2015 at 11:55:07AM +0530, Archit Taneja wrote:
On 03/11/2015 08:47 PM, Daniel Vetter wrote:
On Wed, Mar 11, 2015 at 01:51:02PM +0530, Archit Taneja wrote:
On 03/10/2015 05:47 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015
Hi,
On 03/13/2015 02:36 PM, Daniel Vetter wrote:
On Fri, Mar 13, 2015 at 11:55:07AM +0530, Archit Taneja wrote:
On 03/11/2015 08:47 PM, Daniel Vetter wrote:
On Wed, Mar 11, 2015 at 01:51:02PM +0530, Archit Taneja wrote:
On 03/10/2015 05:47 PM, Daniel Vetter wrote:
On Tue, Mar 10, 2015
Hi Hai,
On 03/19/2015 02:35 AM, h...@codeaurora.org wrote:
Hi Archit,
Thanks for your comments. Please see my response for some comments below.
Comments without response will be addressed in patch version 2. I will
wait for other comments if any to push patch V2.
+static int
Hi Stephane,
On 03/14/2015 01:19 AM, Stephane Viau wrote:
Some interfaces (WB, DSI Command Mode) need to be kicked off
through a START Signal. This signal needs to be sent at the right
time and requests in some cases to keep track of the pipeline
status (eg: whether pipeline registers are
On 03/04/2015 09:14 PM, Stéphane Viau wrote:
Hi,
Hi Archit,
On 03/04/2015 12:06 AM, Stephane Viau wrote:
Up until now, we assume that eDP is tight to intf_0 and HDMI to
intf_3. This information shall actually come from the mdp5_cfg
module since it can change from one chip to another.
Hi,
On 03/04/2015 12:06 AM, Stephane Viau wrote:
Up until now, we assume that eDP is tight to intf_0 and HDMI to
intf_3. This information shall actually come from the mdp5_cfg
module since it can change from one chip to another.
Signed-off-by: Stephane Viau sv...@codeaurora.org
---
Hi,
On 03/04/2015 12:06 AM, Stephane Viau wrote:
DSI and WB interfaces need a more complex pipeline configuration
than the current mdp5_ctl_set_intf().
For example, memory output connections need to be selected for
WB. Interface mode (Video vs. Command modes) also need to be
configured for
division.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/clk/qcom/clk-rcg2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index 08b8b37..4fe9c01 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk
v1:
* Addressed comments from Stephen Boyd and Archit Taneja
* Fixed some incorrect offsets, parents etc.
* Driver is tested on MSM8916-MTP device.
For MDSS clocks:
Tested-by: Archit Taneja arch...@codeaurora.org
Thanks,
Archit
--
Qualcomm Innovation Center, Inc. is a member of Code
On 02/23/2015 09:09 PM, Daniel Vetter wrote:
On Mon, Feb 23, 2015 at 10:03:21AM -0500, Rob Clark wrote:
On Mon, Feb 23, 2015 at 9:09 AM, Daniel Vetter dan...@ffwll.ch wrote:
On Mon, Feb 23, 2015 at 08:33:36AM -0500, Rob Clark wrote:
On Mon, Feb 23, 2015 at 5:29 AM, Archit Taneja arch
The DRM_KMS_FB_HELPER config is selected only when DRM_MSM_FBDEV config is
selected. The driver accesses drm_fb_helper_* functions even when legacy fbdev
support is disabled in msm. Wrap around these functions with #ifdef checks to
prevent build break.
Signed-off-by: Archit Taneja arch
Hi Georgi,
On 02/24/2015 09:19 PM, Georgi Djakov wrote:
On 02/24/2015 06:49 AM, Archit Taneja wrote:
Hi,
[..]
+
+static struct freq_tbl ftbl_gcc_mdss_pclk[] = {
+{ .src = P_DSI0_PHYPLL_DSI },
+{ }
+};
+
+static struct clk_rcg2 pclk0_clk_src = {
+.cmd_rcgr = 0x4d084,
This should
Add register offset table entry for the newer (v1.7.0) version of the BAM IP
found on MSM8916. Update the DT bindings documentation.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
Change in v2: Fix wrong execution environment multiplier for BAM_IRQ_SRCS_EE
Hi,
On 02/07/2015 12:28 AM, Georgi Djakov wrote:
This is preliminary and not fully tested patch which adds
support for the global clock controller found on the MSM8916
based devices. It allows the various device drivers to probe
and control their clocks and resets.
Signed-off-by: Georgi Djakov
On 03/24/2015 03:40 AM, Stéphane Viau wrote:
Hi Archit,
Hi Stephane,
On 03/14/2015 01:19 AM, Stephane Viau wrote:
Some interfaces (WB, DSI Command Mode) need to be kicked off
through a START Signal. This signal needs to be sent at the right
time and requests in some cases to keep track of
The NAND controller within EBI2 requires EBI2_CLK and EBI2_ALWAYS_ON_CLK clocks.
Create structs for these clocks so that they can be used by the NAND controller
driver. Add an entry for EBI2_AON_CLK in the gcc-ipq806x DT binding document.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
v2
of such peripherals.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi.xml.h | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h
b/drivers/gpu/drm/msm/dsi/dsi.xml.h
index 1dcfae2..e0f3e62 100644
--- a/drivers
it to configure the bit CLKLN_HS_FORCE_REQUEST
in DSI_LANE_CTRL.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index fdc54e3
Hi,
On 03/17/2015 11:16 AM, Andy Gross wrote:
Add the DMA engine driver for the QCOM Application Data Mover (ADM) DMA
controller found in the MSM8x60 and IPQ/APQ8064 platforms.
The ADM supports both memory to memory transactions and memory
to/from peripheral device transactions. The
-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
index c153077..13dd7dd 100644
--- a/drivers/gpu/drm/msm/mdp
.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
Documentation/devicetree/bindings/drm/msm/dsi.txt | 15 ++
drivers/gpu/drm/msm/dsi/dsi_host.c| 64 +--
2 files changed, 63 insertions(+), 16 deletions(-)
diff --git a/Documentation/devicetree/bindings/drm
We currently get the output connected to LVDS by looking for a phandle
called 'qcom,lvds-panel' under the mdp DT node.
Use the more standard of_graph approach to create an lvds output port,
and retrieve the panel node from the port's endpoint data.
Signed-off-by: Archit Taneja arch
.
The usage of device graphs should also simplify management in dual dsi
mode. I haven't tried this out yet, though.
Archit Taneja (3):
drm/msm: dsi host: add missing of_node_put()
drm/msm: dsi host: Use device graph parsing to parse connected panel
drm/msm: mdp4 lvds: get panel node via
Decrement device node refcount if of_get_child_by_name is successfully
called.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
-by: Archit Taneja arch...@codeaurora.org
Signed-off-by: Wentao Xu went...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 13 +
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h | 2 +
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 33 +---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.c
Decrement device node refcount if of_get_child_by_name is successfully
called.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm
.
The usage of device graphs should also simplify management in dual dsi
mode. I haven't tried this out yet, though.
changes in v2:
- Fix usage of of_node_put()
Archit Taneja (3):
drm/msm: dsi host: add missing of_node_put()
drm/msm: dsi host: Use device graph parsing to parse connected panel
.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
Documentation/devicetree/bindings/drm/msm/dsi.txt | 15 ++
drivers/gpu/drm/msm/dsi/dsi_host.c| 66 ---
2 files changed, 63 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/bindings/drm
We currently get the output connected to LVDS by looking for a phandle
called 'qcom,lvds-panel' under the mdp DT node.
Use the more standard of_graph approach to create an lvds output port,
and retrieve the panel node from the port's endpoint data.
Signed-off-by: Archit Taneja arch
Platforms containing only DSI video mode devices don't need a TE gpio.
Make TE gpio optional.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b
We currently support only panels connected to dsi output. We're going to
also support external bridge chips now.
Change 'panel_node' to 'device_node' in the struct msm_dsi_host and
'panel_flags' to 'device_flags' in msm_dsi. This makes things sound a
bit more generic.
Signed-off-by: Archit
. Later,
this will check if we have an external bridge or not.
This helper isn't used in dsi_connector related code as that's specific
to only when a drm_panel is connected.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi.c | 2 +-
drivers/gpu/drm/msm/dsi
(msm_dsi-bridge) is linked to the external bridge's
drm_bridge struct.
In the case we're connected to an external bridge, we don't need to create
and manage a connector within our driver, it's the bridge driver's
responsibility to create one.
Signed-off-by: Archit Taneja arch...@codeaurora.org
The dsi bridge ops call drm_panel functions to set up the connected
drm_panel. Add checks to make sure these aren't called when we're
connected to an external bridge.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi_manager.c | 43
mentioned above.
Archit Taneja (5):
drm/msm/dsi: Make TE gpio optional
drm/msm/dsi: Refer to connected device as 'device' instead of 'panel'
drm/msm/dsi: Create a helper to check if there is a connected device
drm/msm/dsi: Allow dsi to connect to an external bridge
drm/msm/dsi: Modify
for only the status/clear bits.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 932efab..5bc9544 100644
Add bitfieds in DSI_DLN0_PHY_ERR which are used to report and clear
errors.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi.xml.h | 18 +++---
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h
b
On 06/22/2015 09:30 PM, Srinivas Kandagatla wrote:
On 22/06/15 15:54, Archit Taneja wrote:
Decrement device node refcount if of_get_child_by_name is successfully
called.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 2 ++
1 file changed, 2
compilation flag and module param ?
I guess this won't be hard to do once we have a common fbdev emulation
config option. We could consider this as a drm top level module param.
I'll keep this in mind.
Thanks,
Archit
Benjamin
2015-06-30 9:56 GMT+02:00 Archit Taneja arch...@codeaurora.org
have something in a week or so. I agree it will help a lot (there
are already two new drivers since we started discussing this!)
Archit
-Daniel
On Wed, Mar 25, 2015 at 10:21 AM, Daniel Vetter dan...@ffwll.ch wrote:
On Wed, Mar 25, 2015 at 01:47:54PM +0530, Archit Taneja wrote:
Hi,
On 03/13
On 05/22/2015 07:46 PM, Hai Li wrote:
DSI video mode engine can only take active-high sync signals. This
change prevents MDP5 sending active-low sync signals to DSI in any
case.
Signed-off-by: Hai Li h...@codeaurora.org
Tested-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm
:
- Various fixes and clean ups suggested by Stephen Boyd.
v2:
- Added a new BBT flag that allows us to read BBM in raw mode
- reduce memcpy-s in the driver
- some refactor and clean ups because of above changes
v1:
- original series:
https://lkml.org/lkml/2015/1/16/317
Archit Taneja (5):
mtd
Add DT bindings document for the Qualcomm NAND controller driver.
Cc: devicet...@vger.kernel.org
v4:
- No changes
v3:
- Don't use '0x' when specifying nand controller address space
- Add optional property for on-flash bbt usage
Acked-by: Andy Gross agr...@codeaurora.org
Signed-off-by: Archit
in Kconfig
- Misc fixes and clean ups
v2:
- Use new BBT flag that allows us to read BBM in raw mode
- reduce memcpy-s in the driver
- some refactor and clean ups because of above changes
Reviewed-by: Andy Gross agr...@codeaurora.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/mtd
-by: Archit Taneja arch...@codeaurora.org
---
arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 40
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
index 7f9ea50..648994c 100644
--- a/arch
The nand controller in IPQ806x is of the 'EBI2 type'. Use the corresponding
compatible string.
Cc: devicet...@vger.kernel.org
Reviewed-by: Andy Gross agr...@codeaurora.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 15 +++
1 file
...@codeaurora.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/mtd/nand/nand_base.c | 6 +-
drivers/mtd/nand/nand_bbt.c | 6 +-
include/linux/mtd/bbm.h | 7 +++
3 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers
On 08/20/2015 05:18 PM, Thierry Reding wrote:
On Thu, Aug 20, 2015 at 09:46:14AM +0530, Archit Taneja wrote:
Hi Thierry, Lucas,
On 08/19/2015 08:32 PM, Thierry Reding wrote:
On Wed, Aug 19, 2015 at 04:52:24PM +0200, Lucas Stach wrote:
Am Mittwoch, den 19.08.2015, 16:34 +0200 schrieb
Hi,
On 08/19/2015 01:40 PM, Andrzej Hajda wrote:
On 06/30/2015 07:24 AM, Archit Taneja wrote:
We can have devices where the data bus is MIPI DSI, but the control bus
is something else (i2c, spi etc). A typical example is i2c controlled
encoder bridge chips.
Such devices too require passing
Hi Thierry, Lucas,
On 08/19/2015 08:32 PM, Thierry Reding wrote:
On Wed, Aug 19, 2015 at 04:52:24PM +0200, Lucas Stach wrote:
Am Mittwoch, den 19.08.2015, 16:34 +0200 schrieb Thierry Reding:
On Wed, Aug 19, 2015 at 04:17:08PM +0200, Lucas Stach wrote:
Hi Thierry, Archit,
[...]
Perhaps a
are passed on to the host via mipi_dsi_attach().
This method will require the device driver to get a phandle to the DSI
host since there is no parent-child relation between the two.
Is there a better way to do this? Please let me know!
Archit Taneja (2):
drm/dsi: Create dummy DSI devices
drm
device. The driver
calling this needs to be aware of the mipi_dsi_host it wants to attach
to, and also the DSI virtual channel the DSI device intends to use.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/drm_mipi_dsi.c | 78
of all the hosts DSI that are currently registered.
This list will be used to find the mipi_dsi_host corresponding to the
device_node passed in of_find_mipi_dsi_host_by_node.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/drm_mipi_dsi.c | 30
Hi,
On 07/27/2015 02:29 PM, Laurent Pinchart wrote:
Hi Archit,
(CC'ing Boris Brezillon)
Thank you for the patch.
On Monday 27 July 2015 11:46:57 Archit Taneja wrote:
ADV7511 is represented as an i2c drm slave encoder device. ADV7533, on
the other hand, is going be a normal i2c client device
Decrement device node refcount if of_get_child_by_name is successfully
called.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm
:
- Fix return value checks of of_graph_* calls.
- Don't make port a mandatory DT property
- Fix defer check when no panel node specified
- Rename parse_dt func to align with other dsi_host funcs
Reviewed-by: Hai Li h...@codeaurora.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
.
The usage of device graphs should also simplify management in dual dsi
mode. I haven't tried this out yet, though.
changes in v3:
- Some changes suggested by Hai
- error handling when using of_graph helpers
changes in v2:
- Fix usage of of_node_put()
Archit Taneja (3):
drm/msm: dsi host
to make things
cleaner.
- Force the bridge to connect to a video mode encoder for now (the dsi
mode flags may have not been populated by modeset_init)
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi.c | 28
drivers/gpu/drm/msm
The dsi bridge ops call drm_panel functions to set up the connected
drm_panel. Add checks to make sure these aren't called when we're
connected to an external bridge.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi_manager.c | 43
* calls.
Tested-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 33 -
drivers/gpu/drm/msm/msm_drv.h | 1 +
2 files changed, 25 insertions(+), 9 deletions
We currently support only panels connected to dsi output. We're going to
also support external bridge chips now.
Change 'panel_node' to 'device_node' in the struct msm_dsi_host and
'panel_flags' to 'device_flags' in msm_dsi. This makes things sound a
bit more generic.
Signed-off-by: Archit
Platforms containing only DSI video mode devices don't need a TE gpio.
Make TE gpio optional.
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b
mentioned above.
v2:
- Rebased over v3 of drm/msm: Use device graph to parse connected panels
- Some little tweaks
Archit Taneja (5):
drm/msm/dsi: Make TE gpio optional
drm/msm/dsi: Refer to connected device as 'device' instead of 'panel'
drm/msm/dsi: Create a helper to check
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