Re: [PATCH 8/8] pinctrl: qcom: ssbi: Family A gpio mpp drivers

2015-06-24 Thread Ivan T. Ivanov 
Hi Bjorn, 

On Wed, 2015-06-17 at 23:47 -0700, Bjorn Andersson wrote:
 This introduces pinctrl drivers for gpio and mpp blocks found in family A
 PMICs.
 
 +
 +static struct platform_driver pm8xxx_gpio_driver = {
 +   .driver = {
 +   .name = pm8xxx_gpio,

Name of the SPMI based GPIO PMIC driver is qcom-spmi-gpio.

You know, all of the PMIC's are PM8..something. Could we have 
SSBI in the name of this one?

 +   .of_match_table = pm8xxx_gpio_of_match,
 +   },
 +   .probe = pm8xxx_gpio_probe,
 +   .remove = pm8xxx_gpio_remove,
 +};
 +
 +module_platform_driver(pm8xxx_gpio_driver);
 +
 +MODULE_AUTHOR(Bjorn Andersson anders...@sonymobile.com);
 +MODULE_DESCRIPTION(Qualcomm PM8xxx GPIO driver);

And the same of MPP driver.

Regards,
Ivan
--
To unsubscribe from this list: send the line unsubscribe linux-arm-msm in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 8/8] pinctrl: qcom: ssbi: Family A gpio mpp drivers

2015-06-24 Thread Srinivas Kandagatla 



On 18/06/15 07:47, Bjorn Andersson wrote:

This introduces pinctrl drivers for gpio and mpp blocks found in family A
PMICs.

Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
---
  .../devicetree/bindings/pinctrl/qcom,pmic-mpp.txt  |   5 +
  drivers/pinctrl/qcom/Kconfig   |  12 +
  drivers/pinctrl/qcom/Makefile  |   2 +
  drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c   | 795 ++


Tested the gpio driver with WLAN on IFC6410

Tested-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org


--srini
--
To unsubscribe from this list: send the line unsubscribe linux-arm-msm in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 8/8] pinctrl: qcom: ssbi: Family A gpio mpp drivers

2015-06-18 Thread Bjorn Andersson 
This introduces pinctrl drivers for gpio and mpp blocks found in family A
PMICs.

Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
---
 .../devicetree/bindings/pinctrl/qcom,pmic-mpp.txt  |   5 +
 drivers/pinctrl/qcom/Kconfig   |  12 +
 drivers/pinctrl/qcom/Makefile  |   2 +
 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c   | 795 ++
 drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c| 886 +
 include/dt-bindings/pinctrl/qcom,pmic-mpp.h|  51 ++
 6 files changed, 1751 insertions(+)
 create mode 100644 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
 create mode 100644 drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt 
b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt
index b096d8351b8f..d7803a2a94e9 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt
@@ -7,8 +7,13 @@ of PMIC's from Qualcomm.
Usage: required
Value type: string
Definition: Should contain one of:
+   qcom,pm8018-mpp,
+   qcom,pm8038-mpp,
+   qcom,pm8821-mpp,
qcom,pm8841-mpp,
qcom,pm8916-mpp,
+   qcom,pm8917-mpp,
+   qcom,pm8921-mpp,
qcom,pm8941-mpp,
qcom,pma8084-mpp,
 
diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
index 58f5632b27f4..8eef820b216e 100644
--- a/drivers/pinctrl/qcom/Kconfig
+++ b/drivers/pinctrl/qcom/Kconfig
@@ -76,4 +76,16 @@ config PINCTRL_QCOM_SPMI_PMIC
  which are using SPMI for communication with SoC. Example PMIC's
  devices are pm8841, pm8941 and pma8084.
 
+config PINCTRL_QCOM_SSBI_PMIC
+   tristate Qualcomm SSBI PMIC pin controller driver
+   depends on GPIOLIB  OF
+   select PINMUX
+   select PINCONF
+   select GENERIC_PINCONF
+   help
+ This is the pinctrl, pinmux, pinconf and gpiolib driver for the
+ Qualcomm GPIO and MPP blocks found in the Qualcomm PMIC's chips,
+ which are using SSBI for communication with SoC. Example PMIC's
+ devices are pm8058 and pm8921.
+
 endif
diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile
index 3666c703ce88..e321f7ab325b 100644
--- a/drivers/pinctrl/qcom/Makefile
+++ b/drivers/pinctrl/qcom/Makefile
@@ -9,3 +9,5 @@ obj-$(CONFIG_PINCTRL_MSM8X74)   += pinctrl-msm8x74.o
 obj-$(CONFIG_PINCTRL_MSM8916)  += pinctrl-msm8916.o
 obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-gpio.o
 obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-mpp.o
+obj-$(CONFIG_PINCTRL_QCOM_SSBI_PMIC) += pinctrl-ssbi-gpio.o
+obj-$(CONFIG_PINCTRL_QCOM_SSBI_PMIC) += pinctrl-ssbi-mpp.o
diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c 
b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
new file mode 100644
index ..fb8e9164b16c
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
@@ -0,0 +1,795 @@
+/*
+ * Copyright (c) 2015, Sony Mobile Communications AB.
+ * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/pinctrl/pinctrl.h
+#include linux/pinctrl/pinmux.h
+#include linux/pinctrl/pinconf.h
+#include linux/pinctrl/pinconf-generic.h
+#include linux/slab.h
+#include linux/regmap.h
+#include linux/gpio.h
+#include linux/interrupt.h
+
+#include dt-bindings/pinctrl/qcom,pmic-gpio.h
+
+#include ../core.h
+#include ../pinctrl-utils.h
+
+/* mode */
+#define PM8XXX_GPIO_MODE_ENABLED   BIT(0)
+#define PM8XXX_GPIO_MODE_INPUT 0
+#define PM8XXX_GPIO_MODE_OUTPUT2
+
+/* output buffer */
+#define PM8XXX_GPIO_PUSH_PULL  0
+#define PM8XXX_GPIO_OPEN_DRAIN 1
+
+/* bias */
+#define PM8XXX_GPIO_BIAS_PU_30 0
+#define PM8XXX_GPIO_BIAS_PU_1P51
+#define PM8XXX_GPIO_BIAS_PU_31P5   2
+#define PM8XXX_GPIO_BIAS_PU_1P5_30 3
+#define PM8XXX_GPIO_BIAS_PD4
+#define PM8XXX_GPIO_BIAS_NP5
+
+/* GPIO registers */
+#define SSBI_REG_ADDR_GPIO_BASE0x150
+#define SSBI_REG_ADDR_GPIO(n)  (SSBI_REG_ADDR_GPIO_BASE + n)
+
+#define PM8XXX_BANK_WRITE  BIT(7)
+
+#define PM8XXX_MAX_GPIOS   44
+
+/* custom pinconf parameters */
+#define PM8XXX_QCOM_DRIVE_STRENGH  (PIN_CONFIG_END + 1)
+#define