[PATCH] clk: gpio: handle error codes for of_clk_get_parent_count()

We might make bad memory allocations if we get (e.g.) -ENOSYS from of_clk_get_parent_count(). Noticed by Coverity. Fixes: f66541ba02d5 ("clk: gpio: Get parent clk names in of_gpio_clk_setup()") Signed-off-by: Brian Norris Cc: Jyri Sarha Cc: Sergej

Re: [PATCH v3] clk: s3c2410: removed unneeded variable in s3c24xx_clkout_set_parent

On 30/11/15 11:08, Mutharaju, Prasanna (P.) wrote: > From: Prasanna Karthik > > Remove unneeded variable used to store return value. > > Signed-off-by: Prasanna Karthik Patch applied, thanks. -- To unsubscribe from this list: send the line

Re: [PATCHv2] clk: ti: omap5+: dpll: implement errata i810

* Tero Kristo [151216 01:00]: > Errata i810 states that DPLL controller can get stuck while transitioning > to a power saving state, while its M/N ratio is being re-programmed. > > As a workaround, before re-programming the M/N ratio, SW has to ensure > the DPLL cannot start an

[GIT PULL] clk/samsung updates for v4.5

The following changes since commit 9f9499ae8e6415cefc4fe0a96ad0e27864353c89: Linux 4.4-rc5 (2015-12-13 17:42:58 -0800) are available in the git repository at: git://linuxtv.org/snawrocki/samsung.git tags/clk-samsung-4.5 for you to fetch changes up to

Re: [v2,3/5] clk: qcom: Add MSM8996 Global Clock Control (GCC) driver

On Mon, Nov 30, 2015 at 05:31:40PM -0800, Stephen Boyd wrote: > Add support for the global clock controller found on MSM8996 > based devices. This should allow most non-multimedia device > drivers to probe and control their clocks. > > Signed-off-by: Stephen Boyd > > ---

Re: [PATCH 1/5] clk: rockchip: rk3036: include downstream muxes into fractional dividers

Hi Caesar, [auto build test ERROR on rockchip/for-next] [also build test ERROR on next-20151216] [cannot apply to clk/clk-next v4.4-rc5] url: https://github.com/0day-ci/linux/commits/Caesar-Wang/Kylin-board-is-based-on-RK3036-SOCs-add-the-initiation/20151216-163233 base: https

Re: [PATCH 3/5] ARM: dts: rockchip: update the core dts for rk3036

Hi Caesar, Am Mittwoch, 16. Dezember 2015, 16:27:19 schrieb Caesar Wang: > Update the core dts for rk3036 SoCs. > > 1) Add the display (lcdc, hdmi, vop...) device node. > 2) modify the i2s name to i2s0 and i2s1. >Although there is only one i2s IP inside the rk3036, >we need use all of

[PATCH 0/5] Kylin-board is based on RK3036 SOCs, add the initiation

version for working. This series pacthes have the following decriptions: PATCH[1/5]: clk: rockchip: rk3036: include downstream muxes into fractional dividers This patch is depend on Heiko's series pacthes. a8a1de6 clk: rockchip: include downstream muxes into fractional dividers

[PATCH 3/5] ARM: dts: rockchip: update the core dts for rk3036

Update the core dts for rk3036 SoCs. 1) Add the display (lcdc, hdmi, vop...) device node. 2) modify the i2s name to i2s0 and i2s1. Although there is only one i2s IP inside the rk3036, we need use all of the gpios of i2s0 and i2s1. So, we add the i2s1 IP is the same with i2s0 to support

[PATCH 1/5] clk: rockchip: rk3036: include downstream muxes into fractional dividers

Use the newly introduced possibility to combine the fractional dividers with their downstream muxes for all fractional dividers on currently supported RK3036 SoCs. Signed-off-by: Xing Zheng Signed-off-by: Caesar Wang ---

[PATCH 5/5] ARM: config: Add the rk3036 configure for kylin board

Add RK3036-specific configuration for Kylin board. Signed-off-by: Caesar Wang --- arch/arm/configs/rk3036_kylin_defconfig | 230 1 file changed, 230 insertions(+) create mode 100644 arch/arm/configs/rk3036_kylin_defconfig diff --git

[PATCHv2] clk: ti: omap5+: dpll: implement errata i810

Errata i810 states that DPLL controller can get stuck while transitioning to a power saving state, while its M/N ratio is being re-programmed. As a workaround, before re-programming the M/N ratio, SW has to ensure the DPLL cannot start an idle state transition. SW can disable DPLL idling by

Re: [PATCH v2 3/3] ARM: bcm2835: Add the auxiliary clocks to the device tree.

Hi Eric, Am 16.12.2015 um 00:35 schrieb Eric Anholt: > These will be used for enabling UART1, SPI1, and SPI2. > > Signed-off-by: Eric Anholt > --- > > v2: Make the binding cover both the IRQ and clock enable registers. > > arch/arm/boot/dts/bcm2835.dtsi | 7 +++ > 1 file