Hi James,
Am Dienstag, den 05.01.2016, 14:30 +0800 schrieb James Liao:
> From: Shunli Wang
>
> Add MT2701 clock support, include topckgen, apmixedsys,
> infracfg, pericfg and subsystem clocks.
>
> Signed-off-by: Shunli Wang
> Signed-off-by:
Am Mittwoch, den 30.12.2015, 09:43 +0800 schrieb Jiancheng Xue:
> Add device tree bindings for Hi3519 system controller.
>
> Signed-off-by: Jiancheng Xue
> ---
> Documentation/devicetree/bindings/mfd/hi3519.txt | 14 ++
> 1 file changed, 14 insertions(+)
>
H Jiancheng,
Am Mittwoch, den 30.12.2015, 09:43 +0800 schrieb Jiancheng Xue:
> The CRG(Clock and Reset Generator) block provides clock
> and reset signals for other modules in hi3519 soc.
>
> Signed-off-by: Jiancheng Xue
> ---
>
Am Dienstag, den 05.01.2016, 14:30 +0800 schrieb James Liao:
> From: Shunli Wang
>
> In infrasys and perifsys, there are many reset
> control bits for kinds of modules. These bits are
> used as actual reset controllers to be registered
> into kernel's generic reset
Am Dienstag, den 05.01.2016, 14:30 +0800 schrieb James Liao:
> From: Shunli Wang
>
> Dt-binding file about reset controller is used to provide
> kinds of definition, which is referenced by dts file and
> IC-specified reset controller driver code.
>
> Signed-off-by:
Hi Charles,
[auto build test WARNING on clk/clk-next]
[also build test WARNING on v4.4-rc8 next-20160105]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Charles-Keepax/extcon-arizona-Remove
Now we have a clock driver that can control the 32k clock use this
rather than directly controlling the 32k clock from the MFD device.
Signed-off-by: Charles Keepax
---
drivers/mfd/Kconfig | 1 +
drivers/mfd/arizona-core.c | 104
The 32k clock is unconditionally enabled by the MFD core so there is no
need to control it from the extcon device, so this patch removes the
control of the 32k clock.
Signed-off-by: Charles Keepax
---
drivers/extcon/extcon-arizona.c | 2 --
1 file changed, 2
Allow to unregister fixed factor clock.
Signed-off-by: Masahiro Yamada
---
drivers/clk/clk-fixed-factor.c | 13 +
include/linux/clk-provider.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/drivers/clk/clk-fixed-factor.c
Allow to unregister fixed rate clock.
Signed-off-by: Masahiro Yamada
---
drivers/clk/clk-fixed-rate.c | 13 +
include/linux/clk-provider.h | 2 +-
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/clk-fixed-rate.c
Hello Vladimir Zapolskiy (and other clk devs as well),
The patch f7c82a60ba26: "clk: lpc32xx: add common clock framework
driver" from Dec 6, 2015, leads to the following static checker
warning:
drivers/clk/nxp/clk-lpc32xx.c:1019 clk_mux_get_parent()
warn: signedness bug returning
On 01/05, Charles Keepax wrote:
> Add an initial clock driver for the Arizona series audio CODECs.
> Currently this driver only provides support for parsing the two input
> clocks (mclk1, mclk2) and providing the internally consumed 32k clock.
>
> Signed-off-by: Charles Keepax
Hi Philipp,
Thank you very much for your quick reply.
On 2016/1/5 18:12, Philipp Zabel wrote:
> H Jiancheng,
>
> Am Mittwoch, den 30.12.2015, 09:43 +0800 schrieb Jiancheng Xue:
>> The CRG(Clock and Reset Generator) block provides clock
>> and reset signals for other modules in hi3519 soc.
>>
On 2016/1/5 18:12, Philipp Zabel wrote:
> Am Mittwoch, den 30.12.2015, 09:43 +0800 schrieb Jiancheng Xue:
>> Add device tree bindings for Hi3519 system controller.
>>
>> Signed-off-by: Jiancheng Xue
>> ---
>> Documentation/devicetree/bindings/mfd/hi3519.txt | 14
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