On Fri, 10 Jul 2015 14:46:16 +0900
Krzysztof Kozlowski k.kozlow...@samsung.com wrote:
platform_driver does not need to set an owner because
platform_driver_register() will set it.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Acked-by: Boris Brezillon
On Thu, Jul 09, 2015 at 12:19:53PM +0200, Stephan Mueller wrote:
All GCM implementations available on recent Intel systems successfully tested
(i.e NX and CAAM not tested).
Just to clarify: from a caller's perspective, using seqniv(rfc4106(gcm(aes)))
is still the right invocation? Or
Hi Herbert,
On Wednesday 08 July 2015 09:48 AM, Herbert Xu wrote:
On Tue, Jul 07, 2015 at 09:01:48PM +0530, Lokesh Vutla wrote:
+static int omap_aes_gcm_copy_buffers(struct omap_aes_dev *dd,
+ struct aead_request *req)
[..snip..]
+static int
On Wed, Jul 08, 2015 at 05:54:35PM +0200, Stephan Mueller wrote:
But IIRC, there are systems out there which perform a full hybrid asym
operation. Without having checked in detail, I believe this is true for IBM
cryptoexpress or Cavium cards.
Such systems won't be using the akcipher
On Thu, Jul 09, 2015 at 01:38:07PM +0200, Stephan Mueller wrote:
Actually, I found a problem that I have overlooked initally:
rfc4106-gcm-aesni
causes a problem. For encryption/decryption with the same tests for other
rfc4106 implementations, I get an EINVAL.
Did you update your test
Am Freitag, 10. Juli 2015, 21:39:22 schrieb Herbert Xu:
Hi Herbert,
On Thu, Jul 09, 2015 at 01:38:07PM +0200, Stephan Mueller wrote:
Actually, I found a problem that I have overlooked initally:
rfc4106-gcm-aesni causes a problem. For encryption/decryption with the
same tests for other rfc4106
Am Freitag, 10. Juli 2015, 21:38:02 schrieb Herbert Xu:
Hi Herbert,
On Thu, Jul 09, 2015 at 12:19:53PM +0200, Stephan Mueller wrote:
All GCM implementations available on recent Intel systems successfully
tested (i.e NX and CAAM not tested).
Just to clarify: from a caller's perspective,
Add code that loads the MMP firmware
Signed-off-by: Tadeusz Struk tadeusz.st...@intel.com
---
drivers/crypto/qat/qat_common/adf_accel_devices.h |2 +
drivers/crypto/qat/qat_common/adf_accel_engine.c | 42 ++--
.../crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c |1
This series adds RSA support to the qat driver.
First patch adds the logic in FW loader to load the Modular Math Processor(MMP)
firmware to the device's internal memory.
Second patch adds logic to load MMP firmware from disk.
Third patch adds the actual RSA implementation.
It also contains minor
