Re: [PATCH v6 0/5] /dev/random - a new approach

On Thu, Aug 18, 2016 at 10:49:47PM -0400, Theodore Ts'o wrote: > > That really depends on the system. We can't assume that people are > using systems with a 100Hz clock interrupt. More often than not > people are using tickless kernels these days. That's actually the > problem with changing

Re: [PATCH -next] crypto: fix missing unlock on error in sun4i_hash()

On 19/08/2016 00:42, Wei Yongjun wrote: > Add the missing unlock before return from function sun4i_hash() > in the error handling case. > > Fixes: 477d9b2e591b ("crypto: sun4i-ss - unify update/final function") > Signed-off-by: Wei Yongjun > --- >

Re: [PATCH v6 0/5] /dev/random - a new approach

On Thu, Aug 18, 2016 at 08:39:23PM +0200, Pavel Machek wrote: > > But this is the scary part. Not limited to ssh. "We perform the > largest ever network survey of TLS and SSH servers and present > evidence that vulnerable keys are surprisingly widespread. We find > that 0.75% of TLS certificates

[PATCH -next] crypto: fix missing unlock on error in sun4i_hash()

Add the missing unlock before return from function sun4i_hash() in the error handling case. Fixes: 477d9b2e591b ("crypto: sun4i-ss - unify update/final function") Signed-off-by: Wei Yongjun --- drivers/crypto/sunxi-ss/sun4i-ss-hash.c | 1 + 1 file changed, 1 insertion(+)

[PATCH] crypto: qat - fix aes-xts key sizes

Increase value of supported key sizes for qat_aes_xts. aes-xts keys consists of keys of equal size concatenated. Reported-by: Wenqian Yu Signed-off-by: Giovanni Cabiddu --- drivers/crypto/qat/qat_common/qat_algs.c |4 ++-- 1 files changed,

Re: [PATCH] Add Ingenic JZ4780 hardware RNG driver

On Wed, Aug 17, 2016 at 09:05:51PM +0530, PrasannaKumar Muralidharan wrote: > This patch adds support for hardware random number generator present in > JZ4780 SoC. > > Signed-off-by: PrasannaKumar Muralidharan > --- >

[PATCH] hw_random: Improve description of the ->read() interface

Currently, very few RNG drivers support single byte reads using the ->read() interface. Of the 14 drivers in drivers/char/hw_random that support this interface only three of these actually support max == 1. The other behaviours vary between return 0, return 2, return 4 and return -EIO). This is

Re: [PATCH] Add Ingenic JZ4780 hardware RNG driver

On 18/08/16 12:53, LABBE Corentin wrote: On Thu, Aug 18, 2016 at 10:44:18AM +0530, PrasannaKumar Muralidharan wrote: +static int jz4780_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait) +{ + struct jz4780_rng *jz4780_rng = container_of(rng, struct jz4780_rng, +

[PATCH 2/2] crypto: marvell - Don't break chain for computable last ahash requests

Currently, the driver breaks chain for all kind of hash requests in order to don't override intermediate states of partial ahash updates. However, some final ahash requests can be directly processed by the engine, and so without intermediate state. This is typically the case for most for the HMAC

[PATCH 0/2] Improve DMA chaining for ahash requests

This series contain performance improvement regarding ahash requests. So far, ahash requests were systematically not chained at the DMA level. However, in some case, like this is the case by using IPSec, some ahash requests can be processed directly by the engine, and don't have intermediaire

Re: [PATCH] Add Ingenic JZ4780 hardware RNG driver

On Thu, Aug 18, 2016 at 10:44:18AM +0530, PrasannaKumar Muralidharan wrote: > >> +static int jz4780_rng_read(struct hwrng *rng, void *buf, size_t max, bool > >> wait) > >> +{ > >> + struct jz4780_rng *jz4780_rng = container_of(rng, struct jz4780_rng, > >> +

Re: [PATCH v2] crypto: XTS - remove test that will fail in FIPS mode

Am Mittwoch, 17. August 2016, 15:09:11 CEST schrieb Tapas Sarangi: Hi Tapas, > Is that all the authenc() ciphers, or only some of them ? In my patch I have not yet had the chance to fully dissect the authenc issue yet. > where I had disabled .fips_allowed are mostly authenc() ciphers with >