On 01/25/2017 08:44 AM, Rob Rice wrote:
> Changes in v3:
> - rebase to 4.10-rc3 in cryptodev-2.6 tree
> - in bindings doc, list all valid compatibility strings
> - rename DT nodes "crypto" rather than "spu-crypto"
> - include a separate DT node for each SPU hardware block. Previously,
> there was
On Wed, Jan 25, 2017 at 11:44:47AM -0500, Rob Rice wrote:
> Device tree documentation for Broadcom Secure Processing Unit
> (SPU) crypto hardware.
>
> Signed-off-by: Steve Lin
> Signed-off-by: Rob Rice
> ---
> .../devicetree/bindings/crypto/brcm,spu-crypto.txt | 22
> ++
>
It turns out that this change will negatively impact performance. Please
ignore.
I will submit a V2 patch set.
On 01/30/2017 08:28 AM, Gary R Hook wrote:
The start-of-command bit should be set for every sha
operation.
Signed-off-by: Gary R Hook
---
drivers/crypto/ccp/ccp-ops.c |1 +
1 fi
The reverse-get/set functions can be simplified by
eliminating unused code.
Signed-off-by: Gary R Hook
---
drivers/crypto/ccp/ccp-ops.c | 142 +-
1 file changed, 56 insertions(+), 86 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-ops.c b/drivers/crypt
Move the command queue tail pointer when an error is
detected. Always return the error.
Signed-off-by: Gary R Hook
---
drivers/crypto/ccp/ccp-dev-v5.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/drivers/crypto/ccp/ccp-dev-v5.c
i
The start-of-command bit should be set for every sha
operation.
Signed-off-by: Gary R Hook
---
drivers/crypto/ccp/ccp-ops.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/crypto/ccp/ccp-ops.c b/drivers/crypto/ccp/ccp-ops.c
index 50fae44..1a27af3 100644
--- a/drivers/crypto/ccp/cc
The CCP initialization messages only need to be sent to
syslog in debug mode.
Signed-off-by: Gary R Hook
---
drivers/crypto/ccp/ccp-dev-v5.c |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/drivers/crypto/ccp/ccp-dev-v5.c
index e2ce81
The following series implements:
- Move verbose init messages to debug mode
- Set the start-of-cmmand bit for all SHA operations
- Update the queue pointers in the event of an error
- Simplify buffer management and eliminate an unused option
---
Gary R Hook (4):
crypto: ccp - Change mod
Instead of unconditionally forcing 4 byte alignment for all generic
chaining modes that rely on crypto_xor() or crypto_inc() (which may
result in unnecessary copying of data when the underlying hardware
can perform unaligned accesses efficiently), make those functions
deal with unaligned input expl
Add the CPT options in crypto Kconfig and update the
crypto Makefile
Signed-off-by: George Cherian
Reviewed-by: David Daney
---
drivers/crypto/Kconfig | 1 +
drivers/crypto/Makefile | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 7956
Enable the CPT VF driver. CPT is the cryptographic Acceleration Unit
in Octeon-tx series of processors.
Signed-off-by: George Cherian
Reviewed-by: David Daney
---
drivers/crypto/cavium/cpt/Makefile | 3 +-
drivers/crypto/cavium/cpt/cptvf.h| 135
drivers/crypto/caviu
This series adds the support for Cavium Cryptographic Accelerarion Unit (CPT)
CPT is available in Cavium's Octeon-Tx SoC series.
The series was tested with ecryptfs and dm-crypt for in kernel
Enable the Physical Function driver for the Cavium Crypto Engine (CPT)
found in Octeon-tx series of SoC's. CPT is the Cryptographic Accelaration
Unit. CPT includes microcoded GigaCypher symmetric engines (SEs) and
asymmetric engines (AEs).
Signed-off-by: George Cherian
Reviewed-by: David Daney
-
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