Hi Stephan,
On Mon, Apr 24, 2017 at 02:59:05PM +0200, Stephan Müller wrote:
> Am Montag, 24. April 2017, 09:54:06 CEST schrieb Antoine Tenart:
>
> > +struct safexcel_cipher_ctx {
> > + struct safexcel_context base;
> > + struct safexcel_crypto_priv *priv;
> > +
> > + enum safexcel_cipher_di
From: Christoph Hellwig
Date: Fri, 14 Apr 2017 21:11:31 +0200
> Signed-off-by: Christoph Hellwig
> ---
> drivers/net/ethernet/cavium/liquidio/lio_vf_main.c | 15 +--
> 1 file changed, 1 insertion(+), 14 deletions(-)
>
> diff --git a/drivers/net/ethernet/cavium/liquidio/lio_vf_main
On 04/24/2017 10:35 AM, Christoph Hellwig wrote:
On Mon, Apr 24, 2017 at 02:16:31PM +, Byczkowski, Jakub wrote:
Tested-by: Jakub Byczkowski
Are you (and Doug) ok with queueing this up in the PCI tree?
We are fine however Doug wants to handle it.
-Denny
Am Freitag, 21. April 2017, 09:57:56 BRT schrieb Mimi Zohar:
> On Thu, 2017-04-20 at 17:40 -0300, Thiago Jung Bauermann wrote:
> > @@ -949,49 +936,16 @@ void ima_policy_stop(struct seq_file *m, void *v)
> >
> > #define pt(token) policy_tokens[token + Opt_err].pattern
> > #define mt(token) mask
On Mon, Apr 24, 2017 at 02:16:31PM +, Byczkowski, Jakub wrote:
> Tested-by: Jakub Byczkowski
Are you (and Doug) ok with queueing this up in the PCI tree?
This patch simply replace all occurrence of HMAC IPAD/OPAD value by their
define.
Signed-off-by: Corentin Labbe
---
drivers/crypto/bcm/cipher.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/bcm/cipher.c b/drivers/crypto/bcm/cipher.c
index cc0d5b9..304c7ed
This patch simply replace all occurrence of HMAC IPAD/OPAD value by their
define.
Signed-off-by: Corentin Labbe
---
drivers/crypto/qat/qat_common/qat_algs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/qat/qat_common/qat_algs.c
b/drivers/crypto/qat/qat_
This patch simply replace all occurrence of HMAC IPAD/OPAD value by their
define.
Signed-off-by: Corentin Labbe
---
drivers/crypto/marvell/hash.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto/marvell/hash.c
index 77c0fb9..a
This patch simply replace all occurrence of HMAC IPAD/OPAD value by their
define.
Signed-off-by: Corentin Labbe
---
drivers/crypto/mediatek/mtk-sha.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/mediatek/mtk-sha.c
b/drivers/crypto/mediatek/mtk-sha.c
ind
This patch simply replace all occurrence of HMAC IPAD/OPAD value by their
define.
Signed-off-by: Corentin Labbe
---
drivers/crypto/ccp/ccp-crypto-sha.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-crypto-sha.c
b/drivers/crypto/ccp/ccp-crypto-sha
This patch simply replace all occurrence of HMAC IPAD/OPAD value by their
define.
Signed-off-by: Corentin Labbe
---
drivers/crypto/omap-sham.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index d0b16e5..11e11a6 10
This patch simply replace all occurrence of HMAC IPAD/OPAD value by their
define.
Signed-off-by: Corentin Labbe
---
drivers/crypto/ixp4xx_crypto.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/crypto/ixp4xx_crypto.c b/drivers/crypto/ixp4xx_crypto.c
index 771dd26..3b7680c 100644
--
This patch simply replace all occurrence of HMAC IPAD/OPAD value by their
define.
Signed-off-by: Corentin Labbe
---
drivers/crypto/mv_cesa.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c
index 451fa18..41ae190 100644
-
Many HMAC users directly use directly 0x36/0x5c values.
It's better with crypto to use a name instead of directly some crypto
constant.
This patch simply add HMAC_IPAD_VALUE/HMAC_OPAD_VALUE defines.
Signed-off-by: Corentin Labbe
---
crypto/hmac.c | 4 ++--
include/crypto/hash.h | 3 +++
Tested-by: Jakub Byczkowski
-Original Message-
From: linux-rdma-ow...@vger.kernel.org
[mailto:linux-rdma-ow...@vger.kernel.org] On Behalf Of Christoph Hellwig
Sent: Friday, April 14, 2017 9:11 PM
To: Bjorn Helgaas ; Cabiddu, Giovanni
; Benedetto, Salvatore
; Marciniszyn, Mike
; Daless
Am Montag, 24. April 2017, 09:54:06 CEST schrieb Antoine Tenart:
Hi Antoine,
> +struct safexcel_cipher_ctx {
> + struct safexcel_context base;
> + struct safexcel_crypto_priv *priv;
> +
> + enum safexcel_cipher_direction direction;
> + u32 mode;
> +
> + __le32 key[8];
Can you
On Fri, Apr 21, 2017 at 11:16:05AM +, George Cherian wrote:
>
> -int cvm_aes_encrypt_cbc(struct ablkcipher_request *req)
> +static inline u32 cvm_cipher_type(const char *name)
> {
> - return cvm_enc_dec(req, true, AES_CBC);
> -}
>
> -int cvm_aes_decrypt_cbc(struct ablkcipher_request *req
Milan Broz wrote:
> The cipher_null is not a real cipher, FIPS mode should not restrict its use.
>
> It is used for several tests (for example in cryptsetup testsuite) and also
> temporarily for reencryption of not yet encrypted device in
> cryptsetup-reencrypt tool.
>
> Problem is easily repro
On Fri, Apr 21, 2017 at 09:54:29PM +0100, Giovanni Cabiddu wrote:
> Add crypto_register_scomps and crypto_unregister_scomps to allow
> the registration of multiple implementations with one call.
>
> Signed-off-by: Giovanni Cabiddu
All applied. Thanks.
--
Email: Herbert Xu
Home Page: http://go
On Fri, Apr 21, 2017 at 12:13:49PM +0100, Colin King wrote:
> From: Colin Ian King
>
> trivial spelling mistake, missing r, rename to ce_ring_control
>
> Signed-off-by: Colin Ian King
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http:/
On Mon, Apr 24, 2017 at 11:15:23AM +0200, Stephan Müller wrote:
> Am Montag, 24. April 2017, 11:03:13 CEST schrieb Herbert Xu:
>
> Hi Herbert,
>
> > On Mon, Apr 24, 2017 at 11:01:50AM +0200, Stephan Müller wrote:
> > > Shall I send an updated patch with aead_sock_destruct cleared?
> >
> > Yes pl
On Fri, Apr 21, 2017 at 10:49:56AM -0500, Gary R Hook wrote:
> he CCP has the ability to perform several operations
> simultaneously, but only one interrupt. The current design
> exposes a window when using MSI/MSI-X interrupts wherein
> state can change but no interrupt is generated; this can
> le
Am Montag, 24. April 2017, 12:22:39 CEST schrieb Herbert Xu:
Hi Herbert,
> Patch applied. Thanks.
Thank you.
The patch regarding the memory management of algif_aead is affected by this
change as well. Shall I roll a new version of that patch for algif_aead or do
you want me to wait for anoth
Am Montag, 24. April 2017, 11:03:13 CEST schrieb Herbert Xu:
Hi Herbert,
> On Mon, Apr 24, 2017 at 11:01:50AM +0200, Stephan Müller wrote:
> > Shall I send an updated patch with aead_sock_destruct cleared?
>
> Yes please.
Please find attached v2 with the discussed change.
---8<---
Some cipher
On Mon, Apr 24, 2017 at 11:01:50AM +0200, Stephan Müller wrote:
>
> Shall I send an updated patch with aead_sock_destruct cleared?
Yes please.
Thanks,
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
Am Montag, 24. April 2017, 10:43:24 CEST schrieb Herbert Xu:
Hi Herbert,
> On Fri, Apr 21, 2017 at 06:35:07PM +0200, Stephan Müller wrote:
> > After checking again, IMHO that is no unreleated cleanup or even a cleanup
> > at all.
> >
> > void *private used to be struct crypto_aead and is now str
On Thu, Apr 20, 2017 at 01:50:34PM -0700, Megha Dey wrote:
>
> +static int simd_skcipher_decrypt_mb(struct skcipher_request *req)
> +{
> + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
> + struct simd_skcipher_ctx_mb *ctx = crypto_skcipher_ctx(tfm);
> + struct skcipher_requ
Hi Igal,
On Mon, Apr 24, 2017 at 08:50:32AM +, Igal Liberman wrote:
> [...]
>
> > + priv->clk = of_clk_get(dev->of_node, 0);
> > + if (!IS_ERR(priv->clk)) {
> > + ret = clk_prepare_enable(priv->clk);
> > + if (ret) {
> > + dev_err(dev, "unable to enab
[...]
> + priv->clk = of_clk_get(dev->of_node, 0);
> + if (!IS_ERR(priv->clk)) {
> + ret = clk_prepare_enable(priv->clk);
> + if (ret) {
> + dev_err(dev, "unable to enable clk (%d)\n", ret);
> + return ret;
> + }
>
On Fri, Apr 21, 2017 at 06:35:07PM +0200, Stephan Müller wrote:
>
> After checking again, IMHO that is no unreleated cleanup or even a cleanup at
> all.
>
> void *private used to be struct crypto_aead and is now struct aead_tfm.
> struct
> crypto_aead is found in private->aead. Hence, the patch
On Mon, Apr 24, 2017 at 09:04:19AM +0100, Ard Biesheuvel wrote:
>
> Yes please.
OK, patch reverted.
Thanks,
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On 24 April 2017 at 09:00, Herbert Xu wrote:
> On Tue, Apr 18, 2017 at 10:34:01AM -0700, Matthias Kaehlcke wrote:
>> El Tue, Apr 18, 2017 at 04:35:02PM +0100 Ard Biesheuvel ha dit:
>>
>> > On 18 April 2017 at 15:47, Paul Gortmaker
>> > wrote:
>> > > On Wed, Apr 5, 2017 at 2:34 PM, Matthias Kaehl
On Tue, Apr 18, 2017 at 10:34:01AM -0700, Matthias Kaehlcke wrote:
> El Tue, Apr 18, 2017 at 04:35:02PM +0100 Ard Biesheuvel ha dit:
>
> > On 18 April 2017 at 15:47, Paul Gortmaker
> > wrote:
> > > On Wed, Apr 5, 2017 at 2:34 PM, Matthias Kaehlcke
> > > wrote:
> > >> The operand is an integer
A new cryptographic engine driver was added in
drivers/crypto/inside-secure. Add myself as a maintainer for this
driver.
Signed-off-by: Antoine Tenart
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c265a5fe4848..7240b9bca638 100644
--- a
The Inside Secure Safexcel cryptographic engine is found on some Marvell
SoCs (7k/8k). Document the bindings used by its driver.
Signed-off-by: Antoine Tenart
---
.../bindings/crypto/inside-secure-safexcel.txt | 27 ++
1 file changed, 27 insertions(+)
create mode 100644
Add support for Inside Secure SafeXcel EIP197 cryptographic engine,
which can be found on Marvell Armada 7k and 8k boards. This driver
currently implements: ecb(aes), cbc(aes), sha1, sha224, sha256 and
hmac(sah1) algorithms.
Two firmwares are needed for this engine to work. Their are mostly used
f
Hi all,
This series adds support for the Inside Secure SafeXcel EIP197
cryptographic engine which can be found on Marvell Armada 7k and 8k
boards. A new cryptographic engine driver is added, as well as the
relevant device tree definition for the Armada 7040 DB and 8040 DB
boards.
This driver need
Am Montag, 24. April 2017, 09:07:45 CEST schrieb Gilad Ben-Yossef:
Hi Gilad,
> I guess we could change the function to indicate that a key is valid
> for decryption but not encryption
> and have the implementation limiting based on that if there is an
> interest in SP800-131A compliance.
I would
Am Montag, 24. April 2017, 09:04:13 CEST schrieb Gilad Ben-Yossef:
Hi Gilad,
>
> Thanks you for the clarification. As I think is obvious by now I am
> not a FIPS expert by any stretch.
>
> Isn't the requirements on DRBG or KDF invocations pertain to key
> generation only?
> What happens if you
On Mon, Apr 24, 2017 at 9:21 AM, Stephan Müller wrote:
> Am Montag, 24. April 2017, 08:16:50 CEST schrieb Stephan Müller:
>
> Hi Gilad,
>
>> >
>> > int __des3_ede_setkey(u32 *expkey, u32 *flags, const u8 *key,
>> >
>> > unsigned int keylen)
>> >
>> > However, this does not ch
On Mon, Apr 24, 2017 at 9:16 AM, Stephan Müller wrote:
> Am Montag, 24. April 2017, 08:06:09 CEST schrieb Gilad Ben-Yossef:
>
> Hi Gilad,
>>
>> Well, it turns out there is and we do :-)
>>
>> This is from crypto/des_generic.c:
>>
>> /*
>> * RFC2451:
>> *
>> * For DES-EDE3, there is no known n
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