[PATCH 04/13] crypto: crypto4xx: increase context and scatter ring buffer elements

If crypto4xx is used in conjunction with dm-crypt, the available ring buffer elements are not enough to handle the load properly. On an aes-cbc-essiv:sha256 encrypted swap partition the read performance is abyssal: (tested with hdparm -t) /dev/mapper/swap_crypt: Timing buffered disk reads: 14

[PATCH 02/13] crypto: crypto4xx: fix off-by-one AES-OFB

I used aes-cbc as a template for ofb. But sadly I forgot to update set_key method to crypto4xx_setkey_aes_ofb(). this was caught by the testmgr: alg: skcipher: Test 1 failed (invalid result) on encr. for ofb-aes-ppc4xx : 76 49 ab ac 81 19 b2 46 ce e9 8e 9b 12 e9 19 7d 0010: 50 86 cb

[PATCH 06/13] crypto: crypto4xx: use the correct LE32 format for IV and key defs

The hardware expects that the keys, IVs (and inner/outer hashes) are in the le32 format. This patch changes all hardware interface declarations to use the correct LE32 data format for each field. In order to pass __CHECK_ENDIAN__ checks, crypto4xx_memcpy_le has to be honest about the endianness

[PATCH 03/13] crypto: crypto4xx: fix type mismatch compiler error

This patch fixes a type mismatch error that I accidentally introduced when I moved and refactored the dynamic_contents helpers. Signed-off-by: Christian Lamparter --- drivers/crypto/amcc/crypto4xx_sa.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[PATCH 09/13] crypto: crypto4xx: fix stalls under heavy load

If the crypto4xx device is continuously loaded by dm-crypt and ipsec work, it will start to work intermittent after a few (between 20-30) seconds, hurting throughput and latency. This patch contains various stability improvements in order to fix this issue. So far, the hardware has survived more

[RFC 12/13] crypto: crypto4xx: add aes-ccm support

This patch adds aes-ccm support. Signed-off-by: Christian Lamparter --- drivers/crypto/amcc/crypto4xx_alg.c | 185 +++ drivers/crypto/amcc/crypto4xx_core.c | 23 + drivers/crypto/amcc/crypto4xx_core.h | 8 ++ 3 files changed, 216

[RFC 11/13] crypto: crypto4xx: prepare for AEAD support

This patch enhances existing interfaces and functions to support AEAD ciphers in the next patches. Signed-off-by: Christian Lamparter --- drivers/crypto/Kconfig | 4 + drivers/crypto/amcc/crypto4xx_alg.c | 19 +-- drivers/crypto/amcc/crypto4xx_core.c | 217

[PATCH 05/13] crypto: crypto4xx: add backlog queue support

Previously, If the crypto4xx driver used all available security contexts, it would simply refuse new requests with -EAGAIN. CRYPTO_TFM_REQ_MAY_BACKLOG was ignored. in case of dm-crypt.c's crypt_convert() function this was causing the following errors to manifest, if the system was pushed hard

[PATCH 01/13] crypto: crypto4xx: wire up hmac_mc to hmac_muting

The hmac_mc parameter of set_dynamic_sa_command_1() was defined but not used. On closer inspection it turns out, it was never wired up. Signed-off-by: Christian Lamparter --- drivers/crypto/amcc/crypto4xx_alg.c | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH 10/13] crypto: crypto4xx: simplify sa and state context acquisition

Thanks to the big overhaul of crypto4xx_build_pd(), the request-local sa_in, sa_out and state_record allocation can be simplified. There's no need to setup any dma coherent memory anymore and much of the support code can be removed. Signed-off-by: Christian Lamparter ---

[PATCH 08/13] crypto: crypto4xx: fix various warnings

crypto4xx_core.c:179:6: warning: symbol 'crypto4xx_free_state_record' was not declared. Should it be static? crypto4xx_core.c:331:5: warning: symbol 'crypto4xx_get_n_gd' was not declared. Should it be static? crypto4xx_core.c:652:6: warning: symbol 'crypto4xx_return_pd' was

[RFC 13/13] crypto: crypto4xx: add aes-gcm support

This patch adds aes-gcm support to crypto4xx. Signed-off-by: Christian Lamparter --- drivers/crypto/amcc/crypto4xx_alg.c | 139 +++ drivers/crypto/amcc/crypto4xx_core.c | 22 ++ drivers/crypto/amcc/crypto4xx_core.h | 4 + 3 files

Re: [PATCH V2] Fix a sleep-in-atomic bug in shash_setkey_unaligned

On Tue, Oct 03, 2017 at 07:33:08PM -0300, Marcelo Ricardo Leitner wrote: > On Tue, Oct 03, 2017 at 10:25:22AM +0800, Jia-Ju Bai wrote: > > The SCTP program may sleep under a spinlock, and the function call path is: > > sctp_generate_t3_rtx_event (acquire the spinlock) > > sctp_do_sm > >

Re: [PATCH V2] Fix a sleep-in-atomic bug in shash_setkey_unaligned

On Tue, Oct 03, 2017 at 01:26:43PM +0800, Herbert Xu wrote: > On Mon, Oct 02, 2017 at 09:18:24PM -0700, Andy Lutomirski wrote: > > > On Oct 2, 2017, at 7:25 PM, Jia-Ju Bai wrote: > > > > > > The SCTP program may sleep under a spinlock, and the function call path > > > is: >

Re: [PATCH V2] Fix a sleep-in-atomic bug in shash_setkey_unaligned

On Tue, Oct 03, 2017 at 10:25:22AM +0800, Jia-Ju Bai wrote: > The SCTP program may sleep under a spinlock, and the function call path is: > sctp_generate_t3_rtx_event (acquire the spinlock) > sctp_do_sm > sctp_side_effects > sctp_cmd_interpreter > sctp_make_init_ack >

Re: [PATCH] iommu/vt-d: Fix scatterlist offset handling

| From: Harsh Jain | Sent: Tuesday, October 3, 2017 5:22 AM | | Hi Robin/Ashok, | | Find attached trace of DMA write error. I had a look on trace but didn't | find anything suspicious. | | Let me know if you need more trace. As a reminder, Harsh and Atul will be waking up in a

Re: [PATCH] iommu/vt-d: Fix scatterlist offset handling

On Tue, 2017-10-03 at 19:05 +0100, Robin Murphy wrote: > > Now, there are indeed plenty of drivers and subsystems which do work on > lists of explicitly single pages - anything doing some variant of > "addr = kmap_atomic(sg_page(sg)) + sg->offset;" is easy to spot - but I > don't think DMA API

Re: [PATCH v3] crypto: s5p-sss: Add HASH support for Exynos

On Tue, Oct 03, 2017 at 04:57:43PM +0200, Kamil Konieczny wrote: > >> [...] > >> +static struct ahash_alg algs_sha256[] = { > >> +{ > >> + .init = s5p_hash_init, > >> + .update = s5p_hash_update, > >> + .final = s5p_hash_final, > >> + .finup =

Re: [PATCH] iommu/vt-d: Fix scatterlist offset handling

On 03/10/17 13:55, David Woodhouse wrote: > On Thu, 2017-09-28 at 15:14 +0100, Robin Murphy wrote: >> The intel-iommu DMA ops fail to correctly handle scatterlists where >> sg->offset is greater than PAGE_SIZE - the IOVA allocation is computed >> appropriately based on the page-aligned portion of

Re: [PATCH V2] Fix a sleep-in-atomic bug in shash_setkey_unaligned

On Mon, Oct 2, 2017 at 10:26 PM, Herbert Xu wrote: > On Mon, Oct 02, 2017 at 09:18:24PM -0700, Andy Lutomirski wrote: >> > On Oct 2, 2017, at 7:25 PM, Jia-Ju Bai wrote: >> > >> > The SCTP program may sleep under a spinlock, and the function call

Re: [PATCH v2] staging: ccree: Convert to platform_{get,set}_drvdata()

On Thu, Sep 21, 2017 at 05:47:42PM +0530, suni...@techveda.org wrote: > From: Suniel Mahesh > > Platform devices are expected to use wrapper functions, > platform_{get,set}_drvdata() with platform_device as argument, > for getting and setting the driver data.

Re: [Part2 PATCH v4 05/29] crypto: ccp: Add Platform Security Processor (PSP) device support

On 10/03/2017 11:17 AM, Borislav Petkov wrote: ... No, please add my patch below to your set for the CRYPTO_DEV_CCP_DD dependency as it is a separate thing. Your patch should concentrate only on adding the PSP and its dependencies. Sure, I will include your patch in my series. thanks

Re: [Part2 PATCH v4 05/29] crypto: ccp: Add Platform Security Processor (PSP) device support

On Sun, Oct 01, 2017 at 03:05:11PM -0500, Brijesh Singh wrote: > I think theoretically a 32-bit host OS can invoke a PSP commands but > currently PSP interface is exposing only the SEV FW command. And SEV Let's cross that bridge when we get to it. > feature is available when we are in 64-bit

Re: [PATCH 1/3] crypto: dh_helper - return unsigned int for dh_data_size()

Hi, David, On 10/03/2017 12:06 PM, David Howells wrote: Tudor Ambarus wrote: -static inline int dh_data_size(const struct dh *p) +static inline unsigned int dh_data_size(const struct dh *p) { return p->key_size + p->p_size + p->g_size; } If this is

Re: [PATCH v3] crypto: s5p-sss: Add HASH support for Exynos

On 30.09.2017 21:50, Krzysztof Kozlowski wrote: > On Wed, Sep 27, 2017 at 02:25:50PM +0200, Kamil Konieczny wrote: >> Add support for MD5, SHA1, SHA256 hash algorithms for Exynos HW. >> It uses the crypto framework asynchronous hash api. >> It is based on omap-sham.c driver. >> S5P has some HW

Re: [PATCH] iommu/vt-d: Fix scatterlist offset handling

On Thu, 2017-09-28 at 15:14 +0100, Robin Murphy wrote: > The intel-iommu DMA ops fail to correctly handle scatterlists where > sg->offset is greater than PAGE_SIZE - the IOVA allocation is computed > appropriately based on the page-aligned portion of the offset, but the > mapping is set up

[PATCH v2 4/4] staging: ccree: simplify OOM handling

Simplify handling of memory allocation failures and remove redundant log messages Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_cipher.c | 11 -- drivers/staging/ccree/ssi_driver.c | 1 - drivers/staging/ccree/ssi_hash.c | 42

Re: [PATCH 2/4] staging: ccree: simplify access to struct device

On Mon, Oct 2, 2017 at 1:00 PM, Joe Perches wrote: > On Mon, 2017-10-02 at 10:03 +0100, Gilad Ben-Yossef wrote: >> Introduce a DEV macro to retrieve struct device from private >> data structure in preparation to replacing custom logging >> macros with proper dev_dbg and friends

[PATCH v2 0/4] staging: ccree: logging related coding style fixes

The following patch set cleans up some code and builds upon this to replace ccree custom logging macros with the generic device dev_* facilities, handles the resulting fallout and further simplifies handling of memory and allocation OOM error handling code path exposed by checkpatch following the

Re: [PATCH 1/3] crypto: dh_helper - return unsigned int for dh_data_size()

Tudor Ambarus wrote: > -static inline int dh_data_size(const struct dh *p) > +static inline unsigned int dh_data_size(const struct dh *p) > { > return p->key_size + p->p_size + p->g_size; > } If this is a problem, do you need to do range checking? David

Re: [PATCH v3 1/3] crypto: engine - permit to enqueue aead_request

On 22/09/17 11:09, Herbert Xu wrote: > On Fri, Aug 18, 2017 at 11:19:04AM +0200, Fabien Dessenne wrote: >> The current crypto engine allows ablkcipher_request and ahash_request to >> be enqueued. Extend this to aead_request. >> >> Signed-off-by: Fabien Dessenne > I'd like

[PATCH 1/7] crypto:chelsio: Remove unused parameter

Remove unused parameter sent to latest fw. Signed-off-by: Harsh Jain --- drivers/crypto/chelsio/chcr_algo.c | 43 +++--- drivers/crypto/chelsio/chcr_algo.h | 12 +-- 2 files changed, 23 insertions(+), 32 deletions(-) diff --git

[PATCH 4/7] crypto:chelsio:Use x8_ble gf multiplication to calculate IV.

gf128mul_x8_ble() will reduce gf Multiplication iteration by 8. Signed-off-by: Harsh Jain --- drivers/crypto/chelsio/chcr_algo.c | 11 +-- drivers/crypto/chelsio/chcr_crypto.h | 1 + 2 files changed, 10 insertions(+), 2 deletions(-) diff --git

[PATCH 3/7] crypto:gf128mul: The x8_ble multiplication functions

It multiply GF(2^128) elements in the ble format. It will be used by chelsio driver to fasten gf multiplication. Signed-off-by: Harsh Jain --- crypto/gf128mul.c | 13 + include/crypto/gf128mul.h | 2 +- 2 files changed, 14 insertions(+), 1 deletion(-)

[PATCH 0/7]crypto:chelsio: Bugs fixes

It includes bug fix and performance improvement changes. Harsh Jain (7): crypto:gf128mul: The x8_ble multiplication functions crypto:chelsio:Use x8_ble gf multiplication to calculate IV. crypto:chelsio:Remove allocation of sg list to implement 2K limit of dsgl header

[PATCH 6/7] crypto:chelsio:Move DMA un/mapping to chcr from lld cxgb4 driver

Allow chcr to do DMA mapping/Unmapping instead of lld cxgb4. It moves "Copy AAD to dst buffer" requirement from driver to firmware. Signed-off-by: Ganesh Goudar Signed-off-by: Harsh Jain --- drivers/crypto/chelsio/chcr_algo.c | 1645

[PATCH 7/7] crypto:chelsio: Fix memory leak

Fix memory leak when device does not support crypto. Reported-by: Dan Carpenter Signed-off-by: Harsh Jain --- drivers/crypto/chelsio/chcr_core.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git

[PATCH 2/7] crypto:chelsio: Check error code with IS_ERR macro

Check and return proper error code. Signed-off-by: Harsh Jain --- drivers/crypto/chelsio/chcr_algo.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/crypto/chelsio/chcr_algo.c b/drivers/crypto/chelsio/chcr_algo.c index

Re: [PATCH 2/2] MIPS: crypto: Add crc32 and crc32c hw accelerated module

Hi Jonas, James, On 02.10.2017 16:20, Jonas Gorski wrote: On 29 September 2017 at 23:34, James Hogan wrote: Hi Marcin, On Wed, Sep 27, 2017 at 02:18:36PM +0200, Marcin Nowakowski wrote: This module registers crc32 and crc32c algorithms that use the optional