On Wed, Jun 05, 2019 at 10:40:31AM +0100, Sudeep Holla wrote:
> On Tue, Jun 04, 2019 at 08:30:59PM +, Ali Saidi wrote:
> > Allow a module that wants to make SMC calls to detect if it should be
> > using smc or hvc.
> >
> > Signed-off-by: Ali Saidi
> > ---
> > arch/arm64/kernel/acpi.c | 1 +
>
On Wed, Nov 22, 2017 at 12:04:58PM +, Mark Rutland wrote:
> On Wed, Nov 22, 2017 at 10:12:17AM +, Ard Biesheuvel wrote:
> > On 22 November 2017 at 10:05, Alex Matveev wrote:
> > > This is better than my simple fix, thank you.
> > >
> > > Out of curiosit
On Wed, Nov 22, 2017 at 10:12:17AM +, Ard Biesheuvel wrote:
> On 22 November 2017 at 10:05, Alex Matveev wrote:
> > This is better than my simple fix, thank you.
> >
> > Out of curiosity, why doesn't NEON code use barrier() to prevent
> > reordering?
>
> Because barrier() affects ordering of
On Tue, Jun 06, 2017 at 01:03:19PM -0400, Theodore Ts'o wrote:
> The other approach is to find a way to have initialized "seed" entropy
> which we can count on at every boot. The problem is that this is very
> much dependent on how the bootloader works. It's easy to say "store
> it in the kernel"
On Wed, Jun 07, 2017 at 01:00:25PM -0400, Daniel Micay wrote:
> > On the better bootloaders, an initramfs segment can be loaded
> > independently (and you can have as many as required), which makes an
> > early_initramfs a more palatable vector to inject large amounts of
> > entropy into the next b
On Tue, Apr 18, 2017 at 06:29:22PM +0300, Gilad Ben-Yossef wrote:
> On Tue, Apr 18, 2017 at 6:13 PM, Mark Rutland wrote:
> > On Tue, Apr 18, 2017 at 05:07:50PM +0300, Gilad Ben-Yossef wrote:
> >> Arm TrustZone CryptoCell 700 is a family of cryptographic hardware
> >> ac
Hi,
On Tue, Apr 18, 2017 at 05:07:50PM +0300, Gilad Ben-Yossef wrote:
> Arm TrustZone CryptoCell 700 is a family of cryptographic hardware
> accelerators. It is supported by a long lived series of out of tree
> drivers, which I am now in the process of unifying and upstreaming.
> This is the first
On Thu, Mar 02, 2017 at 10:16:15AM -0500, Brijesh Singh wrote:
> The CCP device is part of the AMD Secure Processor. In order to expand the
> usage of the AMD Secure Processor, create a framework that allows functional
> components of the AMD Secure Processor to be initialized and handled
> appropr
On Wed, Nov 30, 2016 at 03:07:32PM -0500, Rob Rice wrote:
> +static const struct of_device_id bcm_spu_dt_ids[] = {
> + {
> + .compatible = "brcm,spum-crypto",
> + .data = &spum_ns2_types,
> + },
> + {
> + .compatible = "brcm,spum-nsp-crypto",
> +
On Wed, Nov 30, 2016 at 03:07:31PM -0500, Rob Rice wrote:
> Device tree documentation for Broadcom Secure Processing Unit
> (SPU) crypto driver.
>
> Signed-off-by: Steve Lin
> Signed-off-by: Rob Rice
> ---
> .../devicetree/bindings/crypto/brcm,spu-crypto.txt | 25
> ++
> 1
On Fri, Oct 30, 2015 at 04:22:49PM +0800, Zain Wang wrote:
> Add DT bindings documentation for the rk3288 crypto drivers.
>
> Signed-off-by: Zain Wang
> ---
> .../devicetree/bindings/crypto/rk-crypto.txt | 31
> ++
> 1 file changed, 31 insertions(+)
> create mode 1006
On Thu, Jan 23, 2014 at 05:47:25PM +, Sylwester Nawrocki wrote:
> On 23/01/14 18:41, Mark Rutland wrote:
> >>> diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
> >>> > > index 93cddeb..2da5617 100644
> >>> > > --- a/drivers/
On Thu, Jan 23, 2014 at 10:28:08AM +, Sylwester Nawrocki wrote:
> Hi,
>
> (Adding missing devicetre ML list at CC.)
>
> On 15/01/14 10:14, Naveen Krishna Chatradhi wrote:
> > This patch adds device tree support to the s5p-sss.c crypto driver.
> >
> > Also, Documentation under devicetree/bind
On Fri, Jul 26, 2013 at 07:59:15AM +0100, Lokesh Vutla wrote:
> Add support for the OMAP5 version of the SHAM module
> that is present on OMAP5 and AM43xx SoCs.
>
> This module is very simialar to OMAP4 version of SHAM module,
> and adds SHA384 SHA512 hardware-accelerated hash functions to it.
> T
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