Hi,
On 06/21/2018 06:17 PM, Timur Tabi wrote:
> The hwrng.read callback includes a boolean parameter called 'wait'
> which indicates whether the function should block and wait for
> more data.
>
> When 'wait' is true, the driver spins on the DATA_AVAIL bit or until
> a reasonable timeout. The
Hi Iaroslav,
On 09/03/2016 07:45 PM, Iaroslav Gridin wrote:
> Without that, QCE performance is about 2x less.
On which platform? The clock rates are per SoC.
>
> Signed-off-by: Iaroslav Gridin
> ---
> drivers/crypto/qce/core.c | 18 +-
>
On 11/03/2015 02:36 PM, LABBE Corentin wrote:
> On Tue, Nov 03, 2015 at 12:39:57PM +0200, Stanimir Varbanov wrote:
>> Hi,
>>
>> I know that this patch has been queued up, but ...
>>
>> On 10/02/2015 09:01 AM, LABBE Corentin wrote:
>>> The qce driv
Hi,
I know that this patch has been queued up, but ...
On 10/02/2015 09:01 AM, LABBE Corentin wrote:
> The qce driver use two dma_map_sg path according to SG are chained
> or not.
> Since dma_map_sg can handle both case, clean the code with all
> references to sg chained.
>
> Thus removing
Hi,
On 09/23/2015 02:55 PM, LABBE Corentin wrote:
> The qce driver use two dma_map_sg path according to SG are chained
> or not.
> Since dma_map_sg can handle both case, clean the code with all
> references to sg chained.
>
> Thus removing qce_mapsg, qce_unmapsg and qce_countsg functions.
>
>
Hi Herbert,
Here are sparse fixes for Qualcomm crypto driver reported here [1].
The patches are based on cryptodev-2.6 tree.
regards,
Stan
[1] https://lists.01.org/pipermail/kbuild-all/2014-July/005429.html
Stanimir Varbanov (2):
crypto: qce: fix sparse warnings
crypto: qce: add dependancy
Fix few sparse warnings of type:
- sparse: incorrect type in argument
- sparse: incorrect type in initializer
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/common.c | 15 +--
drivers/crypto/qce/common.h |2 +-
drivers/crypto/qce/sha.c| 20
Make qce crypto driver depend on ARCH_QCOM and make
possible to test driver compilation.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/Kconfig |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index
This driver is based on Codeaurora's driver found at [1]
[1]
https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/crypto/msm?h=msm-3.10
Stanimir Varbanov (3):
crypto: qce: Qualcomm crypto engine driver
crypto: qce: Build Qualcomm crypto driver
ARM: DT: qcom: Add Qualcomm
Here is Qualcomm crypto driver device tree binding documentation
to used as a reference example.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
.../devicetree/bindings/crypto/qcom-qce.txt| 25
1 files changed, 25 insertions(+), 0 deletions(-)
create
Modify crypto Kconfig and Makefile in order to build the qce
driver and adds qce Makefile as well.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/Kconfig | 15 +++
drivers/crypto/Makefile |1 +
drivers/crypto/qce/Makefile |6 ++
3
Hi Joe,
On 06/09/2014 07:46 PM, Joe Perches wrote:
On Mon, 2014-06-09 at 15:08 +0300, Stanimir Varbanov wrote:
The driver is separated by functional parts. The core part
implements a platform driver probe and remove callbaks.
The probe enables clocks, checks crypto version, initialize
long
- move blocksize boundary check on function begging and
clear BYTECOUNT registers on first processing block
This driver is based on Codeaurora's driver found at [1]
[1]
https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/crypto/msm?h=msm-3.10
Stanimir Varbanov (3
Here is Qualcomm crypto driver device tree binding documentation
to used as a reference example.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
.../devicetree/bindings/crypto/qcom-qce.txt| 25
1 files changed, 25 insertions(+), 0 deletions(-)
create
Hi Herbert,
On 04/28/2014 11:59 AM, Herbert Xu wrote:
On Mon, Apr 14, 2014 at 03:48:37PM +0300, Stanimir Varbanov wrote:
+#define QCE_MAJOR_VERSION5 0x05
+#define QCE_QUEUE_LENGTH50
What is the purpose of this software queue? Why can't you directly
feed the requests to the hardware
Thanks for the review!
On 04/28/2014 11:00 AM, Herbert Xu wrote:
On Mon, Apr 14, 2014 at 03:48:40PM +0300, Stanimir Varbanov wrote:
+if (IS_AES(flags)) {
+switch (keylen) {
+case AES_KEYSIZE_128:
+case AES_KEYSIZE_256:
+break
Thanks for the review!
On 04/28/2014 11:18 AM, Herbert Xu wrote:
On Mon, Apr 14, 2014 at 03:48:40PM +0300, Stanimir Varbanov wrote:
+} else if (IS_DES(flags)) {
+u32 tmp[DES_EXPKEY_WORDS];
+
+if (keylen != QCE_DES_KEY_SIZE)
+goto badkey
Thanks for the review!
On 04/28/2014 11:50 AM, Herbert Xu wrote:
On Mon, Apr 14, 2014 at 03:48:37PM +0300, Stanimir Varbanov wrote:
+if (backlog)
+backlog-complete(backlog, -EINPROGRESS);
The completion function needs to be called with BH disabled.
Cheers,
This is new
/2014 03:48 PM, Stanimir Varbanov wrote:
Hi,
Here is the second version of the patch set. This time tagged
as an RFC to avoid confusions. The driver is splitted by files
and is buildable at the last patch. When the review has finished
1/9 to 7/9 could be squashed in one patch.
Any comments
Hi Courtney,
On 04/09/2014 01:00 AM, Courtney Cavin wrote:
On Tue, Apr 08, 2014 at 06:26:44PM +0200, Stanimir Varbanov wrote:
On 04/04/2014 02:38 AM, Courtney Cavin wrote:
On Thu, Apr 03, 2014 at 06:17:58PM +0200, Stanimir Varbanov wrote:
This adds core driver files. The core part
Hi Stephen,
On 04/11/2014 11:12 PM, Stephen Boyd wrote:
On 04/10, Stanimir Varbanov wrote:
On 04/09/2014 03:09 AM, Stephen Boyd wrote:
On 04/03, Stanimir Varbanov wrote:
+
+ return 0;
+}
+
+static int qce_ahash_import(struct ahash_request *req, const void *in)
+{
+ struct
readable and
easier for review, hope I done well. I'll appreciate any review
comments which will help me to make this code clear and ready
for mainline kernel.
Stanimir Varbanov (9):
crypto: qce: Add core driver implementation
crypto: qce: Add register defines
crypto: qce: Add dma and sg helpers
-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/core.c | 295 ++
drivers/crypto/qce/core.h | 73
2 files changed, 368 insertions(+)
create mode 100644 drivers/crypto/qce/core.c
create mode 100644 drivers/crypto/qce/core.h
Here are all register addresses and bit/masks used by the driver.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/regs-v5.h | 331 +++
1 file changed, 331 insertions(+)
create mode 100644 drivers/crypto/qce/regs-v5.h
diff
This adds dmaengine and sg-list helper functions used by
other parts of the crypto driver.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/dma.c | 188 +++
drivers/crypto/qce/dma.h | 58 +++
2 files changed
Here is the implementation of AES, DES and 3DES crypto API
callbacks, the crypto register alg function, the async request
handler and its dma done callback function.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/ablkcipher.c | 403
Here is the implementation and registration of ahash crypto type.
It includes sha1, sha256, hmac(sha1) and hmac(sha256).
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/sha.c | 591 +++
drivers/crypto/qce/sha.h | 81
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/common.c | 438
drivers/crypto/qce/common.h | 104 +++
2 files changed, 542 insertions(+)
create mode 100644 drivers/crypto/qce/common.c
create mode 100644 drivers/crypto
Adds Makefile needed to build the driver.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/Makefile | 6 ++
1 file changed, 6 insertions(+)
create mode 100644 drivers/crypto/qce/Makefile
diff --git a/drivers/crypto/qce/Makefile b/drivers/crypto/qce/Makefile
new
Modify crypto Kconfig and Makefile in order to build the qce
driver.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/Kconfig | 10 ++
drivers/crypto/Makefile | 1 +
2 files changed, 11 insertions(+)
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
Hi Stephen,
thanks for the comments.
On 04/09/2014 03:09 AM, Stephen Boyd wrote:
On 04/03, Stanimir Varbanov wrote:
+static void qce_ahash_dma_done(void *data)
+{
+struct crypto_async_request *async_req = data;
+struct ahash_request *req = ahash_request_cast(async_req);
+struct
Hi
On 04/08/2014 01:42 AM, Courtney Cavin wrote:
On Fri, Apr 04, 2014 at 03:07:13PM +0200, Stanimir Varbanov wrote:
diff --git a/drivers/crypto/qce/dma.h b/drivers/crypto/qce/dma.h
new file mode 100644
index ..932b02fd8f25
--- /dev/null
+++ b/drivers/crypto/qce/dma.h
@@ -0,0
Hi Courtney,
Thanks for the review!
On 04/04/2014 02:38 AM, Courtney Cavin wrote:
On Thu, Apr 03, 2014 at 06:17:58PM +0200, Stanimir Varbanov wrote:
This adds core driver files. The core part is implementing a
platform driver probe and remove callbaks, the probe enables
clocks, checks crypto
On 04/03/2014 09:25 PM, Josh Cartwright wrote:
Nitworthy comments :).
On Thu, Apr 03, 2014 at 07:18:00PM +0300, Stanimir Varbanov wrote:
[..]
+++ b/drivers/crypto/qce/dma.c
[..]
+int qce_dma_request(struct device *dev, struct qce_dma_data *dma)
+{
+unsigned int memsize;
+void
Hi Courtney,
Thanks for the comments!
On 04/04/2014 02:15 AM, Courtney Cavin wrote:
On Thu, Apr 03, 2014 at 06:18:00PM +0200, Stanimir Varbanov wrote:
This adds dmaengine and sg-list helper functions used by
other parts of the crypto driver.
Signed-off-by: Stanimir Varbanov svarba...@mm
Hi Josh,
Thanks for the comments!
On 04/03/2014 09:19 PM, Josh Cartwright wrote:
Hey Stanimir-
Just a few comments/questions from a quick scan of your patchset:
On Thu, Apr 03, 2014 at 07:17:58PM +0300, Stanimir Varbanov wrote:
[..]
+++ b/drivers/crypto/qce/core.c
[..]
+
+static
and
easier for review, hope I done well. I'll appreciate any review
comments which will help me to make this code clear and ready
for mainline kernel.
regards,
Stan
Stanimir Varbanov (9):
crypto: qce: Add core driver implementation
crypto: qce: Add register defines
crypto: qce: Add dma and sg
-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/core.c | 333 ++
drivers/crypto/qce/core.h | 69 ++
2 files changed, 402 insertions(+)
create mode 100644 drivers/crypto/qce/core.c
create mode 100644 drivers/crypto/qce/core.h
This adds dmaengine and sg-list helper functions used by
other parts of the crypto driver.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/dma.c | 201 +++
drivers/crypto/qce/dma.h | 57 ++
2 files changed, 258
Here are all register addresses and bit/masks used by the driver.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/regs-v5.h | 327 +++
1 file changed, 327 insertions(+)
create mode 100644 drivers/crypto/qce/regs-v5.h
diff
Here is the implementation of AES, DES and 3DES crypto API
callbacks, the crypto register alg function, the async request
handler and its dma done callback function.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/ablkcipher.c | 397
Here is the implementation and registration of ahash crypto type.
It includes sha1, sha256, hmac(sha1) and hmac(sha256).
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/sha.c | 595 +++
drivers/crypto/qce/sha.h | 74
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/common.c | 424
drivers/crypto/qce/common.h | 111
2 files changed, 535 insertions(+)
create mode 100644 drivers/crypto/qce/common.c
create mode 100644 drivers/crypto
Adds Makefile needed to build the driver.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/Makefile | 6 ++
1 file changed, 6 insertions(+)
create mode 100644 drivers/crypto/qce/Makefile
diff --git a/drivers/crypto/qce/Makefile b/drivers/crypto/qce/Makefile
new
Modify crypto Kconfig and Makefile in order to build the qce
driver.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/Kconfig | 10 ++
drivers/crypto/Makefile | 1 +
2 files changed, 11 insertions(+)
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
Hi,
On 04/03/2014 07:24 PM, Kumar Gala wrote:
On Apr 3, 2014, at 11:17 AM, Stanimir Varbanov svarba...@mm-sol.com wrote:
Here are all register addresses and bit/masks used by the driver.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/regs-v5.h | 327
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