[PATCH v6 1/6] hwrng: remove msm hw_random driver

This driver is for a psedo-rng so should not be added in hwrng. Remove it so that it's replacement can be added. Signed-off-by: Vinod Koul --- drivers/char/hw_random/Kconfig | 13 --- drivers/char/hw_random/Makefile | 1 - drivers/char/hw_random/msm-rng.c | 183

[PATCH v6 4/6] dt-bindings: crypto: Add new compatible qcom,prng-ee

Later qcom chips support v2 of the prng, which exposes an EE (Execution Environment) for OS to use so add new compatible qcom,prng-ee for this. Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/crypto/qcom,prng.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff

[PATCH v6 5/6] crypto: qcom: Add support for prng-ee

Qcom 8996 and later chips features multiple Execution Environments (EE) and secure world is typically responsible for configuring the prng. Add driver data for qcom,prng as 0 and qcom,prng-ee as 1 and use that to skip initialization routine. Signed-off-by: Vinod Koul --- drivers/crypto/qcom

[PATCH v6 3/6] crypto: Add Qcom prng driver

This ports the Qcom prng from older hw_random driver. No change of functionality and move from hw_random to crypto APIs is done. Reviewed-by: Linus Walleij Signed-off-by: Vinod Koul --- drivers/crypto/Kconfig| 11 +++ drivers/crypto/Makefile | 1 + drivers/crypto/qcom-rng.c | 208

[PATCH v6 6/6] crypto: qcom: Add ACPI support

or configure it. Signed-off-by: Timur Tabi Tested-by: Jeffrey Hugo [port to crypto API] Signed-off-by: Vinod Koul --- drivers/crypto/qcom-rng.c | 20 +--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/crypto/qcom-rng.c b/drivers/crypto/qcom-rng.c index

[PATCH v6 0/6] crypto: Add Qcom PRNG support

and tested tags Changes in v5: - Update ACPI check and use generic driver data API Changes in v4: - Use memcpy for data copy - Fix trailing bytes copy - Fix ACPI ID table name Timur Tabi (1): crypto: qcom: Add ACPI support Vinod Koul (5): hwrng: remove msm hw_random driver dt-bindings

[PATCH v6 2/6] dt-bindings: crypto: Move prng binding to crypto

Now that we are adding new driver for prng in crypto, move the binding as well. Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/{rng => crypto}/qcom,prng.txt | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename Documentation/devicetree/bindings/{rng => crypto

Re: [PATCH RESEND 1/4] crypto: caam: add caam-dma node to SEC4.0 device tree binding

On Fri, Nov 10, 2017 at 10:44:30AM -0600, Kim Phillips wrote: > On Fri, 10 Nov 2017 08:02:01 + > Radu Andrei Alexe wrote: > > > On 11/9/2017 6:34 PM, Kim Phillips wrote: > > > On Thu, 9 Nov 2017 11:54:13 + > > > Radu Andrei Alexe wrote: > > >> The

Re: [PATCH RESEND 1/4] crypto: caam: add caam-dma node to SEC4.0 device tree binding

On Fri, Nov 10, 2017 at 08:02:01AM +, Radu Andrei Alexe wrote: > On 11/9/2017 6:34 PM, Kim Phillips wrote: > > On Thu, 9 Nov 2017 11:54:13 + > > Radu Andrei Alexe wrote: > > > >> On 10/30/2017 4:24 PM, Kim Phillips wrote: > >>> On Mon, 30 Oct 2017 15:46:51 +0200 > >>>

Re: [PATCH RESEND 4/4] dma: caam: add dma memcpy driver

On Wed, Nov 08, 2017 at 02:36:31PM +, Radu Andrei Alexe wrote: > On 10/31/2017 2:01 PM, Vinod Koul wrote: > > On Mon, Oct 30, 2017 at 03:46:54PM +0200, Horia Geantă wrote: > >> +/* > >> + * caam support for SG DMA > >> + * > >> + * Copyright 2016 Fr

Re: [PATCH RESEND 4/4] dma: caam: add dma memcpy driver

On Mon, Oct 30, 2017 at 03:46:54PM +0200, Horia Geantă wrote: > @@ -600,6 +600,23 @@ config ZX_DMA > help > Support the DMA engine for ZTE ZX family platform devices. > > +config CRYPTO_DEV_FSL_CAAM_DMA File is sorted alphabetically > + tristate "CAAM DMA engine support" > +

Re: [PATCH 0/4] add CAAM DMA memcpy driver

On Fri, Oct 27, 2017 at 12:20:32PM +, Horia Geantă wrote: > On 10/27/2017 2:36 PM, Koul, Vinod wrote: > >> On 10/26/2017 1:01 PM, Radu Alexe wrote: > >>> This patch-set introduces a new DMA memcpy driver based on the DMA > >>> capabilities of the CAAM crypto engine. Because of this dependency

Re: [PATCH v8 0/4] Broadcom SBA RAID support

On Mon, May 15, 2017 at 10:34:51AM +0530, Anup Patel wrote: > The Broadcom SBA RAID is a stream-based device which provides > RAID5/6 offload. > > It requires a SoC specific ring manager (such as Broadcom FlexRM > ring manager) to provide ring-based programming interface. Due to > this, the

Re: [PATCH v6 0/4] Broadcom SBA RAID support

On Wed, May 03, 2017 at 09:15:20AM +0530, Anup Patel wrote: > Hi Vinod, > > The Broadcom FlexRM patchset have been > merged in v4.11. > > I think you now can take this patchset in next > merge window. Right?? Sure, please rebase and resend after -rc1 is out -- ~Vinod

Re: [PATCH v6 0/4] Broadcom SBA RAID support

On Wed, Mar 29, 2017 at 11:35:43AM +0530, Anup Patel wrote: > On Tue, Mar 21, 2017 at 2:48 PM, Vinod Koul <vinod.k...@intel.com> wrote: > > On Tue, Mar 21, 2017 at 02:17:21PM +0530, Anup Patel wrote: > >> On Tue, Mar 21, 2017 at 2:00 PM, Vinod Koul <vinod.k...@intel.com

Re: [PATCH v6 0/4] Broadcom SBA RAID support

On Tue, Mar 21, 2017 at 02:17:21PM +0530, Anup Patel wrote: > On Tue, Mar 21, 2017 at 2:00 PM, Vinod Koul <vinod.k...@intel.com> wrote: > > On Mon, Mar 06, 2017 at 03:13:24PM +0530, Anup Patel wrote: > >> The Broadcom SBA RAID is a stream-based device which provi

Re: [PATCH v2 2/5] async_tx: Handle DMA devices having support for fewer PQ coefficients

On Tue, Feb 07, 2017 at 02:32:15PM +0530, Anup Patel wrote: > On Tue, Feb 7, 2017 at 1:57 PM, Dan Williams wrote: > > On Tue, Feb 7, 2017 at 12:16 AM, Anup Patel wrote: > >> The DMAENGINE framework assumes that if PQ offload is supported by a >

Re: [PATCH 5/6] dmaengine: Add Broadcom SBA RAID driver

On Mon, Feb 06, 2017 at 05:31:15PM +0530, Anup Patel wrote: > >> + > >> +/* SBA C_MDATA helper macros */ > >> +#define SBA_C_MDATA_LOAD_VAL(__bnum0)((__bnum0) & 0x3) > >> +#define SBA_C_MDATA_WRITE_VAL(__bnum0) ((__bnum0) & 0x3) > >> +#define

Re: [PATCH 5/6] dmaengine: Add Broadcom SBA RAID driver

On Thu, Feb 02, 2017 at 10:17:15AM +0530, Anup Patel wrote: > +config BCM_SBA_RAID > +tristate "Broadcom SBA RAID engine support" > +depends on (ARM64 && MAILBOX && RAID6_PQ) || COMPILE_TEST > +select DMA_ENGINE > +select DMA_ENGINE_RAID > + select

Re: provide DMA services in drivers/crypto

On Wed, Oct 19, 2016 at 01:57:45PM +, Tudor-Dan Ambarus wrote: Please wrap your mails within 80 chars, I have reflown below for reabability. > Hi, Herbert, > > CAAM has the ability to provide DMA services. This is helpful for > platforms that don't have a dedicated DMA hardware block. > >

Re: [PATCH 0/5] Use dma_pool_zalloc

On Fri, Apr 29, 2016 at 10:09:07PM +0200, Julia Lawall wrote: > Dma_pool_zalloc combines dma_pool_alloc and memset 0. The semantic patch > that makes this transformation is as follows: (http://coccinelle.lip6.fr/) Applied all dmaengine patches -- ~Vinod -- To unsubscribe from this list: send

Re: [PATCH] crypto/async_pq: use __free_page() instead of put_page()

On Tue, Mar 01, 2016 at 10:54:50PM +0900, Joonsoo Kim wrote: > 2016-03-01 3:04 GMT+09:00 Dan Williams : > > On Mon, Feb 29, 2016 at 1:33 AM, Arnd Bergmann wrote: > >> The addition of tracepoints to the page reference tracking had an > >> unfortunate

Re: [PATCH 02/13] dmaengine: Introduce dma_request_slave_channel_compat_reason()

On Wed, Nov 18, 2015 at 04:51:54PM +0100, Arnd Bergmann wrote: > On Wednesday 18 November 2015 17:43:04 Andy Shevchenko wrote: > > > > > > I assume that the sst-firmware.c case is a mistake, it should just use a > > > plain DMA_SLAVE and not DMA_MEMCPY. > > > > Other way around. > > > > Ok, I

Re: [PATCH v1 3/4] Crypto: Add support for APM X-Gene SoC CRC32C h/w accelerator driver

On Thu, Aug 20, 2015 at 12:31:44PM +0530, Rameshwar Sahu wrote: Hi Vinod, On Thu, Aug 20, 2015 at 11:18 AM, Vinod Koul vinod.k...@intel.com wrote: On Thu, Jul 30, 2015 at 05:41:07PM +0530, Rameshwar Prasad Sahu wrote: + nents = sg_nents(req-src); + sg_count = dma_map_sg(dev, req

Re: [PATCH v1 1/4] dmaengine: Add support for new feature CRC32C

On Thu, Aug 20, 2015 at 11:59:07AM +0530, Rameshwar Sahu wrote: Hi Vinod, On Thu, Aug 20, 2015 at 10:56 AM, Vinod Koul vinod.k...@intel.com wrote: On Thu, Jul 30, 2015 at 05:41:05PM +0530, Rameshwar Prasad Sahu wrote: This patch adds support for new feature CRC32C calculation

Re: [PATCH v1 2/4] dmaengine: xgene-dma: Add support for CRC32C calculation via DMA engine

On Thu, Aug 20, 2015 at 12:23:50PM +0530, Rameshwar Sahu wrote: Hi Vinod, On Thu, Aug 20, 2015 at 11:10 AM, Vinod Koul vinod.k...@intel.com wrote: On Thu, Jul 30, 2015 at 05:41:06PM +0530, Rameshwar Prasad Sahu wrote: + /* Invalidate unused source address field */ + for (; i 4

Re: [PATCH v1 2/4] dmaengine: xgene-dma: Add support for CRC32C calculation via DMA engine

On Thu, Jul 30, 2015 at 05:41:06PM +0530, Rameshwar Prasad Sahu wrote: + /* Invalidate unused source address field */ + for (; i 4; i++) + xgene_dma_invalidate_buffer(xgene_dma_lookup_ext8(desc2, i)); + + /* Check whether requested buffer processed */ + if

Re: [PATCH v1 3/4] Crypto: Add support for APM X-Gene SoC CRC32C h/w accelerator driver

On Thu, Jul 30, 2015 at 05:41:07PM +0530, Rameshwar Prasad Sahu wrote: + nents = sg_nents(req-src); + sg_count = dma_map_sg(dev, req-src, nents, DMA_TO_DEVICE); + if (!sg_count) { + dev_err(dev, Failed to map src sg); + return -ENOMEM; mapping error

Re: [PATCH 02/13] dmaengine: Introduce dma_request_slave_channel_compat_reason()

On Mon, Jun 22, 2015 at 02:31:00PM +0300, Peter Ujfalusi wrote: On 06/12/2015 03:58 PM, Vinod Koul wrote: Sorry this slipped thru I was away for a week anyways ;) Thinking about it again, I think we should coverge to two APIs and mark the legacy depracuated and look to convert folks

Re: [PATCH 02/13] dmaengine: Introduce dma_request_slave_channel_compat_reason()

On Thu, Jun 04, 2015 at 06:58:06PM +0300, Peter Ujfalusi wrote: Vinod, On 06/02/2015 03:55 PM, Vinod Koul wrote: On Fri, May 29, 2015 at 05:32:50PM +0300, Peter Ujfalusi wrote: On 05/29/2015 01:18 PM, Vinod Koul wrote: On Fri, May 29, 2015 at 11:42:27AM +0200, Geert Uytterhoeven wrote

Re: [PATCH 02/13] dmaengine: Introduce dma_request_slave_channel_compat_reason()

On Fri, May 29, 2015 at 05:32:50PM +0300, Peter Ujfalusi wrote: On 05/29/2015 01:18 PM, Vinod Koul wrote: On Fri, May 29, 2015 at 11:42:27AM +0200, Geert Uytterhoeven wrote: On Fri, May 29, 2015 at 11:33 AM, Vinod Koul vinod.k...@intel.com wrote: On Tue, May 26, 2015 at 04:25:57PM +0300

Re: [PATCH 02/13] dmaengine: Introduce dma_request_slave_channel_compat_reason()

On Tue, May 26, 2015 at 04:25:57PM +0300, Peter Ujfalusi wrote: dma_request_slave_channel_compat() 'eats' up the returned error codes which prevents drivers using the compat call to be able to do deferred probing. The new wrapper is identical in functionality but it will return with error

Re: [PATCH 02/13] dmaengine: Introduce dma_request_slave_channel_compat_reason()

On Fri, May 29, 2015 at 11:42:27AM +0200, Geert Uytterhoeven wrote: On Fri, May 29, 2015 at 11:33 AM, Vinod Koul vinod.k...@intel.com wrote: On Tue, May 26, 2015 at 04:25:57PM +0300, Peter Ujfalusi wrote: dma_request_slave_channel_compat() 'eats' up the returned error codes which prevents

Re: [PATCH] powerpc: add explicit OF includes for ppc4xx

...@gondor.apana.org.au Cc: David S. Miller da...@davemloft.net Cc: Vinod Koul vinod.k...@intel.com Cc: Dan Williams dan.j.willi...@intel.com Cc: linuxppc-...@lists.ozlabs.org Cc: linux-...@vger.kernel.org Cc: linux-crypto@vger.kernel.org --- I intend to send this patch to Linus with the rest of the DT clean-up

Re: [alsa-devel] [PATCH 23/51] DMA-API: dma: pl08x: add dma_set_mask_and_coherent() call

On Thu, Sep 19, 2013 at 10:48:01PM +0100, Russell King wrote: The DMA API requires drivers to call the appropriate dma_set_mask() functions before doing any DMA mapping. Add this required call to the AMBA PL08x driver. Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk Acked-by: Vinod

Re: [alsa-devel] [PATCH 43/51] DMA-API: dma: edma.c: no need to explicitly initialize DMA masks

-off-by: Russell King rmk+ker...@arm.linux.org.uk Acked-by: Vinod Koul vinod.k...@intel.com This also brings me question that should we force the driver to use the dma_set_mask_and_coherent() API or they have below flexiblity too? ~Vinod --- drivers/dma/edma.c |6 ++ 1 files changed

Re: [alsa-devel] [PATCH 24/51] DMA-API: dma: pl330: add dma_set_mask_and_coherent() call

doing any DMA mapping. Add this required call to the AMBA PL08x driver. ^--- copy and paste error - should of course be PL330 Fixed, thanks. with fixed changelog... Acked-by: Vinod Koul vinod.k...@intel.com ~Vinod -- -- To unsubscribe from this list: send the line

Re: [PATCH 35/39] dmaengine: ste_dma40_ll: Replace meaningless register set with comment

OR:ing with 0. Cc: Vinod Koul vinod.k...@intel.com Cc: Dan Williams d...@fb.com Cc: Per Forlin per.for...@stericsson.com Cc: Rabin Vincent ra...@rab.in Signed-off-by: Lee Jones lee.jo...@linaro.org Tentatively applied. Missing Vinod's ACK. Acked-by: Vinod Koul vinod.k...@intel.com

Re: [PATCH 39/39] dmaengine: ste_dma40: Fetch disabled channels from DT

as well add the infrastructure. Cc: Vinod Koul vinod.k...@intel.com Cc: Dan Williams d...@fb.com Cc: Per Forlin per.for...@stericsson.com Cc: Rabin Vincent ra...@rab.in Acked-by: Arnd Bergmann a...@arndb.de Signed-off-by: Lee Jones lee.jo...@linaro.org Acked-by: Vinod Koul vinod.k

Re: [PATCH 34/39] dmaengine: ste_dma40: Convert data_width from register bit format to value

to shift '1' by the bit pattern (1 data_width) times to make any sense of it. This patch flips the semantics on its head and only converts the value to its respective register bit pattern when writing to registers. This way we can use the true data_width (in Bytes) value. Cc: Vinod Koul vinod.k

Re: [PATCH 38/39] dmaengine: ste_dma40: Fetch the number of physical channels from DT

as well add the infrastructure. Cc: Vinod Koul vinod.k...@intel.com Cc: Dan Williams d...@fb.com Cc: Per Forlin per.for...@stericsson.com Cc: Rabin Vincent ra...@rab.in Signed-off-by: Lee Jones lee.jo...@linaro.org --- Acked-by: Vinod Koul vinod.k...@intel.com drivers/dma/ste_dma40.c |7

Re: [PATCH 01/39] dmaengine: ste_dma40: Separate Logical Global Interrupt Mask (GIM) unmasking

separating out this required code so it will be possible to move the remaining code in d40_phy_cfg(), which is mostly runtime configuration into the runtime_config() routine. Cc: Vinod Koul vinod.k...@intel.com Cc: Dan Williams d...@fb.com Cc: Per Forlin per.for...@stericsson.com Cc

Re: [PATCH 02/39] dmaengine: ste_dma40: Remove unnecessary call to d40_phy_cfg()

On Wed, May 15, 2013 at 10:51:25AM +0100, Lee Jones wrote: All configuration left in d40_phy_cfg() is runtime configurable and there is already a call into it from d40_runtime_config(), so let's rely on that. Acked-by: Vinod Koul vnod.k...@intel.com That needs up update! Acked-by: Arnd

Re: [PATCH 03/39] dmaengine: ste_dma40: Don't configure runtime configurable setup during allocate

On Wed, May 15, 2013 at 10:51:26AM +0100, Lee Jones wrote: Using the dmaengine API, allocating and configuring a channel are two separate actions. Here we're removing logical channel configuration from the channel allocating routines. Cc: Vinod Koul vinod.k...@intel.com Cc: Dan Williams d

Re: [PATCH 08/39] dmaengine: ste_dma40: Remove redundant address fetching function

On Wed, May 15, 2013 at 10:51:31AM +0100, Lee Jones wrote: Addresses are now stored in local data structures and are easy to obtain, thus a specialist function used to fetch them is now surplus to requirement. Signed-off-by: Lee Jones lee.jo...@linaro.org --- Acked-by: Vinod Koul vinod.k

Re: [PATCH 10/39] dmaengine: ste_dma40: Correct copy/paste error

On Wed, May 15, 2013 at 10:51:33AM +0100, Lee Jones wrote: 'struct stedma40_half_channel_info's header comment says that it's called 'struct stedma40_chan_cfg'. Let's straighten that out. Signed-off-by: Lee Jones lee.jo...@linaro.org --- Acked-by: Vinod Koul vinod.k...@intel.com -- ~Vinod

Re: [PATCH 31/39] dmaengine: ste_dma40: Replace ST-E's home-brew DMA direction defs with generic ones

On Thu, May 16, 2013 at 08:06:38AM +0100, Lee Jones wrote: On Thu, 16 May 2013, Vinod Koul wrote: On Wed, May 15, 2013 at 10:51:54AM +0100, Lee Jones wrote: STEDMA40_*_TO_* direction definitions are identical in all but name to the pre-defined generic DMA_*_TO_* ones. Let's make things

Re: [PATCH 02/39] dmaengine: ste_dma40: Remove unnecessary call to d40_phy_cfg()

On Thu, May 16, 2013 at 08:25:57AM +0100, Lee Jones wrote: On Thu, 16 May 2013, Vinod Koul wrote: On Wed, May 15, 2013 at 10:51:25AM +0100, Lee Jones wrote: All configuration left in d40_phy_cfg() is runtime configurable and there is already a call into it from d40_runtime_config(), so

Re: [PATCH 36/39] dmaengine: ste_dma40: Allow memcpy channels to be configured from DT

to be tailored. Fortunately, these platforms will be DT only, so this change has very little impact on platform data. Cc: Vinod Koul vinod.k...@intel.com Cc: Dan Williams d...@fb.com Cc: Per Forlin per.for...@stericsson.com Cc: Rabin Vincent ra...@rab.in Acked-by: Arnd Bergmann a...@arndb.de Signed

Re: [PATCH 33/39] dmaengine: ste_dma40_ll: Use the BIT macro to replace ugly '(1 x)'s

On Wed, May 15, 2013 at 10:51:56AM +0100, Lee Jones wrote: The aim is to make the code that little more readable. Cc: Vinod Koul vinod.k...@intel.com Cc: Dan Williams d...@fb.com Cc: Per Forlin per.for...@stericsson.com Cc: Rabin Vincent ra...@rab.in Signed-off-by: Lee Jones lee.jo

Re: [PATCH 31/39] dmaengine: ste_dma40: Replace ST-E's home-brew DMA direction defs with generic ones

On Wed, May 15, 2013 at 10:51:54AM +0100, Lee Jones wrote: STEDMA40_*_TO_* direction definitions are identical in all but name to the pre-defined generic DMA_*_TO_* ones. Let's make things easy by not duplicating such things. Cc: Vinod Koul vinod.k...@intel.com Cc: Dan Williams d...@fb.com

Re: [PATCH 35/39] dmaengine: ste_dma40_ll: Replace meaningless register set with comment

to blame) -- ~Vinod Cc: Vinod Koul vinod.k...@intel.com Cc: Dan Williams d...@fb.com Cc: Per Forlin per.for...@stericsson.com Cc: Rabin Vincent ra...@rab.in Signed-off-by: Lee Jones lee.jo...@linaro.org --- drivers/dma/ste_dma40_ll.c |6 -- 1 file changed, 4 insertions(+), 2

Re: [PATCH 6/9] crypto: ux500/cryp - Set DMA configuration though dma_slave_config()

On Fri, Apr 26, 2013 at 10:41:23AM +0100, Russell King - ARM Linux wrote: On Fri, Apr 26, 2013 at 01:46:46PM +0530, Vinod Koul wrote: On Fri, Apr 26, 2013 at 10:28:39AM +0200, Linus Walleij wrote: On Thu, Apr 25, 2013 at 4:11 PM, Arnd Bergmann a...@arndb.de wrote: The dma engine

Re: [PATCH 6/9] crypto: ux500/cryp - Set DMA configuration though dma_slave_config()

On Fri, Apr 26, 2013 at 10:28:39AM +0200, Linus Walleij wrote: On Thu, Apr 25, 2013 at 4:11 PM, Arnd Bergmann a...@arndb.de wrote: The dma engine driver must know the address in its dma space, while the slave driver has it available in physical space. These two are often the same, but