RE: [PATCH] crypto:caam - Modify width of few read only registers

Hi Kim -Original Message- From: Kim Phillips [mailto:kim.phill...@freescale.com] Sent: Thursday, June 12, 2014 4:23 AM To: Gupta Ruchika-R66431 Cc: linux-crypto@vger.kernel.org; herb...@gondor.apana.org.au Subject: Re: [PATCH] crypto:caam - Modify width of few read only registers

[PATCH][v2] crypto: caam - Correct definition of registers in memory map

Some registers like SECVID, CHAVID, CHA Revision Number, CTPR were defined as 64 bit resgisters. The IP provides a DWT bit(Double word Transpose) to transpose the two words when a double word register is accessed. However setting this bit would also affect the operation of job descriptors as well

Re: [PATCH] crypto:caam - Modify width of few read only registers

On Thu, 12 Jun 2014 04:56:14 -0500 Gupta Ruchika-R66431 ruchika.gu...@freescale.com wrote: From: Kim Phillips [mailto:kim.phill...@freescale.com] Sent: Thursday, June 12, 2014 4:23 AM /* Check to see if QI present. If so, enable */ - ctrlpriv-qi_present =

Re: [PATCH][v2] crypto: caam - Correct definition of registers in memory map

On Thu, 12 Jun 2014 23:52:06 +0530 Ruchika Gupta ruchika.gu...@freescale.com wrote: Some registers like SECVID, CHAVID, CHA Revision Number, CTPR were defined as 64 bit resgisters. The IP provides a DWT bit(Double word Transpose) to transpose the two words when a double word register is

Re: [patch] crypto: caam - remove duplicate FIFOST_CONT_MASK define

On Mon, 9 Jun 2014 18:19:41 +0300 Dan Carpenter dan.carpen...@oracle.com wrote: The FIFOST_CONT_MASK define is cut and pasted twice so we can delete the second instance. Signed-off-by: Dan Carpenter dan.carpen...@oracle.com Acked-by: Kim Phillips kim.phill...@freescale.com Thanks, Kim --