[PATCH 2/3] hwrng: stm32 - add support for STM32 HW RNG

[Daniel Thompson]

Add support for STMicroelectronics STM32 random number generator.

The config value defaults to N, reflecting the fact that STM32 is a
very low resource microcontroller platform and unlikely to be targeted
by any "grown up" defconfigs.

Signed-off-by: Daniel Thompson 
---
 drivers/char/hw_random/Kconfig |  12 +++
 drivers/char/hw_random/Makefile|   1 +
 drivers/char/hw_random/stm32-rng.c | 192 +
 3 files changed, 205 insertions(+)
 create mode 100644 drivers/char/hw_random/stm32-rng.c

diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index f48cf11c655e..7930cc9b719c 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -359,6 +359,18 @@ config HW_RANDOM_XGENE
 
  If unsure, say Y.
 
+config HW_RANDOM_STM32
+   tristate "STMicroelectronics STM32 random number generator"
+   depends on HW_RANDOM && (ARCH_STM32 || COMPILE_TEST)
+   help
+ This driver provides kernel-side support for the Random Number
+ Generator hardware found on STM32 microcontrollers.
+
+ To compile this driver as a module, choose M here: the
+ module will be called stm32-rng.
+
+ If unsure, say N.
+
 endif # HW_RANDOM
 
 config UML_RANDOM
diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
index 055bb01510ad..8b49c0f7abb1 100644
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -31,3 +31,4 @@ obj-$(CONFIG_HW_RANDOM_BCM2835) += bcm2835-rng.o
 obj-$(CONFIG_HW_RANDOM_IPROC_RNG200) += iproc-rng200.o
 obj-$(CONFIG_HW_RANDOM_MSM) += msm-rng.o
 obj-$(CONFIG_HW_RANDOM_XGENE) += xgene-rng.o
+obj-$(CONFIG_HW_RANDOM_STM32) += stm32-rng.o
diff --git a/drivers/char/hw_random/stm32-rng.c 
b/drivers/char/hw_random/stm32-rng.c
new file mode 100644
index ..37dfa5fca105
--- /dev/null
+++ b/drivers/char/hw_random/stm32-rng.c
@@ -0,0 +1,192 @@
+/*
+ * Copyright (c) 2015, Daniel Thompson
+ *
+ * This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define RNG_CR 0x00
+#define RNG_CR_RNGEN BIT(2)
+
+#define RNG_SR 0x04
+#define RNG_SR_SEIS BIT(6)
+#define RNG_SR_CEIS BIT(5)
+#define RNG_SR_DRDY BIT(0)
+
+#define RNG_DR 0x08
+
+/*
+ * It takes 40 cycles @ 48MHz to generate each random number (e.g. <1us).
+ * At the time of writing STM32 parts max out at ~200MHz meaning a timeout
+ * of 500 leaves us a very comfortable margin for error. The loop to which
+ * the timeout applies takes at least 4 instructions per cycle so the
+ * timeout is enough to take us up to multi-GHz parts!
+ */
+#define RNG_TIMEOUT 500
+
+struct stm32_rng_private {
+   struct hwrng rng;
+   void __iomem *base;
+   struct clk *clk;
+};
+
+static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
+{
+   struct stm32_rng_private *priv =
+   container_of(rng, struct stm32_rng_private, rng);
+   u32 cr, sr;
+   int retval = 0;
+
+   /* enable random number generation */
+   clk_enable(priv->clk);
+   cr = readl(priv->base + RNG_CR);
+   writel(cr | RNG_CR_RNGEN, priv->base + RNG_CR);
+
+   while (max > sizeof(u32)) {
+   sr = readl(priv->base + RNG_SR);
+   if (!sr && wait) {
+   unsigned int timeout = RNG_TIMEOUT;
+
+   do {
+   cpu_relax();
+   sr = readl(priv->base + RNG_SR);
+   } while (!sr && --timeout);
+   }
+
+   /* Has h/ware error dection been triggered? */
+   if (WARN_ON(sr & (RNG_SR_SEIS | RNG_SR_CEIS)))
+   break;
+
+   /* No data ready... */
+   if (!sr)
+   break;
+
+   *(u32 *)data = readl(priv->base + RNG_DR);
+
+   retval += sizeof(u32);
+   data += sizeof(u32);
+   max -= sizeof(u32);
+   }
+
+   /* disable the generator */
+   writel(cr, priv->base + RNG_CR);
+   clk_disable(priv->clk);
+
+   return retval || !wait ? retval : -EIO;
+}
+
+static int stm32_rng_init(struct hwrng *rng)
+{
+   struct stm32_rng_private *priv =
+   container_of(rng, struct stm32_rng_private, rng);
+   int err;
+   u32 sr;
+
+   err = clk_prepare(priv->clk);
+   if (err)
+   return 

[PATCH 3/3] ARM: dts: stm32f429: Adopt STM32 RNG driver

[Daniel Thompson]

New bindings and driver have been created for STM32 series parts. This
patch integrates this changes.

Signed-off-by: Daniel Thompson 
---
 arch/arm/boot/dts/stm32f429.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index cb0613090243..90081fc22c6c 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -175,6 +175,13 @@
reg = <0x40023800 0x400>;
clocks = <_hse>;
};
+
+   rng: rng@50060800 {
+   compatible = "st,stm32-rng";
+   reg = <0x50060800 0x400>;
+   interrupts = <80>;
+   clocks = < 0 38>;
+   };
};
 };
 
-- 
2.4.3

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[PATCH 1/3] dt-bindings: Document the STM32 HW RNG bindings

[Daniel Thompson]

This adds documenttaion of device tree binds for the STM32 hardware
random number generator.

Signed-off-by: Daniel Thompson 
---
 .../devicetree/bindings/hwrng/stm32-rng.txt | 21 +
 1 file changed, 21 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwrng/stm32-rng.txt

diff --git a/Documentation/devicetree/bindings/hwrng/stm32-rng.txt 
b/Documentation/devicetree/bindings/hwrng/stm32-rng.txt
new file mode 100644
index ..47f04176f93b
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwrng/stm32-rng.txt
@@ -0,0 +1,21 @@
+STMicroelectronics STM32 HW RNG
+===
+
+The STM32 hardware random number generator is a simple fixed purpose IP and
+is fully separated from other crypto functions.
+
+Required properties:
+
+- compatible : Should be "st,stm32-rng"
+- reg : Should be register base and length as documented in the datasheet
+- interrupts : The designated IRQ line for the RNG
+- clocks : The clock needed to enable the RNG
+
+Example:
+
+   rng: rng@50060800 {
+   compatible = "st,stm32-rng";
+   reg = <0x50060800 0x400>;
+   interrupts = <80>;
+   clocks = < 0 38>;
+   };
-- 
2.4.3

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[PATCH 0/3] hwrng: stm32 - add support for STM32 HW RNG

[Daniel Thompson]

This patchset introduces a driver for the STM32 hardware random number
generator.

Daniel Thompson (3):
  dt-bindings: Document the STM32 HW RNG bindings
  hwrng: stm32 - add support for STM32 HW RNG
  ARM: dts: stm32f429: Adopt STM32 RNG driver

 .../devicetree/bindings/hwrng/stm32-rng.txt|  21 +++
 arch/arm/boot/dts/stm32f429.dtsi   |   7 +
 drivers/char/hw_random/Kconfig |  12 ++
 drivers/char/hw_random/Makefile|   1 +
 drivers/char/hw_random/stm32-rng.c | 192 +
 5 files changed, 233 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwrng/stm32-rng.txt
 create mode 100644 drivers/char/hw_random/stm32-rng.c

--
2.4.3

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Re: [PATCH 2/3] hwrng: stm32 - add support for STM32 HW RNG

[kbuild test robot]

Hi Daniel,

[auto build test results on v4.3-rc3 -- if it's inappropriate base, please 
ignore]


coccinelle warnings: (new ones prefixed by >>)

>> drivers/char/hw_random/stm32-rng.c:164:1-4: WARNING: end returns can be 
>> simpified

Please review and possibly fold the followup patch.

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation
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[PATCH] hwrng: fix simple_return.cocci warnings

[kbuild test robot]

drivers/char/hw_random/stm32-rng.c:164:1-4: WARNING: end returns can be 
simpified

 Simplify a trivial if-return sequence.  Possibly combine with a
 preceding function call.

Generated by: scripts/coccinelle/misc/simple_return.cocci

CC: Daniel Thompson 
Signed-off-by: Fengguang Wu 
---

 stm32-rng.c |6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

--- a/drivers/char/hw_random/stm32-rng.c
+++ b/drivers/char/hw_random/stm32-rng.c
@@ -161,11 +161,7 @@ static int stm32_rng_probe(struct platfo
priv->rng.read = stm32_rng_read,
priv->rng.priv = (unsigned long) dev;
 
-   err = hwrng_register(>rng);
-   if (err)
-   return err;
-
-   return 0;
+   return hwrng_register(>rng);
 }
 
 static const struct of_device_id stm32_rng_match[] = {
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[PATCH V2] crypto/nx842: Add CRC and validation support

[Haren Myneni]

This patch adds CRC generation and validation support for nx-842.
Add CRC flag so that nx842 coprocessor includes CRC during compression
and validates during decompression.

Also changes in 842 SW compression to append CRC value at the end
of template and checks during decompression.

Signed-off-by: Haren Myneni 
---
Changes in V2:
 Added CRC and validation support in 842 SW compression/ decompression
 
 drivers/crypto/nx/nx-842-powernv.c |4 ++--
 drivers/crypto/nx/nx-842-pseries.c |8 ++--
 lib/842/842.h  |2 ++
 lib/842/842_compress.c |   13 +
 lib/842/842_decompress.c   |   17 +
 5 files changed, 40 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/nx/nx-842-powernv.c
b/drivers/crypto/nx/nx-842-powernv.c
index 3750e13..9ef51fa 100644
--- a/drivers/crypto/nx/nx-842-powernv.c
+++ b/drivers/crypto/nx/nx-842-powernv.c
@@ -491,7 +491,7 @@ static int nx842_powernv_compress(const unsigned
char *in, unsigned int inlen,
  void *wmem)
 {
return nx842_powernv_function(in, inlen, out, outlenp,
- wmem, CCW_FC_842_COMP_NOCRC);
+ wmem, CCW_FC_842_COMP_CRC);
 }
 
 /**
@@ -519,7 +519,7 @@ static int nx842_powernv_decompress(const unsigned
char *in, unsigned int inlen,
void *wmem)
 {
return nx842_powernv_function(in, inlen, out, outlenp,
- wmem, CCW_FC_842_DECOMP_NOCRC);
+ wmem, CCW_FC_842_DECOMP_CRC);
 }
 
 static int __init nx842_powernv_probe(struct device_node *dn)
diff --git a/drivers/crypto/nx/nx-842-pseries.c
b/drivers/crypto/nx/nx-842-pseries.c
index f4cbde0..df1b76c 100644
--- a/drivers/crypto/nx/nx-842-pseries.c
+++ b/drivers/crypto/nx/nx-842-pseries.c
@@ -234,6 +234,10 @@ static int nx842_validate_result(struct device
*dev,
dev_dbg(dev, "%s: Out of space in output buffer\n",
__func__);
return -ENOSPC;
+   case 65: /* Calculated CRC doesn't match the passed value */
+   dev_dbg(dev, "%s: CRC mismatch for decompression\n", 
+   __func__);
+   return -EINVAL;
case 66: /* Input data contains an illegal template field */
case 67: /* Template indicates data past the end of the input stream
*/
dev_dbg(dev, "%s: Bad data for decompression (code:%d)\n",
@@ -324,7 +328,7 @@ static int nx842_pseries_compress(const unsigned
char *in, unsigned int inlen,
slout.entries = (struct nx842_slentry *)workmem->slout;
 
/* Init operation */
-   op.flags = NX842_OP_COMPRESS;
+   op.flags = NX842_OP_COMPRESS_CRC;
csbcpb = >csbcpb;
memset(csbcpb, 0, sizeof(*csbcpb));
op.csbcpb = nx842_get_pa(csbcpb);
@@ -457,7 +461,7 @@ static int nx842_pseries_decompress(const unsigned
char *in, unsigned int inlen,
slout.entries = (struct nx842_slentry *)workmem->slout;
 
/* Init operation */
-   op.flags = NX842_OP_DECOMPRESS;
+   op.flags = NX842_OP_DECOMPRESS_CRC;
csbcpb = >csbcpb;
memset(csbcpb, 0, sizeof(*csbcpb));
op.csbcpb = nx842_get_pa(csbcpb);
diff --git a/lib/842/842.h b/lib/842/842.h
index 7c20003..e0a122b 100644
--- a/lib/842/842.h
+++ b/lib/842/842.h
@@ -76,6 +76,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -98,6 +99,7 @@
 #define I2_BITS(8)
 #define I4_BITS(9)
 #define I8_BITS(8)
+#define CRC_BITS   (32)
 
 #define REPEAT_BITS_MAX(0x3f)
 #define SHORT_DATA_BITS_MAX(0x7)
diff --git a/lib/842/842_compress.c b/lib/842/842_compress.c
index 7ce6894..d33cac9 100644
--- a/lib/842/842_compress.c
+++ b/lib/842/842_compress.c
@@ -490,6 +490,7 @@ int sw842_compress(const u8 *in, unsigned int ilen,
int ret;
u64 last, next, pad, total;
u8 repeat_count = 0;
+   u32 crc;
 
BUILD_BUG_ON(sizeof(*p) > SW842_MEM_COMPRESS);
 
@@ -580,6 +581,18 @@ skip_comp:
if (ret)
return ret;
 
+   /*
+* crc(0:31) is appended to target data starting with the next
+* bit after End of stream template.
+* nx842 calculates CRC for data in big-endian format. So doing 
+* same here so that sw842 decompression can be used for both 
+* compressed data.
+*/
+   crc = crc32_be(0, in, ilen);
+   ret = add_bits(p, crc, CRC_BITS);
+   if (ret)
+   return ret;
+
if (p->bit) {
p->out++;
p->olen--;
diff --git a/lib/842/842_decompress.c b/lib/842/842_decompress.c
index 5446ff0..b0db568 100644
--- a/lib/842/842_decompress.c
+++ b/lib/842/842_decompress.c
@@ -285,6 +285,7 @@ int sw842_decompress(const u8 *in, unsigned int