Re: [PATCH v2 1/4] crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation

2017-08-25 Thread PrasannaKumar Muralidharan 
Hi Rob,

On 26 August 2017 at 03:27, Rob Herring  wrote:
> On Wed, Aug 23, 2017 at 08:27:04AM +0530, PrasannaKumar Muralidharan wrote:
>> Add devicetree bindings for hardware pseudo random number generator
>> present in Ingenic JZ4780 SoC.
>>
>> Signed-off-by: PrasannaKumar Muralidharan 
>> ---
>> Changes in v2:
>> * Add "syscon" in CGU node's compatible section
>> * Make RNG child node of CGU.
>>
>>  .../bindings/crypto/ingenic,jz4780-rng.txt   | 20 
>> 
>
> bindings/rng/ for RNG h/w.

There are two subsystem for dealing with RNG hw. Hw_random subsystem
for true RNG (driver/char/hw_random) and crypto framework for pseudo
RNG (crypto/ and drviers/crypto). This HW is pseudo RNG so I have
placed the dt bindings in bindings/crypto as the driver itself is in
drivers/crypto folder. I am wondering if there is any relation between
driver folder and bindings folder. Can you please explain the folder
relation? Should this be put in bindings/rng or bindings/crypto?

>
>>  1 file changed, 20 insertions(+)
>>  create mode 100644 
>> Documentation/devicetree/bindings/crypto/ingenic,jz4780-rng.txt
>>
>> diff --git a/Documentation/devicetree/bindings/crypto/ingenic,jz4780-rng.txt 
>> b/Documentation/devicetree/bindings/crypto/ingenic,jz4780-rng.txt
>> new file mode 100644
>> index 000..a0c18e5
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/crypto/ingenic,jz4780-rng.txt
>> @@ -0,0 +1,20 @@
>> +Ingenic jz4780 RNG driver
>> +
>> +Required properties:
>> +- compatible : Should be "ingenic,jz4780-rng"
>> +
>> +Example:
>> +
>> +cgu: jz4780-cgu@1000 {
>> + compatible = "ingenic,jz4780-cgu", "syscon";
>> + reg = <0x1000 0x100>;
>> +
>> + clocks = <>, <>;
>> + clock-names = "ext", "rtc";
>> +
>> + #clock-cells = <1>;
>> +
>> + rng: rng@d8 {
>
> unit-address requires reg property.

The driver uses regmap to access the registers. In this case reg
property is not useful. Is reg property still needed? If not, how
should the node be declared?

>
>> + compatible = "ingenic,jz480-rng";
>> + };
>> +};
>> --
>> 2.10.0
>>

Thanks,
PrasannaKumar

Re: [PATCH v2 1/4] crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation

2017-08-25 Thread Rob Herring 
On Wed, Aug 23, 2017 at 08:27:04AM +0530, PrasannaKumar Muralidharan wrote:
> Add devicetree bindings for hardware pseudo random number generator
> present in Ingenic JZ4780 SoC.
> 
> Signed-off-by: PrasannaKumar Muralidharan 
> ---
> Changes in v2:
> * Add "syscon" in CGU node's compatible section
> * Make RNG child node of CGU.
> 
>  .../bindings/crypto/ingenic,jz4780-rng.txt   | 20 
> 

bindings/rng/ for RNG h/w.

>  1 file changed, 20 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/crypto/ingenic,jz4780-rng.txt
> 
> diff --git a/Documentation/devicetree/bindings/crypto/ingenic,jz4780-rng.txt 
> b/Documentation/devicetree/bindings/crypto/ingenic,jz4780-rng.txt
> new file mode 100644
> index 000..a0c18e5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/ingenic,jz4780-rng.txt
> @@ -0,0 +1,20 @@
> +Ingenic jz4780 RNG driver
> +
> +Required properties:
> +- compatible : Should be "ingenic,jz4780-rng"
> +
> +Example:
> +
> +cgu: jz4780-cgu@1000 {
> + compatible = "ingenic,jz4780-cgu", "syscon";
> + reg = <0x1000 0x100>;
> +
> + clocks = <>, <>;
> + clock-names = "ext", "rtc";
> +
> + #clock-cells = <1>;
> +
> + rng: rng@d8 {

unit-address requires reg property.

> + compatible = "ingenic,jz480-rng";
> + };
> +};
> -- 
> 2.10.0
>

[PATCH] crypto: padlock-sha: constify x86_cpu_id

2017-08-25 Thread Arvind Yadav 
x86_cpu_id are not supposed to change at runtime. MODULE_DEVICE_TABLE
and x86_match_cpu are working with const x86_cpu_id. So mark the
non-const x86_cpu_id structs as const.

Signed-off-by: Arvind Yadav 
---
 drivers/crypto/padlock-sha.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/crypto/padlock-sha.c b/drivers/crypto/padlock-sha.c
index bc72d20..d32c793 100644
--- a/drivers/crypto/padlock-sha.c
+++ b/drivers/crypto/padlock-sha.c
@@ -509,7 +509,7 @@ static struct shash_alg sha256_alg_nano = {
}
 };
 
-static struct x86_cpu_id padlock_sha_ids[] = {
+static const struct x86_cpu_id padlock_sha_ids[] = {
X86_FEATURE_MATCH(X86_FEATURE_PHE),
{}
 };
-- 
2.7.4

[PATCH] crypto: padlock-aes: constify x86_cpu_id

2017-08-25 Thread Arvind Yadav 
x86_cpu_id are not supposed to change at runtime. MODULE_DEVICE_TABLE
and x86_match_cpu are working with const x86_cpu_id. So mark the
non-const x86_cpu_id structs as const.

Signed-off-by: Arvind Yadav 
---
 drivers/crypto/padlock-aes.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/crypto/padlock-aes.c b/drivers/crypto/padlock-aes.c
index b386974..4b6642a 100644
--- a/drivers/crypto/padlock-aes.c
+++ b/drivers/crypto/padlock-aes.c
@@ -482,7 +482,7 @@ static struct crypto_alg cbc_aes_alg = {
}
 };
 
-static struct x86_cpu_id padlock_cpu_id[] = {
+static const struct x86_cpu_id padlock_cpu_id[] = {
X86_FEATURE_MATCH(X86_FEATURE_XCRYPT),
{}
 };
-- 
2.7.4

[PATCH 06/12] crypto: crypto4xx: fix dynamic_sa_ctl's sa_contents declaration

2017-08-25 Thread Christian Lamparter 
The driver had a union dynamic_sa_contents in place that
described the meaning of the bits in the sa_contents
variable.

Signed-off-by: Christian Lamparter 
---
 drivers/crypto/amcc/crypto4xx_alg.c |  4 ++--
 drivers/crypto/amcc/crypto4xx_sa.c  | 12 ++--
 drivers/crypto/amcc/crypto4xx_sa.h  |  2 +-
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/crypto/amcc/crypto4xx_alg.c 
b/drivers/crypto/amcc/crypto4xx_alg.c
index 6da92321173b..867a9230cd3f 100644
--- a/drivers/crypto/amcc/crypto4xx_alg.c
+++ b/drivers/crypto/amcc/crypto4xx_alg.c
@@ -149,7 +149,7 @@ static int crypto4xx_setkey_aes(struct crypto_ablkcipher 
*cipher,
 SA_NOT_COPY_HDR);
crypto4xx_memcpy_le(ctx->sa_in + get_dynamic_sa_offset_key_field(ctx),
key, keylen);
-   sa->sa_contents = SA_AES_CONTENTS | (keylen << 2);
+   sa->sa_contents.w = SA_AES_CONTENTS | (keylen << 2);
sa->sa_command_1.bf.key_len = keylen >> 3;
ctx->is_hash = 0;
ctx->direction = DIR_INBOUND;
@@ -219,7 +219,7 @@ static int crypto4xx_hash_alg_init(struct crypto_tfm *tfm,
 SA_NOT_COPY_PAD, SA_NOT_COPY_PAYLOAD,
 SA_NOT_COPY_HDR);
ctx->direction = DIR_INBOUND;
-   sa->sa_contents = SA_HASH160_CONTENTS;
+   sa->sa_contents.w = SA_HASH160_CONTENTS;
sa_in = (struct dynamic_sa_hash160 *) ctx->sa_in;
/* Need to zero hash digest in SA */
memset(sa_in->inner_digest, 0, sizeof(sa_in->inner_digest));
diff --git a/drivers/crypto/amcc/crypto4xx_sa.c 
b/drivers/crypto/amcc/crypto4xx_sa.c
index 69182e2cc3ea..78a8ca192d0d 100644
--- a/drivers/crypto/amcc/crypto4xx_sa.c
+++ b/drivers/crypto/amcc/crypto4xx_sa.c
@@ -40,9 +40,9 @@ u32 get_dynamic_sa_offset_state_ptr_field(struct 
crypto4xx_ctx *ctx)
union dynamic_sa_contents cts;
 
if (ctx->direction == DIR_INBOUND)
-   cts.w = ((struct dynamic_sa_ctl *) ctx->sa_in)->sa_contents;
+   cts.w = ((struct dynamic_sa_ctl *) ctx->sa_in)->sa_contents.w;
else
-   cts.w = ((struct dynamic_sa_ctl *) ctx->sa_out)->sa_contents;
+   cts.w = ((struct dynamic_sa_ctl *) ctx->sa_out)->sa_contents.w;
offset = cts.bf.key_size
+ cts.bf.inner_size
+ cts.bf.outer_size
@@ -66,9 +66,9 @@ u32 get_dynamic_sa_iv_size(struct crypto4xx_ctx *ctx)
union dynamic_sa_contents cts;
 
if (ctx->direction == DIR_INBOUND)
-   cts.w = ((struct dynamic_sa_ctl *) ctx->sa_in)->sa_contents;
+   cts.w = ((struct dynamic_sa_ctl *) ctx->sa_in)->sa_contents.w;
else
-   cts.w = ((struct dynamic_sa_ctl *) ctx->sa_out)->sa_contents;
+   cts.w = ((struct dynamic_sa_ctl *) ctx->sa_out)->sa_contents.w;
return (cts.bf.iv0 + cts.bf.iv1 + cts.bf.iv2 + cts.bf.iv3) * 4;
 }
 
@@ -77,9 +77,9 @@ u32 get_dynamic_sa_offset_key_field(struct crypto4xx_ctx *ctx)
union dynamic_sa_contents cts;
 
if (ctx->direction == DIR_INBOUND)
-   cts.w = ((struct dynamic_sa_ctl *) ctx->sa_in)->sa_contents;
+   cts.w = ((struct dynamic_sa_ctl *) ctx->sa_in)->sa_contents.w;
else
-   cts.w = ((struct dynamic_sa_ctl *) ctx->sa_out)->sa_contents;
+   cts.w = ((struct dynamic_sa_ctl *) ctx->sa_out)->sa_contents.w;
 
return sizeof(struct dynamic_sa_ctl);
 }
diff --git a/drivers/crypto/amcc/crypto4xx_sa.h 
b/drivers/crypto/amcc/crypto4xx_sa.h
index 1352d58d4e34..537d548a20b7 100644
--- a/drivers/crypto/amcc/crypto4xx_sa.h
+++ b/drivers/crypto/amcc/crypto4xx_sa.h
@@ -169,7 +169,7 @@ union sa_command_1 {
 } __attribute__((packed));
 
 struct dynamic_sa_ctl {
-   u32 sa_contents;
+   union dynamic_sa_contents sa_contents;
union sa_command_0 sa_command_0;
union sa_command_1 sa_command_1;
 } __attribute__((packed));
-- 
2.14.1

[RFC PATCH 10/12] crypto: crypto4xx: replace crypto4xx_dev's scatter_buffer_size with constant

2017-08-25 Thread Christian Lamparter 
scatter_buffer_size is always set to PPC4XX_SD_BUFFER_SIZE.
I don't think there's any point in keeping the variable
around.

Signed-off-by: Christian Lamparter 
---
 drivers/crypto/amcc/crypto4xx_core.c | 7 +++
 drivers/crypto/amcc/crypto4xx_core.h | 1 -
 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/crypto/amcc/crypto4xx_core.c 
b/drivers/crypto/amcc/crypto4xx_core.c
index f3f151820373..c47c84f7492a 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
@@ -394,10 +394,9 @@ static u32 crypto4xx_build_sdr(struct crypto4xx_device 
*dev)
if (!dev->sdr)
return -ENOMEM;
 
-   dev->scatter_buffer_size = PPC4XX_SD_BUFFER_SIZE;
dev->scatter_buffer_va =
dma_alloc_coherent(dev->core_dev->device,
-   dev->scatter_buffer_size * PPC4XX_NUM_SD,
+   PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD,
>scatter_buffer_pa, GFP_ATOMIC);
if (!dev->scatter_buffer_va) {
dma_free_coherent(dev->core_dev->device,
@@ -410,7 +409,7 @@ static u32 crypto4xx_build_sdr(struct crypto4xx_device *dev)
 
for (i = 0; i < PPC4XX_NUM_SD; i++) {
sd_array[i].ptr = dev->scatter_buffer_pa +
- dev->scatter_buffer_size * i;
+ PPC4XX_SD_BUFFER_SIZE * i;
}
 
return 0;
@@ -425,7 +424,7 @@ static void crypto4xx_destroy_sdr(struct crypto4xx_device 
*dev)
 
if (dev->scatter_buffer_va != NULL)
dma_free_coherent(dev->core_dev->device,
- dev->scatter_buffer_size * PPC4XX_NUM_SD,
+ PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD,
  dev->scatter_buffer_va,
  dev->scatter_buffer_pa);
 }
diff --git a/drivers/crypto/amcc/crypto4xx_core.h 
b/drivers/crypto/amcc/crypto4xx_core.h
index f886b8bdc868..dc8452be1003 100644
--- a/drivers/crypto/amcc/crypto4xx_core.h
+++ b/drivers/crypto/amcc/crypto4xx_core.h
@@ -87,7 +87,6 @@ struct crypto4xx_device {
program ce sdr_base_register */
void *scatter_buffer_va;
dma_addr_t scatter_buffer_pa;
-   u32 scatter_buffer_size;
 
void *shadow_sa_pool;   /* pool of memory for sa in pd_uinfo */
dma_addr_t shadow_sa_pool_pa;
-- 
2.14.1

[RFC PATCH 08/12] crypto: crypto4xx: enable AES RFC3686, ECB, CFB and OFB offloads

2017-08-25 Thread Christian Lamparter 
The crypto engine supports more than just aes-cbc. This patch
enables the remaining AES block cipher modes that pass the
testmanager's test vectors.

Signed-off-by: Christian Lamparter 
---
 drivers/crypto/amcc/crypto4xx_alg.c  | 66 
 drivers/crypto/amcc/crypto4xx_core.c | 98 
 drivers/crypto/amcc/crypto4xx_core.h | 10 
 drivers/crypto/amcc/crypto4xx_sa.h   |  3 ++
 4 files changed, 177 insertions(+)

diff --git a/drivers/crypto/amcc/crypto4xx_alg.c 
b/drivers/crypto/amcc/crypto4xx_alg.c
index 599b6326c3fb..c9597824a515 100644
--- a/drivers/crypto/amcc/crypto4xx_alg.c
+++ b/drivers/crypto/amcc/crypto4xx_alg.c
@@ -28,6 +28,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "crypto4xx_reg_def.h"
 #include "crypto4xx_core.h"
 #include "crypto4xx_sa.h"
@@ -171,6 +172,71 @@ int crypto4xx_setkey_aes_cbc(struct crypto_ablkcipher 
*cipher,
CRYPTO_FEEDBACK_MODE_NO_FB);
 }
 
+int crypto4xx_setkey_aes_cfb(struct crypto_ablkcipher *cipher,
+const u8 *key, unsigned int keylen)
+{
+   return crypto4xx_setkey_aes(cipher, key, keylen, CRYPTO_MODE_CFB,
+   CRYPTO_FEEDBACK_MODE_128BIT_CFB);
+}
+
+int crypto4xx_setkey_aes_ecb(struct crypto_ablkcipher *cipher,
+const u8 *key, unsigned int keylen)
+{
+   return crypto4xx_setkey_aes(cipher, key, keylen, CRYPTO_MODE_ECB,
+   CRYPTO_FEEDBACK_MODE_NO_FB);
+}
+
+int crypto4xx_setkey_aes_ofb(struct crypto_ablkcipher *cipher,
+const u8 *key, unsigned int keylen)
+{
+   return crypto4xx_setkey_aes(cipher, key, keylen, CRYPTO_MODE_OFB,
+   CRYPTO_FEEDBACK_MODE_64BIT_OFB);
+}
+
+int crypto4xx_setkey_rfc3686(struct crypto_ablkcipher *cipher,
+const u8 *key, unsigned int keylen)
+{
+   struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
+   struct crypto4xx_ctx *ctx = crypto_tfm_ctx(tfm);
+   int rc;
+
+   rc = crypto4xx_setkey_aes(cipher, key, keylen - CTR_RFC3686_NONCE_SIZE,
+   CRYPTO_MODE_CTR, CRYPTO_FEEDBACK_MODE_NO_FB);
+   if (rc)
+   return rc;
+
+   memcpy(ctx->state_record,
+   key + keylen - CTR_RFC3686_NONCE_SIZE, CTR_RFC3686_NONCE_SIZE);
+
+   return 0;
+}
+
+int crypto4xx_rfc3686_encrypt(struct ablkcipher_request *req)
+{
+   struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
+   __be32 iv[AES_IV_SIZE / 4] = { *(u32 *)ctx->state_record,
+   *(u32 *) req->info, *(u32 *) (req->info + 4), cpu_to_be32(1) };
+
+   ctx->direction = DIR_OUTBOUND;
+   ctx->pd_ctl = 1;
+
+   return crypto4xx_build_pd(>base, ctx, req->src, req->dst,
+ req->nbytes, iv, AES_IV_SIZE);
+}
+
+int crypto4xx_rfc3686_decrypt(struct ablkcipher_request *req)
+{
+   struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
+   __be32 iv[AES_IV_SIZE / 4] = { *(u32 *)ctx->state_record,
+   *(u32 *) req->info, *(u32 *) (req->info + 4), cpu_to_be32(1) };
+
+   ctx->direction = DIR_INBOUND;
+   ctx->pd_ctl = 1;
+
+   return crypto4xx_build_pd(>base, ctx, req->src, req->dst,
+ req->nbytes, iv, AES_IV_SIZE);
+}
+
 /**
  * HASH SHA1 Functions
  */
diff --git a/drivers/crypto/amcc/crypto4xx_core.c 
b/drivers/crypto/amcc/crypto4xx_core.c
index 9e96af725b31..3c086cf7b052 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
@@ -36,6 +36,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include "crypto4xx_reg_def.h"
 #include "crypto4xx_core.h"
@@ -1133,6 +1134,103 @@ struct crypto4xx_alg_common crypto4xx_alg[] = {
}
}
}},
+   { .type = CRYPTO_ALG_TYPE_ABLKCIPHER, .u.cipher = {
+   .cra_name   = "cfb(aes)",
+   .cra_driver_name = "cfb-aes-ppc4xx",
+   .cra_priority   = CRYPTO4XX_CRYPTO_PRIORITY,
+   .cra_flags  = CRYPTO_ALG_TYPE_ABLKCIPHER |
+ CRYPTO_ALG_ASYNC |
+ CRYPTO_ALG_KERN_DRIVER_ONLY,
+   .cra_blocksize  = AES_BLOCK_SIZE,
+   .cra_ctxsize= sizeof(struct crypto4xx_ctx),
+   .cra_type   = _ablkcipher_type,
+   .cra_init   = crypto4xx_alg_init,
+   .cra_exit   = crypto4xx_alg_exit,
+   .cra_module = THIS_MODULE,
+   .cra_u  = {
+   .ablkcipher = {
+   .min_keysize= AES_MIN_KEY_SIZE,
+   .max_keysize= AES_MAX_KEY_SIZE,
+   .ivsize = AES_IV_SIZE,
+   .setkey = crypto4xx_setkey_aes_cfb,
+

[RFC PATCH 09/12] crypto: crypto4xx: refactor crypto4xx_copy_pkt_to_dst()

2017-08-25 Thread Christian Lamparter 
This patch refactors the crypto4xx_copy_pkt_to_dst() to use
scatterwalk_map_and_copy() to copy the processed data between
the crypto engine's scatter ring buffer and the destination
specified by the ablkcipher_request.

This also makes the crypto4xx_fill_one_page() function redundant.

Signed-off-by: Christian Lamparter 
---
 drivers/crypto/amcc/crypto4xx_core.c | 126 +--
 1 file changed, 30 insertions(+), 96 deletions(-)

diff --git a/drivers/crypto/amcc/crypto4xx_core.c 
b/drivers/crypto/amcc/crypto4xx_core.c
index 3c086cf7b052..f3f151820373 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
@@ -38,6 +38,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "crypto4xx_reg_def.h"
 #include "crypto4xx_core.h"
 #include "crypto4xx_sa.h"
@@ -481,111 +482,44 @@ static inline struct ce_sd *crypto4xx_get_sdp(struct 
crypto4xx_device *dev,
return  (struct ce_sd *)(dev->sdr + sizeof(struct ce_sd) * idx);
 }
 
-static u32 crypto4xx_fill_one_page(struct crypto4xx_device *dev,
-  dma_addr_t *addr, u32 *length,
-  u32 *idx, u32 *offset, u32 *nbytes)
-{
-   u32 len;
-
-   if (*length > dev->scatter_buffer_size) {
-   memcpy(phys_to_virt(*addr),
-   dev->scatter_buffer_va +
-   *idx * dev->scatter_buffer_size + *offset,
-   dev->scatter_buffer_size);
-   *offset = 0;
-   *length -= dev->scatter_buffer_size;
-   *nbytes -= dev->scatter_buffer_size;
-   if (*idx == PPC4XX_LAST_SD)
-   *idx = 0;
-   else
-   (*idx)++;
-   *addr = *addr +  dev->scatter_buffer_size;
-   return 1;
-   } else if (*length < dev->scatter_buffer_size) {
-   memcpy(phys_to_virt(*addr),
-   dev->scatter_buffer_va +
-   *idx * dev->scatter_buffer_size + *offset, *length);
-   if ((*offset + *length) == dev->scatter_buffer_size) {
-   if (*idx == PPC4XX_LAST_SD)
-   *idx = 0;
-   else
-   (*idx)++;
-   *nbytes -= *length;
-   *offset = 0;
-   } else {
-   *nbytes -= *length;
-   *offset += *length;
-   }
-
-   return 0;
-   } else {
-   len = (*nbytes <= dev->scatter_buffer_size) ?
-   (*nbytes) : dev->scatter_buffer_size;
-   memcpy(phys_to_virt(*addr),
-   dev->scatter_buffer_va +
-   *idx * dev->scatter_buffer_size + *offset,
-   len);
-   *offset = 0;
-   *nbytes -= len;
-
-   if (*idx == PPC4XX_LAST_SD)
-   *idx = 0;
-   else
-   (*idx)++;
-
-   return 0;
-}
-}
-
 static void crypto4xx_copy_pkt_to_dst(struct crypto4xx_device *dev,
  struct ce_pd *pd,
  struct pd_uinfo *pd_uinfo,
  u32 nbytes,
  struct scatterlist *dst)
 {
-   dma_addr_t addr;
-   u32 this_sd;
-   u32 offset;
-   u32 len;
-   u32 i;
-   u32 sg_len;
-   struct scatterlist *sg;
+   unsigned int first_sd = pd_uinfo->first_sd;
+   unsigned int last_sd;
+   unsigned int overflow = 0;
+   unsigned int to_copy;
+   unsigned int dst_start = 0;
+
+   /*
+* Because the scatter buffers are all neatly organized in one
+* big continuous ringbuffer; scatterwalk_map_and_copy() can
+* be instructed to copy a range of buffers in one go.
+*/
 
-   this_sd = pd_uinfo->first_sd;
-   offset = 0;
-   i = 0;
+   last_sd = (first_sd + pd_uinfo->num_sd);
+   if (last_sd > PPC4XX_LAST_SD) {
+   last_sd = PPC4XX_LAST_SD;
+   overflow = last_sd % PPC4XX_NUM_SD;
+   }
 
while (nbytes) {
-   sg = [i];
-   sg_len = sg->length;
-   addr = dma_map_page(dev->core_dev->device, sg_page(sg),
-   sg->offset, sg->length, DMA_TO_DEVICE);
-
-   if (offset == 0) {
-   len = (nbytes <= sg->length) ? nbytes : sg->length;
-   while (crypto4xx_fill_one_page(dev, , ,
-   _sd, , ))
-   ;
-   if (!nbytes)
-   return;
-   i++;
-   } else {
-   len = (nbytes <= (dev->scatter_buffer_size - offset)) ?
-

[RFC PATCH 12/12] crypto: crypto4xx: pointer arithmetic overhaul

2017-08-25 Thread Christian Lamparter 
This patch improves the readability of various functions,
by replacing various void* pointers declarations with
their respective structs *. This makes it possible to go
for the eye-friendly array-indexing methods.

Signed-off-by: Christian Lamparter 
---
 drivers/crypto/amcc/crypto4xx_alg.c  | 26 
 drivers/crypto/amcc/crypto4xx_core.c | 60 +++-
 drivers/crypto/amcc/crypto4xx_core.h | 41 +---
 3 files changed, 59 insertions(+), 68 deletions(-)

diff --git a/drivers/crypto/amcc/crypto4xx_alg.c 
b/drivers/crypto/amcc/crypto4xx_alg.c
index c9597824a515..d08e4c94abed 100644
--- a/drivers/crypto/amcc/crypto4xx_alg.c
+++ b/drivers/crypto/amcc/crypto4xx_alg.c
@@ -134,7 +134,7 @@ static int crypto4xx_setkey_aes(struct crypto_ablkcipher 
*cipher,
}
}
/* Setup SA */
-   sa = (struct dynamic_sa_ctl *) ctx->sa_in;
+   sa = ctx->sa_in;
 
set_dynamic_sa_command_0(sa, SA_NOT_SAVE_HASH, SA_NOT_SAVE_IV,
 SA_LOAD_HASH_FROM_SA, SA_LOAD_IV_FROM_STATE,
@@ -159,7 +159,7 @@ static int crypto4xx_setkey_aes(struct crypto_ablkcipher 
*cipher,
ctx->offset_to_sr_ptr = get_dynamic_sa_offset_state_ptr_field(sa);
 
memcpy(ctx->sa_out, ctx->sa_in, ctx->sa_len * 4);
-   sa = (struct dynamic_sa_ctl *) ctx->sa_out;
+   sa = ctx->sa_out;
sa->sa_command_0.bf.dir = DIR_OUTBOUND;
 
return 0;
@@ -248,8 +248,7 @@ static int crypto4xx_hash_alg_init(struct crypto_tfm *tfm,
struct crypto_alg *alg = tfm->__crt_alg;
struct crypto4xx_alg *my_alg = crypto_alg_to_crypto4xx_alg(alg);
struct crypto4xx_ctx *ctx = crypto_tfm_ctx(tfm);
-   struct dynamic_sa_ctl *sa;
-   struct dynamic_sa_hash160 *sa_in;
+   struct dynamic_sa_hash160 *sa;
int rc;
 
ctx->dev   = my_alg->dev;
@@ -273,25 +272,24 @@ static int crypto4xx_hash_alg_init(struct crypto_tfm *tfm,
 
crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
 sizeof(struct crypto4xx_ctx));
-   sa = (struct dynamic_sa_ctl *) ctx->sa_in;
-   set_dynamic_sa_command_0(sa, SA_SAVE_HASH, SA_NOT_SAVE_IV,
+   sa = (struct dynamic_sa_hash160 *)ctx->sa_in;
+   set_dynamic_sa_command_0(>ctrl, SA_SAVE_HASH, SA_NOT_SAVE_IV,
 SA_NOT_LOAD_HASH, SA_LOAD_IV_FROM_SA,
 SA_NO_HEADER_PROC, ha, SA_CIPHER_ALG_NULL,
 SA_PAD_TYPE_ZERO, SA_OP_GROUP_BASIC,
 SA_OPCODE_HASH, DIR_INBOUND);
-   set_dynamic_sa_command_1(sa, 0, SA_HASH_MODE_HASH,
+   set_dynamic_sa_command_1(>ctrl, 0, SA_HASH_MODE_HASH,
 CRYPTO_FEEDBACK_MODE_NO_FB, SA_EXTENDED_SN_OFF,
 SA_SEQ_MASK_OFF, SA_MC_ENABLE,
 SA_NOT_COPY_PAD, SA_NOT_COPY_PAYLOAD,
 SA_NOT_COPY_HDR);
ctx->direction = DIR_INBOUND;
-   sa->sa_contents.w = SA_HASH160_CONTENTS;
-   sa_in = (struct dynamic_sa_hash160 *) ctx->sa_in;
/* Need to zero hash digest in SA */
-   memset(sa_in->inner_digest, 0, sizeof(sa_in->inner_digest));
-   memset(sa_in->outer_digest, 0, sizeof(sa_in->outer_digest));
-   sa_in->state_ptr = ctx->state_record_dma_addr;
-   ctx->offset_to_sr_ptr = get_dynamic_sa_offset_state_ptr_field(sa);
+   memset(sa->inner_digest, 0, sizeof(sa->inner_digest));
+   memset(sa->outer_digest, 0, sizeof(sa->outer_digest));
+   sa->state_ptr = ctx->state_record_dma_addr;
+   ctx->offset_to_sr_ptr =
+   get_dynamic_sa_offset_state_ptr_field(>ctrl);
 
return 0;
 }
@@ -302,7 +300,7 @@ int crypto4xx_hash_init(struct ahash_request *req)
int ds;
struct dynamic_sa_ctl *sa;
 
-   sa = (struct dynamic_sa_ctl *) ctx->sa_in;
+   sa = ctx->sa_in;
ds = crypto_ahash_digestsize(
__crypto_ahash_cast(req->base.tfm));
sa->sa_command_0.bf.digest_len = ds >> 2;
diff --git a/drivers/crypto/amcc/crypto4xx_core.c 
b/drivers/crypto/amcc/crypto4xx_core.c
index 817c44703a07..773e5faebc47 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
@@ -211,7 +211,7 @@ static u32 crypto4xx_build_pdr(struct crypto4xx_device *dev)
}
memset(dev->pdr, 0, sizeof(struct ce_pd) * PPC4XX_NUM_PD);
dev->shadow_sa_pool = dma_alloc_coherent(dev->core_dev->device,
-  256 * PPC4XX_NUM_PD,
+  sizeof(union shadow_sa_buf) * PPC4XX_NUM_PD,
   >shadow_sa_pool_pa,
   GFP_ATOMIC);
if (!dev->shadow_sa_pool)
@@ -223,16 +223,14 @@ static u32 crypto4xx_build_pdr(struct crypto4xx_device 
*dev)
if (!dev->shadow_sr_pool)
return -ENOMEM;

[PATCH 07/12] crypto: crypto4xx: move and refactor dynamic_contents helpers

2017-08-25 Thread Christian Lamparter 
This patch refactors and moves the dynamic_contents helper
functions into the crypto4xx_sa.h header file.

 * get_dynamic_sa_iv_size is no longer needed, as the cryptoapi
   provides the required IV size information as well.

 * refactor the function declarations to use the a pointer to the
   dynamic_sa_contents union, instead of the crypto4xx_ctx.

 * rename get_dynamic_sa_offset_key_field to get_dynamic_sa_key_field.
   It returns the pointer to the key directly.

Signed-off-by: Christian Lamparter 
---
 drivers/crypto/amcc/Makefile |  2 +-
 drivers/crypto/amcc/crypto4xx_alg.c  | 20 -
 drivers/crypto/amcc/crypto4xx_core.h |  3 --
 drivers/crypto/amcc/crypto4xx_sa.c   | 85 
 drivers/crypto/amcc/crypto4xx_sa.h   | 28 
 5 files changed, 39 insertions(+), 99 deletions(-)
 delete mode 100644 drivers/crypto/amcc/crypto4xx_sa.c

diff --git a/drivers/crypto/amcc/Makefile b/drivers/crypto/amcc/Makefile
index b95539928fdf..e33c185fc163 100644
--- a/drivers/crypto/amcc/Makefile
+++ b/drivers/crypto/amcc/Makefile
@@ -1,3 +1,3 @@
 obj-$(CONFIG_CRYPTO_DEV_PPC4XX) += crypto4xx.o
-crypto4xx-y :=  crypto4xx_core.o crypto4xx_alg.o crypto4xx_sa.o
+crypto4xx-y :=  crypto4xx_core.o crypto4xx_alg.o
 crypto4xx-$(CONFIG_HW_RANDOM_PPC4XX) += crypto4xx_trng.o
diff --git a/drivers/crypto/amcc/crypto4xx_alg.c 
b/drivers/crypto/amcc/crypto4xx_alg.c
index 867a9230cd3f..599b6326c3fb 100644
--- a/drivers/crypto/amcc/crypto4xx_alg.c
+++ b/drivers/crypto/amcc/crypto4xx_alg.c
@@ -29,8 +29,8 @@
 #include 
 #include 
 #include "crypto4xx_reg_def.h"
-#include "crypto4xx_sa.h"
 #include "crypto4xx_core.h"
+#include "crypto4xx_sa.h"
 
 static void set_dynamic_sa_command_0(struct dynamic_sa_ctl *sa, u32 save_h,
 u32 save_iv, u32 ld_h, u32 ld_iv,
@@ -79,8 +79,8 @@ int crypto4xx_encrypt(struct ablkcipher_request *req)
ctx->pd_ctl = 0x1;
 
return crypto4xx_build_pd(>base, ctx, req->src, req->dst,
- req->nbytes, req->info,
- get_dynamic_sa_iv_size(ctx));
+   req->nbytes, req->info,
+   crypto_ablkcipher_ivsize(crypto_ablkcipher_reqtfm(req)));
 }
 
 int crypto4xx_decrypt(struct ablkcipher_request *req)
@@ -92,8 +92,8 @@ int crypto4xx_decrypt(struct ablkcipher_request *req)
ctx->pd_ctl = 1;
 
return crypto4xx_build_pd(>base, ctx, req->src, req->dst,
- req->nbytes, req->info,
- get_dynamic_sa_iv_size(ctx));
+   req->nbytes, req->info,
+   crypto_ablkcipher_ivsize(crypto_ablkcipher_reqtfm(req)));
 }
 
 /**
@@ -147,15 +147,15 @@ static int crypto4xx_setkey_aes(struct crypto_ablkcipher 
*cipher,
 SA_SEQ_MASK_OFF, SA_MC_ENABLE,
 SA_NOT_COPY_PAD, SA_NOT_COPY_PAYLOAD,
 SA_NOT_COPY_HDR);
-   crypto4xx_memcpy_le(ctx->sa_in + get_dynamic_sa_offset_key_field(ctx),
+   crypto4xx_memcpy_le(get_dynamic_sa_key_field(sa),
key, keylen);
sa->sa_contents.w = SA_AES_CONTENTS | (keylen << 2);
sa->sa_command_1.bf.key_len = keylen >> 3;
ctx->is_hash = 0;
ctx->direction = DIR_INBOUND;
-   memcpy(ctx->sa_in + get_dynamic_sa_offset_state_ptr_field(ctx),
-   (void *)>state_record_dma_addr, 4);
-   ctx->offset_to_sr_ptr = get_dynamic_sa_offset_state_ptr_field(ctx);
+   memcpy(sa + get_dynamic_sa_offset_state_ptr_field(sa),
+  (void *)>state_record_dma_addr, 4);
+   ctx->offset_to_sr_ptr = get_dynamic_sa_offset_state_ptr_field(sa);
 
memcpy(ctx->sa_out, ctx->sa_in, ctx->sa_len * 4);
sa = (struct dynamic_sa_ctl *) ctx->sa_out;
@@ -225,7 +225,7 @@ static int crypto4xx_hash_alg_init(struct crypto_tfm *tfm,
memset(sa_in->inner_digest, 0, sizeof(sa_in->inner_digest));
memset(sa_in->outer_digest, 0, sizeof(sa_in->outer_digest));
sa_in->state_ptr = ctx->state_record_dma_addr;
-   ctx->offset_to_sr_ptr = get_dynamic_sa_offset_state_ptr_field(ctx);
+   ctx->offset_to_sr_ptr = get_dynamic_sa_offset_state_ptr_field(sa);
 
return 0;
 }
diff --git a/drivers/crypto/amcc/crypto4xx_core.h 
b/drivers/crypto/amcc/crypto4xx_core.h
index 995f3da91cb2..e3b822907197 100644
--- a/drivers/crypto/amcc/crypto4xx_core.h
+++ b/drivers/crypto/amcc/crypto4xx_core.h
@@ -161,9 +161,6 @@ int crypto4xx_alloc_sa(struct crypto4xx_ctx *ctx, u32 size);
 void crypto4xx_free_sa(struct crypto4xx_ctx *ctx);
 void crypto4xx_free_ctx(struct crypto4xx_ctx *ctx);
 u32 crypto4xx_alloc_state_record(struct crypto4xx_ctx *ctx);
-u32 get_dynamic_sa_offset_state_ptr_field(struct crypto4xx_ctx *ctx);
-u32 get_dynamic_sa_offset_key_field(struct crypto4xx_ctx *ctx);
-u32 get_dynamic_sa_iv_size(struct crypto4xx_ctx *ctx);
 void

[RFC PATCH 03/12] crypto: crypto4xx: set CRYPTO_ALG_KERN_DRIVER_ONLY flag

2017-08-25 Thread Christian Lamparter 
The security offload function is performed by a cryptographic
engine core attached to the 128-bit PLB (processor local bus)
with builtin DMA and interrupt controllers. This, I think,
satisfies the requirement for the CRYPTO_ALG_KERN_DRIVER_ONLY
flag.

Signed-off-by: Christian Lamparter 
---
 drivers/crypto/amcc/crypto4xx_core.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/amcc/crypto4xx_core.c 
b/drivers/crypto/amcc/crypto4xx_core.c
index 48215b8525a2..249d35ff3806 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
@@ -1114,7 +1114,9 @@ struct crypto4xx_alg_common crypto4xx_alg[] = {
.cra_name   = "cbc(aes)",
.cra_driver_name = "cbc-aes-ppc4xx",
.cra_priority   = CRYPTO4XX_CRYPTO_PRIORITY,
-   .cra_flags  = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+   .cra_flags  = CRYPTO_ALG_TYPE_ABLKCIPHER |
+ CRYPTO_ALG_ASYNC |
+ CRYPTO_ALG_KERN_DRIVER_ONLY,
.cra_blocksize  = AES_BLOCK_SIZE,
.cra_ctxsize= sizeof(struct crypto4xx_ctx),
.cra_type   = _ablkcipher_type,
-- 
2.14.1

[PATCH 11/12] crypto: crypto4xx: fix crypto4xx_build_pdr, crypto4xx_build_sdr leak

2017-08-25 Thread Christian Lamparter 
If one of the later memory allocations in rypto4xx_build_pdr()
fails: dev->pdr (and/or) dev->pdr_uinfo wouldn't be freed.

crypto4xx_build_sdr() has the same issue with dev->sdr.

Signed-off-by: Christian Lamparter 
---
 drivers/crypto/amcc/crypto4xx_core.c | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/crypto/amcc/crypto4xx_core.c 
b/drivers/crypto/amcc/crypto4xx_core.c
index c47c84f7492a..817c44703a07 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
@@ -209,7 +209,7 @@ static u32 crypto4xx_build_pdr(struct crypto4xx_device *dev)
  dev->pdr_pa);
return -ENOMEM;
}
-   memset(dev->pdr, 0,  sizeof(struct ce_pd) * PPC4XX_NUM_PD);
+   memset(dev->pdr, 0, sizeof(struct ce_pd) * PPC4XX_NUM_PD);
dev->shadow_sa_pool = dma_alloc_coherent(dev->core_dev->device,
   256 * PPC4XX_NUM_PD,
   >shadow_sa_pool_pa,
@@ -242,13 +242,15 @@ static u32 crypto4xx_build_pdr(struct crypto4xx_device 
*dev)
 
 static void crypto4xx_destroy_pdr(struct crypto4xx_device *dev)
 {
-   if (dev->pdr != NULL)
+   if (dev->pdr)
dma_free_coherent(dev->core_dev->device,
  sizeof(struct ce_pd) * PPC4XX_NUM_PD,
  dev->pdr, dev->pdr_pa);
+
if (dev->shadow_sa_pool)
dma_free_coherent(dev->core_dev->device, 256 * PPC4XX_NUM_PD,
  dev->shadow_sa_pool, dev->shadow_sa_pool_pa);
+
if (dev->shadow_sr_pool)
dma_free_coherent(dev->core_dev->device,
sizeof(struct sa_state_record) * PPC4XX_NUM_PD,
@@ -417,12 +419,12 @@ static u32 crypto4xx_build_sdr(struct crypto4xx_device 
*dev)
 
 static void crypto4xx_destroy_sdr(struct crypto4xx_device *dev)
 {
-   if (dev->sdr != NULL)
+   if (dev->sdr)
dma_free_coherent(dev->core_dev->device,
  sizeof(struct ce_sd) * PPC4XX_NUM_SD,
  dev->sdr, dev->sdr_pa);
 
-   if (dev->scatter_buffer_va != NULL)
+   if (dev->scatter_buffer_va)
dma_free_coherent(dev->core_dev->device,
  PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD,
  dev->scatter_buffer_va,
@@ -1223,7 +1225,7 @@ static int crypto4xx_probe(struct platform_device *ofdev)
 
rc = crypto4xx_build_gdr(core_dev->dev);
if (rc)
-   goto err_build_gdr;
+   goto err_build_pdr;
 
rc = crypto4xx_build_sdr(core_dev->dev);
if (rc)
@@ -1266,12 +1268,11 @@ static int crypto4xx_probe(struct platform_device 
*ofdev)
 err_request_irq:
irq_dispose_mapping(core_dev->irq);
tasklet_kill(_dev->tasklet);
-   crypto4xx_destroy_sdr(core_dev->dev);
 err_build_sdr:
+   crypto4xx_destroy_sdr(core_dev->dev);
crypto4xx_destroy_gdr(core_dev->dev);
-err_build_gdr:
-   crypto4xx_destroy_pdr(core_dev->dev);
 err_build_pdr:
+   crypto4xx_destroy_pdr(core_dev->dev);
kfree(core_dev->dev);
 err_alloc_dev:
kfree(core_dev);
-- 
2.14.1

[PATCH 05/12] crypto: crypto4xx: remove double assignment of pd_uinfo->state

2017-08-25 Thread Christian Lamparter 
crypto4xx_put_pd_to_pdr() already clears the flag.

Signed-off-by: Christian Lamparter 
---
 drivers/crypto/amcc/crypto4xx_core.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/crypto/amcc/crypto4xx_core.c 
b/drivers/crypto/amcc/crypto4xx_core.c
index 249d35ff3806..9e96af725b31 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
@@ -1079,7 +1079,6 @@ static void crypto4xx_bh_tasklet_cb(unsigned long data)
pd->pd_ctl.bf.pe_done = 0;
crypto4xx_pd_done(core_dev->dev, tail);
crypto4xx_put_pd_to_pdr(core_dev->dev, tail);
-   pd_uinfo->state = PD_ENTRY_FREE;
} else {
/* if tail not done, break */
break;
-- 
2.14.1

[PATCH 02/12] crypto: crypto4xx: remove unused definitions and write-only variables

2017-08-25 Thread Christian Lamparter 
This patch removes several unused code and definitons
(structs, variables, ...).

Signed-off-by: Christian Lamparter 
---
 drivers/crypto/amcc/crypto4xx_alg.c  |  6 --
 drivers/crypto/amcc/crypto4xx_core.c |  2 +-
 drivers/crypto/amcc/crypto4xx_core.h | 16 
 3 files changed, 1 insertion(+), 23 deletions(-)

diff --git a/drivers/crypto/amcc/crypto4xx_alg.c 
b/drivers/crypto/amcc/crypto4xx_alg.c
index 4afca3968773..6da92321173b 100644
--- a/drivers/crypto/amcc/crypto4xx_alg.c
+++ b/drivers/crypto/amcc/crypto4xx_alg.c
@@ -75,7 +75,6 @@ int crypto4xx_encrypt(struct ablkcipher_request *req)
struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
 
ctx->direction = DIR_OUTBOUND;
-   ctx->hash_final = 0;
ctx->is_hash = 0;
ctx->pd_ctl = 0x1;
 
@@ -89,7 +88,6 @@ int crypto4xx_decrypt(struct ablkcipher_request *req)
struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
 
ctx->direction = DIR_INBOUND;
-   ctx->hash_final = 0;
ctx->is_hash = 0;
ctx->pd_ctl = 1;
 
@@ -136,7 +134,6 @@ static int crypto4xx_setkey_aes(struct crypto_ablkcipher 
*cipher,
}
/* Setup SA */
sa = (struct dynamic_sa_ctl *) ctx->sa_in;
-   ctx->hash_final = 0;
 
set_dynamic_sa_command_0(sa, SA_NOT_SAVE_HASH, SA_NOT_SAVE_IV,
 SA_LOAD_HASH_FROM_SA, SA_LOAD_IV_FROM_STATE,
@@ -191,7 +188,6 @@ static int crypto4xx_hash_alg_init(struct crypto_tfm *tfm,
 
ctx->dev   = my_alg->dev;
ctx->is_hash = 1;
-   ctx->hash_final = 0;
 
/* Create SA */
if (ctx->sa_in_dma_addr || ctx->sa_out_dma_addr)
@@ -256,7 +252,6 @@ int crypto4xx_hash_update(struct ahash_request *req)
struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
 
ctx->is_hash = 1;
-   ctx->hash_final = 0;
ctx->pd_ctl = 0x11;
ctx->direction = DIR_INBOUND;
 
@@ -274,7 +269,6 @@ int crypto4xx_hash_digest(struct ahash_request *req)
 {
struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
 
-   ctx->hash_final = 1;
ctx->pd_ctl = 0x11;
ctx->direction = DIR_INBOUND;
 
diff --git a/drivers/crypto/amcc/crypto4xx_core.c 
b/drivers/crypto/amcc/crypto4xx_core.c
index 3118cec0d81e..48215b8525a2 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
@@ -962,7 +962,7 @@ u32 crypto4xx_build_pd(struct crypto_async_request *req,
 
sa->sa_command_1.bf.hash_crypto_offset = 0;
pd->pd_ctl.w = ctx->pd_ctl;
-   pd->pd_ctl_len.w = 0x0040 | (ctx->bypass << 24) | datalen;
+   pd->pd_ctl_len.w = 0x0040 | datalen;
pd_uinfo->state = PD_ENTRY_INUSE;
wmb();
/* write any value to push engine to read a pd */
diff --git a/drivers/crypto/amcc/crypto4xx_core.h 
b/drivers/crypto/amcc/crypto4xx_core.h
index ecfdcfe3698d..8230d3f7edbe 100644
--- a/drivers/crypto/amcc/crypto4xx_core.h
+++ b/drivers/crypto/amcc/crypto4xx_core.h
@@ -72,7 +72,6 @@ struct pd_uinfo {
 struct crypto4xx_device {
struct crypto4xx_core_device *core_dev;
char *name;
-   u64  ce_phy_address;
void __iomem *ce_base;
void __iomem *trng_base;
 
@@ -127,21 +126,9 @@ struct crypto4xx_ctx {
u32 sa_len;
u32 offset_to_sr_ptr;   /* offset to state ptr, in dynamic sa */
u32 direction;
-   u32 next_hdr;
u32 save_iv;
-   u32 pd_ctl_len;
u32 pd_ctl;
-   u32 bypass;
u32 is_hash;
-   u32 hash_final;
-};
-
-struct crypto4xx_req_ctx {
-   struct crypto4xx_device *dev;   /* Device in which
-   operation to send to */
-   void *sa;
-   u32 sa_dma_addr;
-   u16 sa_len;
 };
 
 struct crypto4xx_alg_common {
@@ -172,9 +159,6 @@ static inline struct crypto4xx_alg 
*crypto_alg_to_crypto4xx_alg(
 
 extern int crypto4xx_alloc_sa(struct crypto4xx_ctx *ctx, u32 size);
 extern void crypto4xx_free_sa(struct crypto4xx_ctx *ctx);
-extern u32 crypto4xx_alloc_sa_rctx(struct crypto4xx_ctx *ctx,
-  struct crypto4xx_ctx *rctx);
-extern void crypto4xx_free_sa_rctx(struct crypto4xx_ctx *rctx);
 extern void crypto4xx_free_ctx(struct crypto4xx_ctx *ctx);
 extern u32 crypto4xx_alloc_state_record(struct crypto4xx_ctx *ctx);
 extern u32 get_dynamic_sa_offset_state_ptr_field(struct crypto4xx_ctx *ctx);
-- 
2.14.1

[PATCH 04/12] crypto: crypto4xx: remove extern statement before function declaration

2017-08-25 Thread Christian Lamparter 
All function declarations are "extern" by default, there is no need to
specify it explicitly.

For C99 states in 6.2.2.5:
"If the declaration of an identifier for a function has no
storage-class specifier, its linkage is determined exactly
as if it were declared with the storage-class specifier
extern."

Signed-off-by: Christian Lamparter 
---
 drivers/crypto/amcc/crypto4xx_core.h | 48 ++--
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/drivers/crypto/amcc/crypto4xx_core.h 
b/drivers/crypto/amcc/crypto4xx_core.h
index 8230d3f7edbe..995f3da91cb2 100644
--- a/drivers/crypto/amcc/crypto4xx_core.h
+++ b/drivers/crypto/amcc/crypto4xx_core.h
@@ -157,28 +157,28 @@ static inline struct crypto4xx_alg 
*crypto_alg_to_crypto4xx_alg(
return container_of(x, struct crypto4xx_alg, alg.u.cipher);
 }
 
-extern int crypto4xx_alloc_sa(struct crypto4xx_ctx *ctx, u32 size);
-extern void crypto4xx_free_sa(struct crypto4xx_ctx *ctx);
-extern void crypto4xx_free_ctx(struct crypto4xx_ctx *ctx);
-extern u32 crypto4xx_alloc_state_record(struct crypto4xx_ctx *ctx);
-extern u32 get_dynamic_sa_offset_state_ptr_field(struct crypto4xx_ctx *ctx);
-extern u32 get_dynamic_sa_offset_key_field(struct crypto4xx_ctx *ctx);
-extern u32 get_dynamic_sa_iv_size(struct crypto4xx_ctx *ctx);
-extern void crypto4xx_memcpy_le(unsigned int *dst,
-   const unsigned char *buf, int len);
-extern u32 crypto4xx_build_pd(struct crypto_async_request *req,
- struct crypto4xx_ctx *ctx,
- struct scatterlist *src,
- struct scatterlist *dst,
- unsigned int datalen,
- void *iv, u32 iv_len);
-extern int crypto4xx_setkey_aes_cbc(struct crypto_ablkcipher *cipher,
-   const u8 *key, unsigned int keylen);
-extern int crypto4xx_encrypt(struct ablkcipher_request *req);
-extern int crypto4xx_decrypt(struct ablkcipher_request *req);
-extern int crypto4xx_sha1_alg_init(struct crypto_tfm *tfm);
-extern int crypto4xx_hash_digest(struct ahash_request *req);
-extern int crypto4xx_hash_final(struct ahash_request *req);
-extern int crypto4xx_hash_update(struct ahash_request *req);
-extern int crypto4xx_hash_init(struct ahash_request *req);
+int crypto4xx_alloc_sa(struct crypto4xx_ctx *ctx, u32 size);
+void crypto4xx_free_sa(struct crypto4xx_ctx *ctx);
+void crypto4xx_free_ctx(struct crypto4xx_ctx *ctx);
+u32 crypto4xx_alloc_state_record(struct crypto4xx_ctx *ctx);
+u32 get_dynamic_sa_offset_state_ptr_field(struct crypto4xx_ctx *ctx);
+u32 get_dynamic_sa_offset_key_field(struct crypto4xx_ctx *ctx);
+u32 get_dynamic_sa_iv_size(struct crypto4xx_ctx *ctx);
+void crypto4xx_memcpy_le(unsigned int *dst,
+const unsigned char *buf, int len);
+u32 crypto4xx_build_pd(struct crypto_async_request *req,
+  struct crypto4xx_ctx *ctx,
+  struct scatterlist *src,
+  struct scatterlist *dst,
+  unsigned int datalen,
+  void *iv, u32 iv_len);
+int crypto4xx_setkey_aes_cbc(struct crypto_ablkcipher *cipher,
+const u8 *key, unsigned int keylen);
+int crypto4xx_encrypt(struct ablkcipher_request *req);
+int crypto4xx_decrypt(struct ablkcipher_request *req);
+int crypto4xx_sha1_alg_init(struct crypto_tfm *tfm);
+int crypto4xx_hash_digest(struct ahash_request *req);
+int crypto4xx_hash_final(struct ahash_request *req);
+int crypto4xx_hash_update(struct ahash_request *req);
+int crypto4xx_hash_init(struct ahash_request *req);
 #endif
-- 
2.14.1

[PATCH 01/12] crypto: crypto4xx: remove bad list_del

2017-08-25 Thread Christian Lamparter 
alg entries are only added to the list, after the registration
was successful. If the registration failed, it was never added
to the list in the first place.

Signed-off-by: Christian Lamparter 
---
 drivers/crypto/amcc/crypto4xx_core.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/amcc/crypto4xx_core.c 
b/drivers/crypto/amcc/crypto4xx_core.c
index 65dc78b91dea..3118cec0d81e 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
@@ -1033,12 +1033,10 @@ int crypto4xx_register_alg(struct crypto4xx_device 
*sec_dev,
break;
}
 
-   if (rc) {
-   list_del(>entry);
+   if (rc)
kfree(alg);
-   } else {
+   else
list_add_tail(>entry, _dev->alg_list);
-   }
}
 
return 0;
-- 
2.14.1

Dear God's Select,

2017-08-25 Thread Jaslin Ikhsan 
Dear God's Select,

I am writing this mail to you with heavy tears In my eyes and great
sorrow in my heart, My Name is Mrs.Jaslin Ikhsan, and I am contacting
you from my country Tunisia I want to tell you this because I don't
have any other option than to tell you as I was touched to open up to
you, I married to Mr. Ouedrago Daisy Brown who worked with Tunisia
embassy in Burkina Faso for nine years before he died in the year
2005.We were married for eleven years without a child.

He died after a brief illness that lasted for only five days. Since
his death I decided not to remarry, When my late husband was alive he
deposited the sum of US$ 8.5m (Eight Million Five hundred Thousand
Dollars) in a bank in Ouagadougou the capital city of Burkina Faso in
west Africa Presently this money is still in bank. He made this money
available for exportation of Gold from Burkina Faso mining.

Recently, My Doctor told me that I would not last for the period of
seven months due to cancer problem. The one that disturbs me most is
my stroke sickness .Having known my condition I decided to hand you
over this money to take care of the less-privileged people, you will
utilize this money the way I am going to instruct herein.

I want you to take 30 Percent of the total money for your personal use
While 70% of the money will go to charity" people in the street and
helping the orphanage. I grew up as an Orphan and I don't have any
body as my family member, just to endeavour that the house of God is
maintained. Am doing this so that God will forgive my sins and accept
my soul because these sicknesses have suffered me so much.

As soon a s I receive your reply I shall give you the contact of the
bank in Burkina Faso and I will also instruct the Bank Manger to issue
you an authority letter that will prove you the present beneficiary of
the money in the bank that is if you assure me that you will act
accordingly as I Stated herein.

Always reply to my alternative for security purposes.
Hoping to receive your reply:
>From Mrs.Jaslin Ikhsan