Add support for DES operations.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Signed-off-by: Arnaud Ebalard a...@natisbad.org
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell/cipher.c | 150
.
Also note that the old way of retrieving the SRAM memory region is still
supported, or in other words, backward compatibility is preserved.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
.../devicetree/bindings/crypto/mv_cesa.txt | 24 ++---
drivers/crypto
On Dove platforms, the crypto engine requires a clock. Document this
clocks property in the mv_cesa bindings doc.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
Documentation/devicetree/bindings/crypto/mv_cesa.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git
/CESA: add MD5 support
crypto: marvell/CESA: add SHA256 support
crypto: marvell/CESA: add support for Kirkwood and Dove SoCs
Boris Brezillon (10):
crypto: mv_cesa: document the clocks property
crypto: mv_cesa: use gen_pool to reserve the SRAM memory region
crypto: mv_cesa: explicitly
Add DT bindings documentation for the new marvell-cesa driver.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
.../devicetree/bindings/crypto/marvell-cesa.txt| 45 ++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree
it is explicitly requested to do
so).
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/crypto/marvell/cesa.c | 42 +++---
1 file changed, 35 insertions(+), 7 deletions(-)
diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto
on a per platform basis.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Signed-off-by: Arnaud Ebalard a...@natisbad.org
---
drivers/crypto/Kconfig | 1 +
drivers/crypto/marvell/Makefile | 2 +-
drivers/crypto/marvell/cesa.c | 68 +++
drivers/crypto/marvell/cesa.h
From: Arnaud Ebalard a...@natisbad.org
Add support for MD5 operations.
Signed-off-by: Arnaud Ebalard a...@natisbad.org
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell
From: Arnaud Ebalard a...@natisbad.org
Add support for Triple-DES operations.
Signed-off-by: Arnaud Ebalard a...@natisbad.org
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto
for the feedback,
Boris
[1]https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/drivers/crypto/mv_cesa.c?id=7e6ce3db5329a32c83da9753bae162eb3f22dfca
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On Fri, 3 Jul 2015 10:58:07 +0100
Russell King - ARM Linux li...@arm.linux.org.uk wrote:
On Fri, Jul 03, 2015 at 11:43:05AM +0200, Boris Brezillon wrote:
Which led us to think that this could be related to a non cache-line
aligned buffer problem: if we share the cache line with someone
check ?
Best Regards,
Boris
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Hi Herbert,
On Mon, 25 May 2015 15:58:12 +0800
Herbert Xu herb...@gondor.apana.org.au wrote:
On Fri, May 22, 2015 at 03:33:48PM +0200, Boris Brezillon wrote:
+static int mv_cesa_sha1_export(struct ahash_request *req, void *out)
+{
+ struct sha1_state *out_state = out;
+ struct
On Mon, 25 May 2015 16:05:47 +0800
Herbert Xu herb...@gondor.apana.org.au wrote:
On Fri, May 22, 2015 at 03:33:48PM +0200, Boris Brezillon wrote:
+struct ahash_alg mv_ahmac_sha1_alg = {
+ .init = mv_cesa_ahmac_sha1_init,
+ .update = mv_cesa_ahash_update,
+ .final
On Mon, 25 May 2015 13:13:43 +0200
Imre Kaloz ka...@openwrt.org wrote:
Hi Boris,
On Mon, 25 May 2015 13:08:12 +0200, Boris Brezillon
boris.brezil...@free-electrons.com wrote:
Yep, I noticed that after submitting this version. I guess I only
needed the import function for my test
Hi Imre,
On Mon, 25 May 2015 12:44:44 +0200
Imre Kaloz ka...@openwrt.org wrote:
Hi Boris,
On Mon, 25 May 2015 10:10:16 +0200, Boris Brezillon
boris.brezil...@free-electrons.com wrote:
snip
Yep, I noticed that after submitting this version. I guess I only
needed the import
Jason, Gregory,
On Mon, 25 May 2015 16:46:51 +
Jason Cooper ja...@lakedaemon.net wrote:
On Mon, May 25, 2015 at 05:39:13PM +0200, Gregory CLEMENT wrote:
Hi Boris, Arnaud,
On 22/05/2015 15:34, Boris Brezillon wrote:
From: Arnaud Ebalard a...@natisbad.org
Add crypto related
On Tue, 26 May 2015 09:06:29 +
Jason Cooper ja...@lakedaemon.net wrote:
On Mon, May 25, 2015 at 08:43:02PM +0200, Boris Brezillon wrote:
Jason, Gregory,
On Mon, 25 May 2015 16:46:51 +
Jason Cooper ja...@lakedaemon.net wrote:
On Mon, May 25, 2015 at 05:39:13PM +0200
On Mon, 25 May 2015 17:10:37 +0200
Gregory CLEMENT gregory.clem...@free-electrons.com wrote:
Hi Boris,
On 22/05/2015 15:34, Boris Brezillon wrote:
Enable the crypto IP on armada-xp-gp.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/armada
Hi Gregory,
On Mon, 25 May 2015 17:33:24 +0200
Gregory CLEMENT gregory.clem...@free-electrons.com wrote:
Hi Boris, Arnaud,
On 22/05/2015 15:34, Boris Brezillon wrote:
From: Arnaud Ebalard a...@natisbad.org
Add crypto related nodes in armada-370.dtsi.
Signed-off-by: Arnaud
On Tue, 26 May 2015 11:10:41 +0200
Thomas Petazzoni thomas.petazz...@free-electrons.com wrote:
Dear Boris Brezillon,
On Tue, 26 May 2015 11:03:45 +0200, Boris Brezillon wrote:
There is no clocks property. After a quick look on the datasheet, indeed
I didn't
find any clock which
Hi Corentin,
On Sat, 23 May 2015 15:12:23 +0200
Corentin LABBE clabbe.montj...@gmail.com wrote:
Le 17/05/2015 10:45, Boris Brezillon a écrit :
Hi Corentin,
I started to review this new version, and I still think there's
something wrong with the way your processing crypto requests
Add support for DES operations.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Signed-off-by: Arnaud Ebalard a...@natisbad.org
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell/cipher.c | 150
it is explicitly requested to do
so).
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/crypto/marvell/cesa.c | 42 +++---
1 file changed, 35 insertions(+), 7 deletions(-)
diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto
From: Arnaud Ebalard a...@natisbad.org
Add support for SHA256 operations.
Signed-off-by: Arnaud Ebalard a...@natisbad.org
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell
Enable the crypto IP on armada-xp-gp.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/armada-xp-gp.dts | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts
b/arch/arm/boot/dts/armada-xp-gp.dts
index
-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/crypto/marvell/cesa.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marvell/cesa.c
index a7a7e0e..16f9364 100644
--- a/drivers/crypto/marvell/cesa.c
+++ b
From: Arnaud Ebalard a...@natisbad.org
Add crypto related nodes to kirkwood.dtsi.
Signed-off-by: Arnaud Ebalard a...@natisbad.org
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/kirkwood.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Add DT bindings documentation for the new marvell-cesa driver.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
.../devicetree/bindings/crypto/marvell-cesa.txt| 46 ++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree
From: Arnaud Ebalard a...@natisbad.org
Add support for MD5 operations.
Signed-off-by: Arnaud Ebalard a...@natisbad.org
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell
.
This commit introduce the base infrastructure allowing us to add support
for DMA optimization.
It also includes support for one hash (SHA1) and one cipher (AES)
algorithm, and enable those features on the Armada 370 SoC.
Other algorithms and platforms will be added later on.
Signed-off-by: Boris Brezillon
on a per platform basis.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Signed-off-by: Arnaud Ebalard a...@natisbad.org
---
drivers/crypto/Kconfig | 1 +
drivers/crypto/marvell/Makefile | 2 +-
drivers/crypto/marvell/cesa.c | 68 +++
drivers/crypto/marvell/cesa.h
The mv_cesa driver does not request the CESA registers memory region.
Since we're about to add a new CESA driver, we need to make sure only one
of these drivers probe the CESA device, and requesting the registers memory
region is a good way to achieve that.
Signed-off-by: Boris Brezillon
SHA256 support
crypto: marvell/CESA: add support for Kirkwood SoCs
ARM: marvell/dt: add crypto node to armada 370 dtsi
ARM: marvell/dt: add crypto node to kirkwood dtsi
Boris Brezillon (10):
crypto: mv_cesa: request registers memory region
crypto: add a new driver for Marvell's CESA
From: Arnaud Ebalard a...@natisbad.org
Add support for Triple-DES operations.
Signed-off-by: Arnaud Ebalard a...@natisbad.org
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto
is stable/secure enough.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/crypto/marvell/cesa.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marvell/cesa.c
index dcfaacd..f763981 100644
--- a/drivers/crypto
Add CESA IP description for all the missing armada SoCs (XP, 375 and 38x).
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/crypto/marvell/cesa.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marvell
Add crypto related nodes to armada-xp.dtsi.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/armada-xp.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada
6 CAAM also behaves
> the same.
>
> Unfortunately, this is a large series, but the driver unfortunately
> needs this level of bug fixing to work properly.
Thanks for spending some time fixing those bugs and
simplifying/factorizing/documenting the hash logic.
To the whole series:
Ac
ically, only
> appropriate sparse warnings should be fixed without penalising code.)
To the whole series:
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
>
> drivers/crypto/marvell/cesa.h | 44
> -
> dr
+585,8 @@ static int shash_prepare_alg(struct shash_alg *alg)
>
> if (alg->digestsize > PAGE_SIZE / 8 ||
> alg->descsize > PAGE_SIZE / 8 ||
> - alg->statesize > PAGE_SIZE / 8)
> + alg->statesize > PAGE_SIZE / 8 ||
> +
ks.
>
[1]http://lists.infradead.org/pipermail/linux-arm-kernel/2015-May/344120.html
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Embedded Linux and Kernel engineering
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t; Signed-off-by: Russell King <rmk+ker...@arm.linux.org.uk>
Looks good to me.
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
Thanks again for taking care of that.
Regards,
Boris
> ---
> Replacement to patch 5, going a little further, as requ
CESA"). This commit adds
> the relevant developers to the list of maintainers.
>
> Cc: Boris Brezillon <boris.brezil...@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
Thanks,
Boris
> Cc: Arnaud Ebalard <a...@natisbad.org>
>
writes. This patch is
> > optional.
> >
> > The second patch adds the necessary statesize members to the Marvell
> > code which were previously missing. Fixing this uncovered a further
> > problem, which the third patch addresses.
>
Thanks again for spending some
as if it was a "struct md5_state",
> "struct sha1_state" etc. Add the necessary initialisers for the
> .statesize member.
>
> Signed-off-by: Russell King <rmk+ker...@arm.linux.org.uk>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
> ---
rtially initialises
> this structure, we end up with a lot of members which are left with
> whatever data was in memory prior to sock_kmalloc().
>
> Add zero-initialisation of this structure.
>
> Signed-off-by: Russell King <rmk+ker...@arm.linux.org.uk>
Acked-by: Boris
f members which are left with
> whatever data was in memory prior to sock_kmalloc().
>
> Add zero-initialisation of this structure.
Maybe you should also change your commit message since this patch no
longer initializes the req struct to zero, otherwise
Acked-by: Boris
imported state.
>
> Signed-off-by: Russell King <rmk+ker...@arm.linux.org.uk>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
Thanks!
> ---
> drivers/crypto/marvell/hash.c | 15 +++
> 1 file changed, 15 insertions(+)
>
> diff -
>
> Signed-off-by: Russell King <rmk+ker...@arm.linux.org.uk>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
Thanks.
> ---
> drivers/crypto/marvell/hash.c | 88
> +++
> 1 file changed, 21 insertions(+),
had the CC stable + Fixes tags to patches 1 to 4 so that they
can be applied on 4.2 too?
Best Regards,
Boris
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On Fri, 10 Jul 2015 14:46:16 +0900
Krzysztof Kozlowski k.kozlow...@samsung.com wrote:
platform_driver does not need to set an owner because
platform_driver_register() will set it.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Acked-by: Boris Brezillon boris.brezil...@free
d-by: Vincent Donnefort <vdonnef...@gmail.com>
> Fixes: db509a45339fd ("crypto: marvell/cesa - add TDMA support")
> Cc: <sta...@vger.kernel.org> # v4.2+
> Signed-off-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
Acked-by: Boris Brezillon <bor
>
> Signed-off-by: Romain Perier <romain.per...@free-electrons.com>
Apart from the coding style issue mentioned below,
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
> ---
> drivers/crypto/marvell/cipher.c | 2 ++
> drivers/crypto/marvell/hash.c | 2 ++
c(chain, gfp_flags);
> + if (IS_ERR(tdma))
> + return PTR_ERR(tdma);
> +
> + cache = dma_pool_alloc(cesa_dev->dma->iv_pool, flags, _handle);
> + if (!cache)
> + return -ENOMEM;
> +
> + tdma->byte_cnt = cpu_to_le32(size | BIT(31));
f the same size.
>
> Signed-off-by: Romain Perier <romain.per...@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
> ---
> drivers/crypto/marvell/cesa.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git
which will always be
false, since mv_cesa_ahash_dma_req_init() is the function supposed to
fill the ->first and ->last fields.
> >
> > Should be
> >
> > if (cesa_dev->caps->has_tdma)
> >
> >>ret = mv_cesa_ahash_dma_req_init(req);
>
f the same size.
>
> Signed-off-by: Romain Perier <romain.per...@free-electrons.com>
You forgot
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
> ---
> drivers/crypto/marvell/cesa.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
>
e useful if we want to call
> the process and the complete operations from different locations
> depending on the type of the request (different cleanup logic).
>
> Signed-off-by: Romain Perier <romain.per...@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.
mv_cesa_ablkcipher_std_req and mv_cesa_req
> to mv_cesa_ablkcipher_req directly. There are also no needs to keep the
> 'base' field into the union of mv_cesa_ahash_req, so move it into the
> upper structure.
>
> Signed-off-by: Romain Perier <romain.per...@free-electrons.com>
On Fri, 17 Jun 2016 13:24:08 +0200
Romain Perier wrote:
> The Cryptographic Engines and Security Accelerators (CESA) supports the
> Multi-Packet Chain Mode. With this mode enabled, multiple tdma requests
> can be chained and processed by the hardware without
>
> Signed-off-by: Romain Perier <romain.per...@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
Thanks for fixing it.
> ---
> drivers/crypto/marvell/tdma.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff -
ixing the coding style issue,
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
> ---
>
> Changes in v2:
> - Reworded the commit message, the term 'asynchronously' was
> ambigous
> - Changed the value of CESA_TDMA_IV from 4 to 3
> - Adding missing bl
se kernel panic with the associated
> backtrace to let the user know that something went wrong in the CESA
> driver.
>
> Signed-off-by: Romain Perier <romain.per...@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
> ---
>
> Changes in v2:
>
works and allow to prepare
> a request while the engine is running.
>
> Signed-off-by: Romain Perier <romain.per...@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
> ---
> drivers/crypto/marvell/cipher.c | 6 +++---
> drivers/crypto/
On Fri, 17 Jun 2016 13:24:07 +0200
Romain Perier wrote:
> This commits adds support for fine grained load balancing on
> multi-engine IPs. The engine is pre-selected based on its current load
> and on the weight of the crypto request that is about to be
t does not stop the crypto
> stack from sending asychronous requests, so more cryptographic tasks
> are processed by the engines.
>
> Signed-off-by: Romain Perier <romain.per...@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
> ---
> d
; running).
>
> Signed-off-by: Romain Perier <romain.per...@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
One nit below ;).
> ---
>
> Changes in v3:
>
> - Cosmetic changes: Extra blank lines and coding style issues
> on
. We also reduce contention
> on 'cesa_dev->lock' and improve parallelism.
>
> Signed-off-by: Romain Perier <romain.per...@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
> ---
>
> Changes in v3:
>
> - Renamed mv_cesa_deq
sh_digestsize(crypto_ahash_reqtfm(ahashreq));
> for (i = 0; i < digsize / 4; i++)
> @@ -326,8 +329,6 @@ static int mv_cesa_ahash_process(struct
> crypto_async_request *req, u32 status)
> result[i] = cpu_to_be32(creq->state[i]);
> }
>
a_ahash_std_prepare(struct
> ahash_request *req)
> {
> struct mv_cesa_ahash_req *creq = ahash_request_ctx(req);
> struct mv_cesa_ahash_std_req *sreq = >req.std;
> - struct mv_cesa_engine *engine = sreq->base.engine;
>
> sreq->offset = 0;
req.base);
> if (mv_cesa_req_needs_cleanup(>base, ret))
> mv_cesa_ahash_cleanup(req);
>
> @@ -750,7 +744,7 @@ static int mv_cesa_ahash_finup(struct ahash_request *req)
> if (cached)
> return 0;
>
> - ret = mv_cesa_queue_req(>base
on, and move mv_cesa_ablkcipher_std_req and
mv_cesa_req base in mv_cesa_ablkcipher_req (you'll also have to remove
the base field from the mv_cesa_ablkcipher_std_req struct).
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t; + memcpy_fromio(ablkreq->info, dreq->chain.last->data, ivsize);
Just use memcpy() here: you're not copying from an iomem region here.
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);
> +
> + /* Re-chaining to the next request */
> + engine->chain.first = tdma->next;
> + tdma->next = NULL;
> +
> + /* If this is the last request, clear the
We are checking twice if dma->cache_pool is not NULL but are never testing
dma->padding_pool value.
Signed-off-by: Boris Brezillon <boris.brezil...@free-electrons.com>
---
drivers/crypto/marvell/cesa.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cr
meantime, thus leading to an invalind dma_pool_free()
call (the buffer passed in argument has not been allocated from the pool).
Signed-off-by: Boris Brezillon <boris.brezil...@free-electrons.com>
Reported-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/crypt
On Fri, 18 Mar 2016 09:51:37 -0400
Sinan Kaya <ok...@codeaurora.org> wrote:
> On 3/18/2016 7:25 AM, Robin Murphy wrote:
> > On 18/03/16 09:30, Boris Brezillon wrote:
> >> On Thu, 17 Mar 2016 23:50:20 +
> >> Russell King - ARM Linux <li...@arm.linux.org.
ot poking at memory which isn't a struct
> page, ultimately resulting in something that isn't SRAM being pointed
> to by "engine->sram_dma".
>
Or we could just do
engine->sram_dma = res->start;
which is pretty much what the SRAM/genalloc code is doing already.
--
->export() might be called before we have done an update operation,
and in this case the ->state field is left uninitialized.
Put the correct default value when initializing the request.
Signed-off-by: Boris Brezillon <boris.brezil...@free-electrons.com>
---
drivers/crypto/marvell
Forward devm_ioremap_resource() error code instead of returning
-ENOMEM.
Signed-off-by: Boris Brezillon <boris.brezil...@free-electrons.com>
Reported-by: Russell King - ARM Linux <li...@arm.linux.org.uk>
Fixes: f63601fd616a ("crypto: marvell/cesa - add a new driver for Marvell's
Forward devm_ioremap_resource() error code instead of returning
-ENOMEM.
Signed-off-by: Boris Brezillon <boris.brezil...@free-electrons.com>
Reported-by: Russell King - ARM Linux <li...@arm.linux.org.uk>
Fixes: f63601fd616a ("crypto: marvell/cesa - add a new driver for Marvell's
On Mon, 21 Mar 2016 12:03:43 +0300
Dan Carpenter <dan.carpen...@oracle.com> wrote:
> creq->cache[] is an array inside the struct, it's not a pointer and it
> can't be NULL.
>
> Signed-off-by: Dan Carpenter <dan.carpen...@oracle.com>
Acked-by: Boris Brezillon <bori
On Thu, 17 Mar 2016 10:21:34 +0100
Boris Brezillon <boris.brezil...@free-electrons.com> wrote:
> Crypto requests are not guaranteed to be finalized (->final() call),
> and can be freed at any moment, without getting any notification from
> the core. This can lead to memory le
Sorry for the noise, just sent twice the same patch :-/.
Please ignore this one.
On Thu, 17 Mar 2016 10:47:11 +0100
Boris Brezillon <boris.brezil...@free-electrons.com> wrote:
> Forward devm_ioremap_resource() error code instead of returning
> -ENOMEM.
>
> Signed-off-b
On Fri, 18 Mar 2016 11:25:48 +
Robin Murphy <robin.mur...@arm.com> wrote:
> On 18/03/16 09:30, Boris Brezillon wrote:
> > On Thu, 17 Mar 2016 23:50:20 +
> > Russell King - ARM Linux <li...@arm.linux.org.uk> wrote:
> >
> >> On Thu, Mar 17, 2016
Hi Russell,
On Thu, 31 Mar 2016 15:14:13 +0100
Russell King - ARM Linux <li...@arm.linux.org.uk> wrote:
> On Thu, Mar 31, 2016 at 02:29:42PM +0200, Boris Brezillon wrote:
> > sg_alloc_table_from_buf() provides an easy solution to create an sg_table
> > from a vi
On Mon, 4 Apr 2016 13:44:11 +0530
Vignesh R <vigne...@ti.com> wrote:
> Hi,
>
> On 03/31/2016 05:59 PM, Boris Brezillon wrote:
> > Add an helper to check if a virtual address is in the highmem region.
> >
> > Signed-off-by: Boris Brezillon &l
're not directly impacted by those patches. Let me know if
you want me to drop/add people from/to the recipient list.
Thanks.
Best Regards,
Boris
[1]http://www.spinics.net/lists/arm-kernel/msg493552.html
Boris Brezillon (4):
mm: add is_highmem_addr() helper
scatterlist: add sg_alloc_table_from_
sg_alloc_table_from_buf() provides an easy solution to create an sg_table
from a virtual address pointer. This function takes care of dealing with
vmallocated buffers, buffer alignment, or DMA engine limitations (maximum
DMA transfer size).
Signed-off-by: Boris Brezillon <boris.brezil...@f
Add an helper to check if a virtual address is in the highmem region.
Signed-off-by: Boris Brezillon <boris.brezil...@free-electrons.com>
---
include/linux/highmem.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/include/linux/highmem.h b/include/linux/highmem.h
index b
Replace custom implementation of sg_alloc_table_from_buf() by a call to
sg_alloc_table_from_buf().
Signed-off-by: Boris Brezillon <boris.brezil...@free-electrons.com>
---
drivers/spi/spi.c | 45 +
1 file changed, 5 insertions(+), 40 deletions(-)
Some NAND controller drivers are making use of DMA to transfer data from
the controller to the buffer passed by the MTD user.
Provide a generic mtd_map/unmap_buf() implementation to avoid open coded
(and sometime erroneous) implementations.
Signed-off-by: Boris Brezillon <boris.brezil...@f
ment S;
> @@
>
> d =
> -dma_pool_alloc
> +dma_pool_zalloc
> (...);
> if (!d) S
> - memset(d, 0, sizeof(*d));
> //
>
> Signed-off-by: Julia Lawall <julia.law...@lip6.fr>
Acked-by: Boris Brezillon &
ngines[i]" by "engine" and in order to improve
> readability.
>
> Signed-off-by: Romain Perier <romain.per...@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
> ---
> drivers/crypto/marvell/cesa.c | 10 +-
>
d ("crypto: marvell - Add a complete operation for..")
> Signed-off-by: Romain Perier <romain.per...@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
> ---
> drivers/crypto/marvell/hash.c | 12 ++--
> 1 file changed, 6 insertion
of the request to the right location. This
> copy is already done in the _complete operation, so this commit removes
> the duplicated code in the _process op.
>
> Fixes: 3610d6cd5231 ("crypto: marvell - Add a complete...")
> Signed-off-by: Romain Perier <romain.per...@fre
of the function, so the
> cleanup function is called with the wrong version of the chain.
>
> Fixes: db509a45339f ("crypto: marvell/cesa - add TDMA support")
> Signed-off-by: Romain Perier <romain.per...@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezil..
a_chain we must check the value
> of the return status to be sure that the current request has been
> correctly queued or added to the backlog.
>
> Fixes: 85030c5168f1 ("crypto: marvell - Add support for chaining...")
> Signed-off-by: Romain Perier <romain.per...@fre
Hi Romain,
On Thu, 18 Aug 2016 14:12:13 +0200
Romain Perier wrote:
> So far, we used a dedicated dma pool to copy the result of outer IV for
> cipher requests. Instead of using a dma pool per outer data, we prefer
> use a common dma pool that contains the part
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