On 1/16/2013 7:48 AM, Vakul Garg wrote:
Removed unused variable for storing output string from:
(a) test_ahash_jiffies_digest()
(b) test_ahash_jiffies()
(c) test_ahash_cycles_digest()
(d) test_ahash_cycles()
This variable is not needed in above functions since th
On 1/10/2013 1:06 PM, Vakul Garg wrote:
The job ring init function creates a platform device for each job ring.
While the job ring is shutdown, e.g. while module removal, its platform
device was not being removed. This lead to failure while reinserting
caam module again. Same problem appears whil
On 1/9/2013 9:17 AM, Vakul Garg wrote:
Test vectors were taken from existing test for CBC(DES3_EDE).
Associated data has been added to test vectors.
HMAC computed with Crypto++ has been used.
Following algos have been covered.
(a) "authenc(hmac(sha1),cbc(des))"
(b) "authenc(hmac(
On 1/8/2013 6:49 AM, Vakul Garg wrote:
Test vectors were generated starting from existing CBC(AES) test vectors
(RFC3602, NIST SP800-38A) and adding HMAC(SHA384) computed with Crypto++ and
double-checked with HashCalc.
Signed-off-by: Vakul Garg
Acked-by: Horia Geanta
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To unsubscribe from
On 3/11/2013 9:15 AM, Steffen Klassert wrote:
Ccing Horia Geanta, he did the esn implementation for talitos.
On Fri, Mar 08, 2013 at 03:27:48PM +, Chaoxing Lin wrote:
1. Can any one point me which RFC describe how exactly authencesn should work?
The ESN algorithm is described in RFC 4303
On 3/12/2013 10:57 PM, Chaoxing Lin wrote:
Seems that somehow I got confused, considering the "one/single-pass over data"
description the same as "combined mode algorithm".
I will post a fix or revert the patch if HW does not allow the correct
behaviour.
Horia,
Do you plan to fix talitos d
On 3/20/2013 4:15 PM, Horia Geanta wrote:
This reverts commit 891104ed008e8646c7860fe5bc70b0aac55dcc6c
(upstream: 891104ed008e8646c7860fe5bc70b0aac55dcc6c).
This line is not needed.
Will resend this with commit message updated.
Sorry for the noise.
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On 3/20/2013 4:15 PM, Horia Geanta wrote:
This reverts commit e763eb699be723fb41af818118068c6b3afdaf8d
(upstream: 891104ed008e8646c7860fe5bc70b0aac55dcc6c).
This line is not needed.
Will resend this with commit message updated.
Sorry for the noise.
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To unsubscribe from this list: send the
On 4/15/2013 7:25 AM, Vakul Garg wrote:
The job ring init function creates a platform device for each job ring.
While the job ring is shutdown, e.g. while caam module removal, its
platform device was not being removed. This leads to failure while
reinsertion and then removal of caam module second
On 7/18/2013 6:57 PM, Cristian Stoica wrote:
This patch removes redundant execution of the same test suite in cases
where alg and driver variables are the same (e.g. when alg_test is
called from tcrypt_test)
Signed-off-by: Cristian Stoica
Reviewed-by: Horia Geanta
---
crypto/testmgr.c |
On 9/11/2013 9:02 AM, yashpal.du...@freescale.com wrote:
From: Yashpal Dutta
KMap the buffers before copying trailing bytes during hmac in CAAM driver into a
session temporary buffer. This is required if pinned buffer from user-space
is send to CAAM driver during hmac and is safe even if hmac r
On 9/11/2013 10:24 PM, Yashpal Dutta wrote:
KMap the buffers before copying trailing bytes during hmac into a session
temporary buffer. This is required if pinned buffer from user-space is send
during hmac and is safe even if hmac request is generated from within kernel.
Signed-off-by: Yashpal D
Hi,
CAAM crypto engine (drivers/crypto/caam/*) is capable of asymmetric
operations, like: modular exponentiation, RSA
sign/verify/encrypt/decrypt, (EC)DSA sign etc.
I would appreciate some design guidelines on how to harness these
capabilities, for crypto engines in general.
1. In-kernel int
On 9/23/2013 9:51 PM, Kim Phillips wrote:
On Sat, 21 Sep 2013 14:26:35 +0530
Yashpal Dutta wrote:
KMap the buffers before copying trailing bytes during hmac into a session
temporary buffer. This is required if pinned buffer from user-space is send
during hmac and is safe even if hmac request i
On 9/23/2013 4:28 PM, Nikos Mavrogiannopoulos wrote:
On 09/23/2013 02:31 PM, Horia Geantă wrote:
Hi,
CAAM crypto engine (drivers/crypto/caam/*) is capable of asymmetric
operations, like: modular exponentiation, RSA
sign/verify/encrypt/decrypt, (EC)DSA sign etc.
I would appreciate some design
On 9/21/2012 10:26 AM, Jussi Kivilinna wrote:
Currrently test_aead uses same buffer for destination and source. However
in any places, 'dst != src' take different path than 'dst == src' case.
Therefore make test_aead also run tests with destination buffer being
different than source buffer.
Sig
On 2/6/2014 10:27 AM, Alex Porosanu wrote:
SEC ERA has to be retrieved by reading the "fsl,sec-era" property
from the device tree. This property is updated/filled in by
u-boot.
Change-Id: Ie1620354a0cf2cac5cd2c72bd5f2449f55858378
Change-Id should be dropped.
Signed-off-by: Alex Porosanu
---
On 1/24/2014 11:03 AM, Nitesh Lal wrote:
The SEC Controller driver creates platform devices for it's child job ring
nodes.
Currently the driver uses for_each_compatible routine which traverses
the whole device tree to create the job rings for the platform device.
The patch changes this to search
On 3/17/2014 8:23 PM, Marek Vasut wrote:
On Friday, March 14, 2014 at 04:46:49 PM, Horia Geanta wrote:
Commit 61bb86bba169507a5f223b94b9176c32c84b4721
("crypto: caam - set descriptor sharing type to SERIAL")
changed the descriptor sharing mode from SHARE_WAIT to SHARE_SERIAL.
All descriptor com
On 3/17/2014 8:27 PM, Marek Vasut wrote:
On Friday, March 14, 2014 at 04:46:51 PM, Horia Geanta wrote:
Add test vectors for aead with null encryption and md5,
respectively sha1 authentication.
Input data is taken from test vectors listed in RFC2410.
Signed-off-by: Horia Geanta
[...]
--- a/
On 3/19/2014 9:01 PM, Marek Vasut wrote:
On Wednesday, March 19, 2014 at 06:25:48 PM, Horia Geantă wrote:
On 3/17/2014 8:23 PM, Marek Vasut wrote:
On Friday, March 14, 2014 at 04:46:49 PM, Horia Geanta wrote:
Commit 61bb86bba169507a5f223b94b9176c32c84b4721
("crypto: caam - set descr
On 3/22/2014 6:24 PM, Ben Hutchings wrote:
On Fri, 2014-03-21 at 00:35 +0545, Yashpal Dutta wrote:
Job ring is suspended gracefully and resume afresh.
Both Sleep (where device will remain powered-on) and Deep-sleep (where
device will be powered-down are handled gracefully. Persistance sessions
On 4/23/2014 2:56 AM, Marek Vasut wrote:
On Friday, April 18, 2014 at 12:01:42 PM, Horia Geanta wrote:
GFP_ATOMIC memory allocation could fail.
In this case, avoid NULL pointer dereference and notify user.
Cc: # 3.2+
If I recall correctly, you need to get the patch accepted into mainline bef
by allocating an ordinary skcipher
> as the fallback, and invoke it with the completion routine that was given
> to the outer request.
>
> Signed-off-by: Ard Biesheuvel
Reviewed-by: Horia Geantă
Thanks,
Horia
ating an ordinary skcipher
> as the fallback, and invoke it with the completion routine that was given
> to the outer request.
>
> Signed-off-by: Ard Biesheuvel
Reviewed-by: Horia Geantă
Thanks,
Horia
On 7/2/2020 7:36 AM, Herbert Xu wrote:
> The arc4 algorithm requires storing state in the request context
> in order to allow more than one encrypt/decrypt operation. As this
> driver does not seem to do that, it means that using it for more
> than one operation is broken.
>
The fact that smth. i
On 7/6/2020 4:43 PM, Ard Biesheuvel wrote:
> On Sun, 5 Jul 2020 at 22:11, Horia Geantă wrote:
>>
>> On 7/2/2020 7:36 AM, Herbert Xu wrote:
>>> The arc4 algorithm requires storing state in the request context
>>> in order to allow more than one encrypt/decrypt op
On 7/9/2020 3:47 AM, Herbert Xu wrote:
> On Wed, Jul 08, 2020 at 07:24:08PM +0300, Horia Geantă wrote:
>>
>> I think the commit message should be updated to reflect this logic:
>> indeed, caam's implementation of ecb(arc4) is broken,
>> but instead of fixing it,
On 7/1/2020 7:52 AM, Eric Biggers wrote:
> From: Mikulas Patocka
>
> Set the flag CRYPTO_ALG_ALLOCATES_MEMORY in the crypto drivers that
> allocate memory.
>
Quite a few drivers are impacted.
I wonder what's the proper way to address the memory allocation.
Herbert mentioned setting up reqsize:
On 7/13/2020 7:01 PM, Eric Biggers wrote:
> On Mon, Jul 13, 2020 at 06:49:00PM +0300, Horia Geantă wrote:
>> On 7/1/2020 7:52 AM, Eric Biggers wrote:
>>> From: Mikulas Patocka
>>>
>>> Set the flag CRYPTO_ALG_ALLOCATES_MEMORY in the crypto drivers that
>
On 7/14/2020 3:03 AM, Rob Herring wrote:
> On Sun, Jun 21, 2020 at 05:56:54PM +0300, Horia Geantă wrote:
>> RNGB block is found in some i.MX6 SoCs - 6SL, 6SLL, 6ULL, 6ULZ.
>> Add corresponding compatible strings.
>>
>> Note:
>>
>> Several NXP SoC from Q
Add node for the RNGB block.
Signed-off-by: Horia Geantă
---
arch/arm/boot/dts/imx6sll.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index fb5d3bc50c6b..0b622201a1f3 100644
--- a/arch/arm/boot/dts/imx6sll.dtsi
2
-update rngb DT binding with compatible strings for i.MX6 SoCs
Horia Geantă (5):
dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs
ARM: dts: imx6sl: fix rng node
ARM: dts: imx6sll: add rng
ARM: dts: imx6ull: add rng
hwrng: imx-rngc: enable driver for i.MX6
Documentation/devicetre
Add node for the RNGB block.
Signed-off-by: Horia Geantă
Reviewed-by: Marco Felsch
---
arch/arm/boot/dts/imx6ull.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index fcde7f77ae42..9bf67490ac49 100644
--- a/arch
) crypto accelerator and this block and RNGB
are independent.
Signed-off-by: Horia Geantă
---
Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/rng/imx-rng.txt
b/Documentation/devicetree/bindings/r
imx6sl SoC")
Signed-off-by: Horia Geantă
---
arch/arm/boot/dts/imx6sl.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 1c7180f28539..91a8c54d5e11 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/
i.MX6 SL, SLL, ULL, ULZ SoCs have an RNGB block.
Since imx-rngc driver supports also rngb,
let's enable it for these SoCs too.
Signed-off-by: Horia Geantă
Reviewed-by: Martin Kaiser
Reviewed-by: Marco Felsch
---
drivers/char/hw_random/Kconfig| 2 +-
drivers/char/hw_random/imx-rngc.
On 7/14/2020 3:48 PM, Arnd Bergmann wrote:
> On Tue, Jul 14, 2020 at 2:39 PM Horia Geantă wrote:
>> diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
>> index 8478eb757f3c..98f95a09ce55 100644
>> --- a/drivers/char/hw_random/Kconfig
>> +
Add node for the RNGB block.
Signed-off-by: Horia Geantă
Reviewed-by: Marco Felsch
---
arch/arm/boot/dts/imx6ull.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index fcde7f77ae42..9bf67490ac49 100644
--- a/arch
i.MX6 SL, SLL, ULL, ULZ SoCs have an RNGB block.
Since imx-rngc driver supports also rngb,
let's enable it for these SoCs too.
Signed-off-by: Horia Geantă
Reviewed-by: Martin Kaiser
Reviewed-by: Marco Felsch
---
drivers/char/hw_random/Kconfig | 2 +-
1 file changed, 1 insertion(
with "fsl,imx25-rngb"
-collected Reviewed-by
v2
-update rngb DT binding with compatible strings for i.MX6 SoCs
Horia Geantă (5):
dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs
ARM: dts: imx6sl: fix rng node
ARM: dts: imx6sll: add rng
ARM: dts: imx6ull: add rng
hwrng: imx
) crypto accelerator and this block and RNGB
are independent.
Signed-off-by: Horia Geantă
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/rng/imx-rng.txt
b/Documentation/devicet
imx6sl SoC")
Signed-off-by: Horia Geantă
---
arch/arm/boot/dts/imx6sl.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 1c7180f28539..91a8c54d5e11 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/
Add node for the RNGB block.
Signed-off-by: Horia Geantă
---
arch/arm/boot/dts/imx6sll.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index fb5d3bc50c6b..0b622201a1f3 100644
--- a/arch/arm/boot/dts/imx6sll.dtsi
https://lore.kernel.org/linux-crypto/20200702101947.682-1-a...@kernel.org
Acked-by: Horia Geantă
Horia
> - retrieve metadata: get tag object header configuration, black key
> configuration or tag object data.
>
> This API expects that the object (the actual data) from a tag object
> to be a buffer (defined by address and size).
>
> Signed-off-by: Franck LENORMAND
Signed-off-b
On 7/16/2020 10:36 AM, Herbert Xu wrote:
> On Mon, Jul 13, 2020 at 01:05:36AM +0300, Iuliana Prodan wrote:
>> Tagged keys are keys that contain metadata indicating what
>> they are and how to handle them using tag_object API.
>>
>> Add support, for tagged keys, to skcipher algorithms by
>> adding n
On 7/16/2020 2:53 PM, Herbert Xu wrote:
> On Thu, Jul 16, 2020 at 01:35:51PM +0300, Horia Geantă wrote:
>>
>> This patch set adds support only for some AES-based algorithms.
>> However, going further the plan is to add all keyed algorithms
>> supported by caam.
>>
On 7/16/2020 2:55 PM, Herbert Xu wrote:
> Eric Biggers wrote:
>> This series introduces a flag that algorithms can set to indicate that
>> they allocate memory during processing of typical inputs, and thus
>> shouldn't be used in cases like dm-crypt where memory allocation
>> failures aren't accep
On 7/16/2020 12:00 PM, Qinglang Miao wrote:
> From: Liu Shixin
>
> Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
>
> Signed-off-by: Liu Shixin
Reviewed-by: Horia Geantă
This patch depends on linux-next
commit 4d4901c6d748 ("seq_file: switch over direct seq_
Horia Geantă (5):
crypto: caam/qi2 - fix error reporting for caam_hash_alloc
crypto: caam/qi2 - create ahash shared descriptors only once
crypto: caam - silence .setkey in case of bad key length
crypto: caam - add more RNG hw error codes
crypto: caam/qi2 - add module alias
drivers/crypto
Fix error reporting when preparation of an hmac algorithm
for registration fails: print the hmac algorithm name, not the unkeyed
hash algorithm name.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg_qi2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers
am/jr top-level library)
commit 9a2537d0ebc9 ("crypto: caam - create ahash shared descriptors only once")
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg_qi2.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/caam/caamalg_qi2.c
b/driv
From: Franck LENORMAND
When building on a platform with a 32bit DMA address, taking the
upper 32 bits makes no sense.
Signed-off-by: Franck LENORMAND
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/regs.h | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a
Add a module alias, to enable udev-based module autoloading:
$ modinfo -F alias drivers/crypto/caam/dpaa2_caam.ko
fsl-mc:v1957ddpseci
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg_qi2.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/crypto/caam/caamalg_qi2.c
b
In some cases, e.g. when TRNG is not properly configured,
the RNG module could issue a "Hardware error" at runtime.
"Continuos check" error is emitted when some of the BISTs fail.
Signed-off-by: Horia Geantă
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/error.c | 3
From: Dan Douglass
caam_jr_register() function is no longer part of the driver since
commit 6dad41158db6 ("crypto: caam - Remove unused functions from Job Ring")
This patch removes a comment referencing the function.
Signed-off-by: Dan Douglass
Signed-off-by: Horia Geantă
---
driv
In case of bad key length, driver emits "key size mismatch" messages,
but only for xts(aes) algorithms.
Reduce verbosity by making them visible only when debugging.
This way crypto fuzz testing log cleans up a bit.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/caamalg
On 7/22/2020 3:15 PM, Horia Geantă wrote:
> In some cases, e.g. when TRNG is not properly configured,
> the RNG module could issue a "Hardware error" at runtime.
>
> "Continuos check" error is emitted when some of the BISTs fail.
>
> Signed-off-by: Horia
enabled).
Also see commit ec2a844ef7c1
("ARM: dts: imx7s: add snvs rtc clock")
for a similar fix.
Signed-off-by: André Draszik
Acked-by: Rob Herring
Reviewed-by: Horia Geantă
Signed-off-by: Horia Geantă
---
.../devicetree/bindings/crypto/fsl-sec4.txt | 17 +
ystem will
assume the interrupt was handled successfully even though it wasn't
at all.
Signed-off-by: André Draszik
Reviewed-by: Horia Geantă
Signed-off-by: Horia Geantă
---
drivers/input/keyboard/snvs_pwrkey.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git
Hi Herbert, Dmitry,
This is a resend of v2 patches 1,5,6 that were not picked up
https://lore.kernel.org/linux-input/20200225161201.1975-1-...@andred.net
with collecting Acked-by, Reviewed-by.
I skipped Robin's Reviewed-by since I prefer avoiding misintepreting
the discussion between him and Andr
er.
Signed-off-by: André Draszik
Reviewed-by: Horia Geantă
Signed-off-by: Horia Geantă
---
drivers/input/keyboard/snvs_pwrkey.c | 28 +++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/input/keyboard/snvs_pwrkey.c
b/drivers/input/keyboard/snvs_pw
caam crypto module is included in several ARMv7-based SoCs from
i.MX, Layerscape, Vybrid families.
Signed-off-by: Horia Geantă
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
On 7/30/2020 4:54 PM, Herbert Xu wrote:
> Currently the debugfs fops are defined in caam/intern.h. This causes
> problems because it creates identical static functions and variables
> in multiple files. It also creates warnings when those files don't
> use the fops.
>
Indeed, I see the warnings
On 8/1/2020 3:42 PM, Herbert Xu wrote:
> On Fri, Jul 31, 2020 at 07:46:07PM +0300, Horia Geantă wrote:
>>
>> Below hunk is needed for fixing the compilation when CONFIG_DEBUG_FS=y:
>
> Thanks for catching this. The NULL pointer assignments are also
> a bit iffy. So he
On 8/10/2020 4:45 PM, Herbert Xu wrote:
> On Mon, Aug 10, 2020 at 10:20:20AM +, Van Leeuwen, Pascal wrote:
>>
>> With all due respect, but this makes no sense.
>
> I agree. This is a lot of churn for no gain.
>
I would say the gain is that all skcipher algorithms would behave the same
when i
On 7/28/2020 10:19 AM, Herbert Xu wrote:
> @@ -40,30 +39,41 @@ static int chacha_stream_xor(struct skcipher_request *req,
> static int crypto_chacha_crypt(struct skcipher_request *req)
> {
> struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
> + struct chacha_reqctx *rctx = skci
ed-off-by: Herbert Xu
Reviewed-by: Horia Geantă
Thanks,
Horia
On 7/28/2020 10:19 AM, Herbert Xu wrote:
> The rfc3686 implementations in caam are pretty much the same
> as the generic rfc3686 wrapper. So they can simply be removed
> to reduce complexity.
>
I would prefer keeping the caam rfc3686(ctr(aes)) implementation.
It's almost cost-free when compared t
On 8/11/2020 3:59 AM, Herbert Xu wrote:
> On Mon, Aug 10, 2020 at 07:47:40PM +0300, Horia Geantă wrote:
>>
>> I would prefer keeping the caam rfc3686(ctr(aes)) implementation.
>> It's almost cost-free when compared to ctr(aes), since:
>> -there are no (acce
On 8/6/2020 7:36 PM, Andrei Botila (OSS) wrote:
> @@ -3344,12 +3382,30 @@ static int caam_cra_init(struct crypto_skcipher *tfm)
> struct caam_skcipher_alg *caam_alg =
> container_of(alg, typeof(*caam_alg), skcipher);
> struct caam_ctx *ctx = crypto_skcipher_ctx(tfm);
> +
On 8/6/2020 7:36 PM, Andrei Botila (OSS) wrote:
> @@ -1790,7 +1792,9 @@ static inline int skcipher_crypt(struct
> skcipher_request *req, bool encrypt)
> if (!req->cryptlen)
> return 0;
>
> - if (ctx->fallback && xts_skcipher_ivsize(req)) {
> + if (ctx->fallback && (xt
On 8/10/2020 8:03 PM, Eric Biggers wrote:
> On Mon, Aug 10, 2020 at 05:33:39PM +0300, Horia Geantă wrote:
>> On 8/10/2020 4:45 PM, Herbert Xu wrote:
>>> On Mon, Aug 10, 2020 at 10:20:20AM +, Van Leeuwen, Pascal wrote:
>>>>
>>>> With all due respect
On 8/21/2020 6:47 AM, Herbert Xu wrote:
> On Tue, Aug 11, 2020 at 05:30:41PM +0300, Horia Geantă wrote:
>>
>>> + if (IS_ERR(fallback)) {
>>> + pr_err("Failed to allocate %s fallback: %ld\n",
>>> +
On 8/21/2020 6:47 AM, Herbert Xu wrote:
> On Thu, Aug 06, 2020 at 07:35:43PM +0300, Andrei Botila wrote:
>>
>> +static bool xts_skcipher_ivsize(struct skcipher_request *req)
>> +{
>> +struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req);
>> +unsigned int ivsize = crypto_skcipher_i
On 9/9/2020 1:10 AM, Herbert Xu wrote:
> On Tue, Sep 08, 2020 at 01:35:04PM +0300, Horia Geantă wrote:
>>
>>> Just go with the get_unaligned unconditionally.
>>
>> Won't this lead to sub-optimal code for ARMv7
>> in case the IV is aligned?
>
> If thi
On 9/14/2020 7:28 PM, Ard Biesheuvel wrote:
> On Mon, 14 Sep 2020 at 19:24, Horia Geantă wrote:
>>
>> On 9/9/2020 1:10 AM, Herbert Xu wrote:
>>> On Tue, Sep 08, 2020 at 01:35:04PM +0300, Horia Geantă wrote:
>>>>
>>>>> Just go with the get_unal
On 9/14/2020 9:20 PM, Ard Biesheuvel wrote:
> On Mon, 14 Sep 2020 at 20:12, Horia Geantă wrote:
>>
>> On 9/14/2020 7:28 PM, Ard Biesheuvel wrote:
>>> On Mon, 14 Sep 2020 at 19:24, Horia Geantă wrote:
>>>>
>>>> On 9/9/2020 1:10 AM, Herbert Xu wrote
On 9/15/2020 1:26 PM, Ard Biesheuvel wrote:
> On Tue, 15 Sep 2020 at 13:02, Horia Geantă wrote:
>>
>> On 9/14/2020 9:20 PM, Ard Biesheuvel wrote:
>>> On Mon, 14 Sep 2020 at 20:12, Horia Geantă wrote:
>>>>
>>>> On 9/14/2020 7:28 PM, Ard Biesheuvel
On 9/14/2020 9:38 AM, Richard Weinberger wrote:
> On Thu, Jul 16, 2020 at 4:12 PM Richard Weinberger
> wrote:
>>
>> On Mon, Jul 13, 2020 at 12:09 AM Iuliana Prodan
>> wrote:
>>>
>>> Tagged keys are keys that contain metadata indicating what
>>> they are and how to handle them using tag_object AP
On 9/18/2020 4:30 AM, Qinglang Miao wrote:
> Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
>
> Signed-off-by: Qinglang Miao
Reviewed-by: Horia Geantă
Thanks,
Horia
On 9/16/2020 12:50 AM, Richard Weinberger wrote:
> - Ursprüngliche Mail -
>> Von: "horia geanta"
How to use it with cryptsetup?
I'm asking because it is not clear to me why you are not implementing
a new kernel key type (KEYS subsystem)
to utilize tagged keys.
Many
On 9/21/2020 10:32 AM, Andrei Botila (OSS) wrote:
> +static bool xts_skcipher_ivsize(struct skcipher_request *req)
> +{
> + struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req);
> + unsigned int ivsize = crypto_skcipher_ivsize(skcipher);
> + u64 size = 0;
> +
> + size = ge
On 9/21/2020 10:32 AM, Andrei Botila (OSS) wrote:
> From: Andrei Botila
>
> This patch series fixes some problems in CAAM's implementation of xts(aes):
> - CAAM until Era 9 can't process XTS with 16B IV
> - CAAM can only process in hardware XTS key lengths of 16B and 32B
> - These hardware lim
c.c | 27 ---
> drivers/crypto/caam/caamalg_qi.c | 94 +---
> drivers/crypto/caam/caamalg_qi2.c | 111 ++---
> drivers/crypto/caam/caamalg_qi2.h | 2 +
> 6 files changed, 293 insertions(+), 38 deletions(-)
>
For the series:
Reviewed-by: Horia Geantă
Thanks,
Horia
On 10/21/2020 11:07 PM, Iuliana Prodan wrote:
> Use the new crypto_engine_alloc_init_and_set() function to
> initialize crypto-engine and enable retry mechanism.
>
> Set the maximum size for crypto-engine software queue based on
> Job Ring size (JOBR_DEPTH) and a threshold (reserved for the
> non-
On 10/26/2020 7:11 PM, Iuliana Prodan wrote:
> On 10/26/2020 5:36 PM, Horia Geantă wrote:
>> On 10/21/2020 11:07 PM, Iuliana Prodan wrote:
[...]
>>> +#define CRYPTO_ENGINE_MAX_QLEN (2 * (JOBR_DEPTH - THRESHOLD))
>>> +
>> What's the logic behind multiplying by
d for the
> non-crypto-API requests that are not passed through crypto-engine).
>
> The callback for do_batch_requests is NULL, since CAAM
> doesn't support linked requests.
>
> Signed-off-by: Iuliana Prodan
Reviewed-by: Horia Geantă
Thanks,
Horia
On 10/28/2020 11:07 AM, Ard Biesheuvel wrote:
> On Wed, 28 Oct 2020 at 10:03, Horia Geantă wrote:
>>
>> Loading the module deadlocks since:
>> -local cbc(aes) implementation needs a fallback and
>> -crypto API tries to find one but the request_module() resolves
algorithm.
Fixes: 00b99ad2bac2 ("crypto: arm/aes-neonbs - Use generic cbc encryption path")
Signed-off-by: Horia Geantă
---
arch/arm/crypto/aes-neonbs-glue.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/crypto/aes-neonbs-glue.c
b/arch/arm/crypto/
quot;crypto: caam/jr - add fallback for XTS with more than 8B
IV")
Fixes: 83e8aa912138 ("crypto: caam/qi - add fallback for XTS with more than 8B
IV")
Fixes: 36e2d7cfdcf1 ("crypto: caam/qi2 - add fallback for XTS with more than 8B
IV")
Signed-off-by: Horia Geant
happens now) but could be changed if it is wrong
> due to `budget' handling.
>
Looks good to me.
> Add an argument to __poll_portal_fast() which is true if NAPI needs to be
> scheduled. This requires propagating the value to the caller including
> `qman_cb_dqrr' typedef whi
hould be scheduled.
>
> Signed-off-by: Sebastian Andrzej Siewior
> Cc: "Horia Geantă"
> Cc: Aymen Sghaier
> Cc: Herbert Xu
> Cc: "David S. Miller"
> Cc: Madalin Bucur
> Cc: Jakub Kicinski
> Cc: Li Yang
> Cc: linux-crypto@vger.kernel.org
- >8 --
Subject: [PATCH] crypto: caam/qi - simplify error path for context allocation
Wang Qing reports that IS_ERR_OR_NULL() should be matched with
PTR_ERR_OR_ZERO(), not PTR_ERR().
As it turns out, the error path always returns an error code,
i.e. NULL is never returned.
Update the code accord
dingly,
and so will CAAM driver and DT node.
I don't have a board at hand, so patch below is not tested.
Horia
-- >8 --
Subject: [PATCH] clk: imx: vf610: add CAAM clock
According to Vybrid Security RM, CCM_CCGR11[CG176] can be used to
gate CAAM ipg clock.
Signed-off-by: Hori
ore, these errors might be fatal error, so we shouldn’t
> requeue the request. This will just be pass back and forth between
> crypto-engine and hardware.
>
> Fixes: 6a89f492f8e5 ("crypto: engine - support for parallel requests based on
> retry mechanism")
> Signed-of
On 5/28/2020 2:05 PM, Andrei Botila (OSS) wrote:
> @@ -4698,6 +4698,9 @@ static void dpaa2_dpseci_free(struct dpaa2_caam_priv
> *priv)
> struct device *dev = priv->dev;
> struct fsl_mc_device *ls_dev = to_fsl_mc_device(dev);
>
> + if (DPSECI_VER(priv->major_ver, priv->minor_ver)
On 6/2/2020 2:07 AM, Andrey Smirnov wrote:
> Add a small bit of plumbing necessary to use CAAM on VFxxx SoCs.
>
> Signed-off-by: Andrey Smirnov
> Cc: Chris Healy
> Cc: Horia Geantă
> Cc: Herbert Xu
> Cc: Fabio Estevam
> Cc: linux-...@nxp.com
> Cc: linux-crypto@vger
On 6/3/2020 11:47 AM, Andrei Botila (OSS) wrote:
> From: Andrei Botila
>
> Add support for dpseci_reset() command for DPSECI objects.
> For DPSECI DPAA2 objects with version lower than v5.4 reset command
> was broken in MC f/w.
>
> Signed-off-by: Andrei Botila
Revi
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