On 13/03/2024 13:53, Luca Weiss wrote:
> Document the compatible used for the inline crypto engine found on
> SC7280.
>
> Signed-off-by: Luca Weiss
> ---
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 05/01/2024 17:15, Luca Weiss wrote:
> Add a compatible for the crypto block found on the SM6350 SoC.
>
> Signed-off-by: Luca Weiss
> ---
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
For code readability, the probe() function uses 'dev' variable instead
of '&pdev->dev', so update remaining places.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto
The initialization of 'err' local variable is not needed as it is
shortly after overwritten.
Addresses-Coverity: Unused value
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/s5p-sss.c
Use of_device_get_match_data() to make the code slightly smaller.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
index 8ed08130196f..d613bd557016
On Fri, 9 Apr 2021 at 08:11, Ye Weihua wrote:
>
> pm_runtime_get_sync will increment pm usage counter even it failed.
> Forgetting to putting operation will result in reference leak here.
> Fix it by replacing it with pm_runtime_resume_and_get to keep usage
> counter balanced.
>
> Reported-by: Hul
On Mon, 1 Mar 2021 at 07:36, Herbert Xu wrote:
>
> On Sat, Feb 27, 2021 at 05:37:49PM +0100, Krzysztof Kozlowski wrote:
> >
> > I think this patch was lost, although you replied that the entire set
> > is applied.
> >
> > Can you pick it up?
>
> I think i
On Fri, 4 Sept 2020 at 10:28, Herbert Xu wrote:
>
> On Wed, Aug 26, 2020 at 06:29:52PM +0200, Krzysztof Kozlowski wrote:
> > Pointers should not be printed because they might leak important
> > information about address space layout. Use %p to hash the value. This
> >
names for lookup of these clocks
from devicetree, so effectively the "pclk" was enabled first.
Although it might not matter in reality, the correct order is to enable
first main/high speed bus clock - "aclk". Also this was the intention
of the actual code.
Signed-off-by: Krzys
.
Signed-off-by: Krzysztof Kozlowski
---
.mailmap | 1 -
Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml | 1 -
Documentation/devicetree/bindings/crypto/samsung-sss.yaml | 1 -
MAINTAINERS
explicitly.
Wrap your commit msg lines as described in submitting patches.
With the commit msg fixup:
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On Mon, Dec 07, 2020 at 02:29:12PM +0530, Allen Pais wrote:
> From: Allen Pais
>
> Commit 12cc923f1ccc ("tasklet: Introduce new initialization API")'
> introduced a new tasklet initialization API. This series converts
> all the crypto modules to use the new tasklet_setup() API
Please use the scr
On Fri, Nov 27, 2020 at 05:44:46PM +0800, Qinglang Miao wrote:
> pm_runtime_get_sync will increment pm usage counter even it
> failed. Forgetting to putting operation will result in a
> reference leak here.
>
> A new function pm_runtime_resume_and_get is introduced in
> [0] to keep usage counter b
eter 'kid_2' description in 'asymmetric_key_id_same'
Signed-off-by: Krzysztof Kozlowski
Acked-by: Randy Dunlap
---
crypto/asymmetric_keys/asymmetric_type.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/crypto/asymmetric_keys/asymmetric_type.c
b/
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Iuliana Prodan
---
Changes since v1:
1. Add Reviewed-by
---
drivers/crypto/caam/caamalg_qi2.c | 3 +--
1 file changed
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.
Signed-off-by: Krzysztof Kozlowski
---
Changes since v1:
1. None
---
drivers/crypto/stm32/stm32-hash.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions
/ctrl.c:449: warning: Function parameter or member 'ctrl'
not described in 'caam_get_era'
Signed-off-by: Krzysztof Kozlowski
---
Changes since v1:
1. Fix more warnings
---
drivers/crypto/caam/caamalg_desc.c | 1 +
drivers/crypto/caam/caamalg_qi2.c | 4 ++--
drivers/crypto/caam/
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.
Signed-off-by: Krzysztof Kozlowski
---
Changes since v1:
1. None
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 9 +++--
drivers/crypto/allwinner/sun8i
On Fri, 4 Sep 2020 at 11:07, Kamil Konieczny wrote:
>
>
>
> On 9/3/20 8:03 PM, Krzysztof Kozlowski wrote:
> > Correct a typo in the compatible - missing trailing 's'.
> >
> > Signed-off-by: Krzysztof Kozlowski
> > ---
> > Documentation
Correct a typo in the compatible - missing trailing 's'.
Signed-off-by: Krzysztof Kozlowski
---
Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/crypto/samsung-slims
x27;
drivers/crypto/s5p-sss.c:1143: warning: Excess function parameter 'nbytes'
description in 's5p_hash_prepare_sgs'
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/s
Pass the error directly from devm_clk_get() to describe the real reason,
instead of fixed ENOENT. Do not print error messages on deferred probe.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a
On Thu, 3 Sep 2020 at 14:08, Iuliana Prodan wrote:
>
> On 9/2/2020 6:05 PM, Krzysztof Kozlowski wrote:
> > Fix kerneldoc warnings:
> >
> >drivers/crypto/caam/caamalg_qi2.c:73: warning: cannot understand
> > function prototype: 'struct caam_ctx '
>
changed, 2 insertions(+), 4 deletions(-)
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
Fix kerneldoc warnings:
drivers/crypto/caam/caamalg_qi2.c:73: warning: cannot understand function
prototype: 'struct caam_ctx '
drivers/crypto/caam/caamalg_qi2.c:2962: warning: cannot understand function
prototype: 'struct caam_hash_ctx '
Signed-off-by: Krzysztof Koz
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/caam/caamalg_qi2.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/crypto/caam
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/stm32/stm32-hash.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/crypto
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 9 +++--
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 9
On Wed, Aug 19, 2020 at 07:52:12PM +0200, Krzysztof Kozlowski wrote:
> Fix W=1 compile warnings (invalid kerneldoc):
>
> crypto/asymmetric_keys/asymmetric_type.c:160: warning: Function parameter
> or member 'kid1' not described in 'asymmetric_key_id_same&#x
-to-int-cast]
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/sa2ul.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/sa2ul.c b/drivers/crypto/sa2ul.c
index 5bc099052bd2..4a950437bf44 100644
--- a/drivers/crypto/sa2ul.c
+++ b/drivers/crypto/sa2ul.c
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and also it prints the error value.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/ccree/cc_driver.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and also it prints the error value.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/sa2ul.c | 18 +++---
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/crypto
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and also it prints the error value.
Signed-off-by: Krzysztof Kozlowski
---
drivers/char/hw_random/cctrng.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/char
eter 'kid_2' description in 'asymmetric_key_id_same'
Signed-off-by: Krzysztof Kozlowski
---
crypto/asymmetric_keys/asymmetric_type.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/crypto/asymmetric_keys/asymmetric_type.c
b/crypto/asymme
eter 'kid_2' description in 'asymmetric_key_id_same'
Signed-off-by: Krzysztof Kozlowski
---
crypto/asymmetric_keys/asymmetric_type.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/crypto/asymmetric_keys/asymmetric_type.c
b/crypto/asymme
(no need for end stop)
With these changes:
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On Wed, 20 May 2020 at 13:53, Stephan Mueller wrote:
> > > That said, the illustrated example is typical for hardware RNGs. Yet
> > > it is never guaranteed to work that way. Thus, if you can point to
> > > architecture documentation of your specific hardware RNGs showing that
> > > the data read
does this for us.
>
> Cc: Krzysztof Kozlowski
> Cc: Vladimir Zapolskiy
> Cc: Kamil Konieczny
> Signed-off-by: Eric Biggers
> ---
> drivers/crypto/s5p-sss.c | 39 ++-
> 1 file changed, 6 insertions(+), 33 deletions(-)
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
finally drop the
> blkcipher code in the near future.
>
> Cc: Krzysztof Kozlowski
> Cc: Vladimir Zapolskiy
> Cc: Kamil Konieczny
> Cc: linux-samsung-...@vger.kernel.org
> Signed-off-by: Ard Biesheuvel
> ---
> drivers/crypto/s5p-sss.c | 191 ++--
&g
Convert Samsung Exynos Pseudo Random Number Generator bindings to DT
schema format using json-schema.
Signed-off-by: Krzysztof Kozlowski
---
Changes since v2:
1. Add additionalProperties false,
2. Include clock header and use defines instead of clock numbers.
Changes since v1:
1. Indent
Convert Samsung Exynos Security SubSystem (SSS) and SlimSSS hardware
crypto accelerator bindings to DT schema format using json-schema.
Signed-off-by: Krzysztof Kozlowski
---
Rebased on linux-next due to conflicting change in MAINTAINERS file
coming through arm-soc tree.
Changes since v1:
1
Convert Samsung Exynos Pseudo Random Number Generator bindings to DT
schema format using json-schema.
Signed-off-by: Krzysztof Kozlowski
---
.../bindings/rng/samsung,exynos4-rng.txt | 19 -
.../bindings/rng/samsung,exynos4-rng.yaml | 41 +++
MAINTAINERS
Convert Samsung Exynos Security SubSystem (SSS) and SlimSSS hardware
crypto accelerator bindings to DT schema format using json-schema.
Signed-off-by: Krzysztof Kozlowski
---
Rebased on linux-next due to conflicting change in MAINTAINERS file
coming through arm-soc tree.
---
.../bindings
On Wed, 21 Aug 2019 at 08:42, boojin.kim wrote:
>
> Diskcipher supports cryptographic operations of inline crypto engines like
> FMP. Inline crypto engine refers to hardware and solutions implemented
> to encrypt data stored in storage device.
>
> When encrypting using the FMP, Additional control
On Tue, 20 Aug 2019 at 13:39, Kamil Konieczny
wrote:
>
>
>
> On 20.08.2019 12:24, Krzysztof Kozlowski wrote:
> > On Mon, 19 Aug 2019 at 16:24, Ard Biesheuvel
> > wrote:
> >>
> >> Align the s5p ctr(aes) implementation with other implementations
> >
On Tue, 20 Aug 2019 at 12:57, Ard Biesheuvel wrote:
>
> On Tue, 20 Aug 2019 at 13:24, Krzysztof Kozlowski wrote:
> >
> > On Mon, 19 Aug 2019 at 16:24, Ard Biesheuvel
> > wrote:
> > >
> > > Align the s5p ctr(aes) implementation with other implementati
On Mon, 19 Aug 2019 at 16:24, Ard Biesheuvel wrote:
>
> Align the s5p ctr(aes) implementation with other implementations
> of the same mode, by setting the block size to 1.
>
> Signed-off-by: Ard Biesheuvel
> ---
> drivers/crypto/s5p-sss.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
1 file changed, 4 insertions(+), 1 deletion(-)
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
bindings.
Cc: Kukjin Kim
Cc: Vladimir Zapolskiy
Cc: Kamil Konieczny
Cc: Sylwester Nawrocki
Cc: Tomasz Figa
Cc: Chanwoo Choi
Signed-off-by: Krzysztof Kozlowski
---
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-samsung-...@vger.kernel.org
Cc: linux-crypto@vger.kernel.org
Cc: linux
changed, 1 insertion(+), 3 deletions(-)
>
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On Fri, 12 Jul 2019 at 04:20, Alex Shi wrote:
>
> Since we move 'arm/arm64' docs to Documentation/arch/{arm,arm64} dir,
> redirect the doc pointer to them.
>
> Signed-off-by: Alex Shi
> Cc: Jonathan Corbet
> Cc: Kukjin Kim
> Cc: Krzysztof Kozlowski
> Cc:
On Thu, 7 Mar 2019 at 08:13, kernelci.org bot wrote:
>
> * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
> * This automated bisection report was sent to you on the basis *
> * that you may be involved with the breaking commit it has *
> * found. No manual investigation has
On Tue, 5 Mar 2019 at 18:13, Guenter Roeck wrote:
>
> On Fri, Feb 22, 2019 at 01:21:44PM +0100, Kamil Konieczny wrote:
> > Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
> >
> > Reviewed-by: Krzysztof Kozlowski
> > Signed-off-by: Kamil K
ze to 2.
>
> Fixes: 0918f18c7179 ("crypto: s5p - add AES support for Exynos5433")
> Reported-by: Krzysztof Kozlowski
> Signed-off-by: Kamil Konieczny
> ---
> drivers/crypto/s5p-sss.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Thanks for fast fix!
Reviewed-b
On Fri, 1 Mar 2019 at 11:07, Ard Biesheuvel wrote:
>
> On Fri, 1 Mar 2019 at 10:56, Krzysztof Kozlowski wrote:
> >
> > On Fri, 22 Feb 2019 at 13:22, Kamil Konieczny
> > wrote:
> > >
> > > Add AES crypto HW acceleration for Exynos5433, with the help of
On Fri, 22 Feb 2019 at 13:22, Kamil Konieczny
wrote:
>
> Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
>
> Reviewed-by: Krzysztof Kozlowski
> Signed-off-by: Kamil Konieczny
> ---
> drivers/crypto/s5p-sss.c | 50 +
amil Konieczny
> Reported-by: Eric Biggers
> ---
> Changes since v1:
> - reworded Subject and commit message
> - changed code according to comments by Krzysztof Kozlowski
> - added Reported-by line
> ---
> drivers/crypto/s5p-sss.c | 8 ++++
> 1 file changed, 8 insertions(+)
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On Mon, 18 Feb 2019 at 17:01, Kamil Konieczny
wrote:
>
> Fix bug "s5p-sss crypto driver doesn't set next AES-CBC IV". This should
> also fix AES-CTR mode. Tested on Odroid U3 with Eric Biggers branch
> "iv-out-testing".
>
> Signed-off-by: Kamil Konieczny
> ---
> drivers/crypto/s5p-sss.c | 8
Replace hard coded AES block size with define.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
index 0064be0e3941..39fc6942364b 100644
--- a/drivers
On Fri, 15 Feb 2019 at 19:51, Eric Biggers wrote:
>
> Hello,
>
> The AES-CBC implementation in the s5p-sss crypto driver is failing the
> improved
> crypto self-tests I currently have out for review. The improved tests check
> that all CBC implementations update the IV buffer to be the last ciph
On Thu, 24 Jan 2019 at 15:34, Kamil Konieczny
wrote:
>
>
>
> On 24.01.2019 14:37, Corentin Labbe wrote:
> > On Wed, Jan 23, 2019 at 05:55:33PM +0100, Kamil Konieczny wrote:
> >> Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
> >>
> >> Signed-off-by: Kamil Konieczny
>
tions(+), 4 deletions(-)
>
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
e changed, 11 insertions(+), 3 deletions(-)
>
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On Tue, 22 Jan 2019 at 16:26, Kamil Konieczny
wrote:
>
> Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
>
> Signed-off-by: Kamil Konieczny
> ---
> drivers/crypto/s5p-sss.c | 50
> 1 file changed, 46 insertions(+), 4 deletions(
On Tue, 22 Jan 2019 at 16:26, Kamil Konieczny
wrote:
>
> Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
> SubSystem) IP.
>
> Signed-off-by: Kamil Konieczny
> ---
> .../devicetree/bindings/crypto/samsung-sss.txt | 13 ++---
> 1 file changed, 10 insertions(+
Signed-off-by: Christoph Manszewski
> ---
> drivers/crypto/s5p-sss.c | 12 +++-
> 1 file changed, 7 insertions(+), 5 deletions(-)
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
-
> 1 file changed, 40 insertions(+), 5 deletions(-)
>
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
tionale for this, e.g.: "for consistency in the driver
and making code shorter".
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
So how about:
"Fix misalignment of continued argument list."?
With commit and subject improvements:
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
>
> Signed-off-by: Christoph Manszewski
> ---
> drivers/crypto/s5p-sss.c | 4 ++--
> 1 file changed, 2 inserti
On Thu, 13 Sep 2018 at 09:59, Christoph Manszewski
wrote:
>
> Remove a race condition introduced by error path in functions:
> s5p_aes_interrupt and s5p_aes_crypt_start. Setting the busy field of
> struct s5p_aes_dev to false made it possible for s5p_tasklet_cb to
> change the req field, before s5
On Fri, 31 Aug 2018 at 09:39, Sascha Hauer wrote:
>
> Hi Krzysztof,
>
> Some comments inline.
>
> On Thu, Aug 30, 2018 at 07:15:39PM +0200, Krzysztof Kozlowski wrote:
> > Add driver for using the Freescale/NXP Vybrid processor CRC block for
> > CRC16 and CRC32 offl
Add the clock for CRC block allowing it to be enabled by HW CRC driver.
Signed-off-by: Krzysztof Kozlowski
---
drivers/clk/imx/clk-vf610.c | 1 +
include/dt-bindings/clock/vf610-clock.h | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-vf610
Add node for HW CRC16/CRC32 accelerator present on VF500 and VF610 SoCs.
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/boot/dts/vfxxx.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index d392794d9c13..d6d0eca02939
Add driver for using the Freescale/NXP Vybrid processor CRC block for
CRC16 and CRC32 offloading. The driver implements shash_alg and was
tested using internal testmgr tests and libkcapi.
Signed-off-by: Krzysztof Kozlowski
---
MAINTAINERS | 7 +
drivers/crypto/Kconfig| 10
Add bindings for Freescale/NXP Vybrid CRC HW accelerator.
Signed-off-by: Krzysztof Kozlowski
---
.../devicetree/bindings/crypto/fsl-vf610-crc.txt | 16
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/fsl-vf610-crc.txt
diff
Add test tables for CRC16. Use similar input data as for existing CRC32
test vectors.
Signed-off-by: Krzysztof Kozlowski
---
crypto/testmgr.c | 6 +
crypto/testmgr.h | 386 +++
2 files changed, 392 insertions(+)
diff --git a/crypto
Group Freescale/NXP Kconfig entires for ARM architecture CPUs/SoCs
together to make it more consistent and easy to read.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/Kconfig | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers
mainline).
Best regards,
Krzysztof
Krzysztof Kozlowski (6):
dt-bindings: crypto: Add Freescale Vybrid CRC
clk: imx: vf610: Add CRC clock
ARM: dts: vfxxx: Add node for CRC hardware block
crypto: testmgr - Add CRC16 test tables
crypto - Group Freescale/NXP ARM architecture Kconfig entires
On Thu, 30 Aug 2018 at 15:39, Herbert Xu wrote:
>
> On Thu, Aug 30, 2018 at 02:22:22PM +0200, Krzysztof Kozlowski wrote:
> > Hi,
> >
> > I am trying to figure out necessary locking on the driver side of
> > crypto HW accelerator for symmetric hash (actually: CRC).
On Thu, 30 Aug 2018 at 15:27, Kamil Konieczny
wrote:
>
> On 30.08.2018 15:09, Krzysztof Kozlowski wrote:
> > [...]
> > Thanks Stephan for hints. Let's assume the each of init, update and
> > final are atomic... but how about the relation between update and
> >
On Thu, 30 Aug 2018 at 15:19, Stephan Mueller wrote:
>
> Am Donnerstag, 30. August 2018, 15:09:05 CEST schrieb Krzysztof Kozlowski:
>
> Hi Krzysztof,
>
> > Thanks Stephan for hints. Let's assume the each of init, update and
> > final are atomic... but how about
On Thu, 30 Aug 2018 at 14:59, Stephan Mueller wrote:
>
> Am Donnerstag, 30. August 2018, 14:22:22 CEST schrieb Krzysztof Kozlowski:
>
> Hi Krzysztof,
>
> > Hi,
> >
> > I am trying to figure out necessary locking on the driver side of
> > crypto HW accelerato
Hi,
I am trying to figure out necessary locking on the driver side of
crypto HW accelerator for symmetric hash (actually: CRC). I
implemented quite simple driver for shash_alg.
I looked at the docs, I looked at the crypto kcapi core code... and
there is nothing about necessary locking. kcapi does
On 18 July 2018 at 02:12, Eric Biggers wrote:
> Hi Krzysztof,
>
> On Tue, Jul 17, 2018 at 06:05:35PM +0200, Krzysztof Kozlowski wrote:
>> Hi,
>>
>> Kernel defines same polynomial for CRC-32 in few places.
>> This is unnecessary duplication of the same value. Also
Allow other drivers and parts of kernel to use the same define for
CRC32 polynomial, instead of duplicating it in many places. This code
does not bring any functional changes, except moving existing code.
Signed-off-by: Krzysztof Kozlowski
---
include/linux/crc32poly.h | 20
ed on HW. Rest got just different
builds.
Best regards,
Krzysztof
Krzysztof Kozlowski (6):
lib/crc: Move polynomial definition to separate header
lib/crc: Use consistent naming for CRC-32 polynomials
crypto: stm32_crc32 - Use existing define with polynomial
net: ethernet: Use existing d
Do not define again the polynomial but use header with existing define.
Signed-off-by: Krzysztof Kozlowski
---
Not tested
It would be nice to get some testing. Only generic lib/crc, bunzip, xz_crc32
and Freescale's Ethernet driver were tested on HW. Rest got just different
builds.
dr
Do not define again the polynomial but use header with existing define.
Signed-off-by: Krzysztof Kozlowski
---
lib/decompress_bunzip2.c | 3 ++-
lib/xz/xz_crc32.c| 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/lib/decompress_bunzip2.c b/lib/decompress_bunzip2.c
Do not define again the polynomial but use header with existing define.
Signed-off-by: Krzysztof Kozlowski
---
Only Freescale FEC was tested
It would be nice to get some testing. Only generic lib/crc, bunzip, xz_crc32
and Freescale's Ethernet driver were tested on HW. Rest got just diff
Header was defining CRCPOLY_LE/BE and CRC32C_POLY_LE but in fact all of
them are CRC-32 polynomials so use consistent naming.
Signed-off-by: Krzysztof Kozlowski
---
include/linux/crc32poly.h | 4 ++--
lib/crc32.c | 10 +-
lib/gen_crc32table.c | 4 ++--
3 files
Do not define again the polynomial but use header with existing define.
Signed-off-by: Krzysztof Kozlowski
---
Not tested
It would be nice to get some testing. Only generic lib/crc, bunzip, xz_crc32
and Freescale's Ethernet driver were tested on HW. Rest got just different
builds.
dr
.
>
> drivers/crypto/exynos-rng.c | 6 ++
> drivers/crypto/picoxcell_crypto.c | 6 ++
> 2 files changed, 4 insertions(+), 8 deletions(-)
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
ch warning:
drivers/crypto/omap-sham.c:1761 omap_sham_done_task() warn: inconsistent
indenting
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/omap-sham.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index 76
check 'req' (see line 1208)
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
index 5d64c08b7f47..d7c8163e5068 100644
--- a/drivers/crypto/s5p-sss.c
+++ b/drivers/crypto/
arrays.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
index d7c8163e5068..bf7163042569 100644
--- a/drivers/crypto/s5p-sss.c
check 'req' (see line 805)
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/omap-sham.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index 86b89ace836f..7650b1b449bb 100644
--- a/drivers/crypto/omap-sham.c
+++ b/driver
+0x19c/0x328
>
> drivers/crypto/s5p-sss.c | 12 +---
> 1 file changed, 9 insertions(+), 3 deletions(-)
Fixes and cc-stable?
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On Wed, Jan 24, 2018 at 2:04 PM, Anand Moon wrote:
> Hi Kamil Konieczny,
>
> I am looking in setup of encrypted sata hard-disk on Odroid XU4/HC1 device.
> using following encryption method.
>
> aes-cbc-essiv:sha256 128
> aes-cbc-essiv:sha256 256
>
> Here is my defconfig I am using. https://pastebi
On Fri, Jan 12, 2018 at 5:30 PM, Colin King wrote:
> From: Colin Ian King
>
> Currently, the return from readl_poll_timeout is being assigned to
> a u32 and this is being checked for a -ve return which is always
> false since a u32 cannot be less than zero. Fix this by changing
> val to an int s
> 1 file changed, 1 insertion(+), 3 deletions(-)
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
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