secured.
Best regards,
Krzysztof
Krzysztof Kozlowski (4):
dt-bindings: rng: Describe Exynos4 PRNG bindings
hwrng: exynos - Add timeout for waiting on init done
hwrng: exynos - Fix missing configuration after suspend to RAM
hwrng: exynos - Add Device Tree support
.../bindings/rng/samsung
: Krzysztof Kozlowski
---
drivers/char/hw_random/exynos-rng.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/char/hw_random/exynos-rng.c
b/drivers/char/hw_random/exynos-rng.c
index 162adbda1b70..7077c7741dae 100644
--- a/drivers/char/hw_random/exynos-rng.c
+++ b/drivers/char
Document the bindings used by exynos-rng Pseudo Random Number Generator
driver.
Signed-off-by: Krzysztof Kozlowski
---
.../devicetree/bindings/rng/samsung,exynos-rng4.txt | 17 +
1 file changed, 17 insertions(+)
create mode 100644
Documentation/devicetree/bindings/rng
Driver may hang waiting indefinitely for PRNG to finish its
initialization stage. Instead of stalling return -ETIMEDOUT error.
Signed-off-by: Krzysztof Kozlowski
---
drivers/char/hw_random/exynos-rng.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/char
high.
After each system suspend initialize the seed to fix the error.
Signed-off-by: Krzysztof Kozlowski
---
drivers/char/hw_random/exynos-rng.c | 42 ++---
1 file changed, 35 insertions(+), 7 deletions(-)
diff --git a/drivers/char/hw_random/exynos-rng.c
b/drivers
,
Krzysztof
Krzysztof Kozlowski (3):
clk: samsung: exynos4: Add SSS gate clock
ARM: dts: Add PRNG module for exynos4
ARM: dts: Enable PRNG module on exynos4412-trats2
arch/arm/boot/dts/exynos4.dtsi | 8
arch/arm/boot/dts/exynos4412-trats2.dts | 4
drivers/clk/samsung/cl
Enable Pseudo Random Number Generator (PRNG) on Trats2 board. This
allows using hardware random number generator:
$ echo exynos > /sys/class/misc/hw_random/rng_current
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/boot/dts/exynos4412-trats2.dts | 4
1 file changed, 4 insertions(+)
d
Add a gate clock for controlling all clocks of Security Sub System
(SSS).
Signed-off-by: Krzysztof Kozlowski
---
drivers/clk/samsung/clk-exynos4.c | 1 +
include/dt-bindings/clock/exynos4.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/clk/samsung/clk-exynos4.c
b/drivers/clk
Add Pseudo Random Number Generator (PRNG) node of Security Sub System
(SSS) to Exynos 4 DTSI.
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/boot/dts/exynos4.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index
On 19.10.2015 13:37, Krzysztof Kozlowski wrote:
> After suspend to RAM the device stopped to work with ETIMEDOUT error:
>
> $ dd if=/dev/hwrng of=/dev/null bs=1 count=16
> dd: reading `/dev/hwrng': Connection timed out
>
> In the STATUS register the bit
;
> Any chance that you might also take a look at the other hwcrypto stuff
> on the SoC ('samsung,exynos4210-secss' compatible)?
What do you mean? The s5p-sss driver already supports Device Tree.
Best regards,
Krzysztof
>
> With best wishes,
> Tobias
>
>
> K
On 20.10.2015 04:59, Stephen Boyd wrote:
> On 10/19, Krzysztof Kozlowski wrote:
>> Add a gate clock for controlling all clocks of Security Sub System
>> (SSS).
>>
>> Signed-off-by: Krzysztof Kozlowski
>> ---
>
> The To: list is huge, so I have no idea if y
On 25.10.2015 08:58, Tobias Jakobi wrote:
> Hello Krzysztof,
>
>
> Krzysztof Kozlowski wrote:
>> On 20.10.2015 01:11, Tobias Jakobi wrote:
>>> Hello Krzysztof,
>>>
>>> I can confirm that this also works on a Odroid-X2, so I guess it's safe
>
On Thu, Mar 09, 2017 at 05:16:35AM -0600, Nathan Royce wrote:
> Gave it a try on 4.10.1, but still to no avail:
(...)
> Also for the sake of testing, I did not add any FLAGS for compilation this
> time.
Damn, I am fixing bugs around but not the one you are hitting. Can you
also check if exynos_
Beside developing of this driver recently, I handle also reviews and
bug reports from users so having a maintainer entry will ensure that I
will be CC-ed on important emails.
Cc: Vladimir Zapolskiy
Cc: Herbert Xu
Signed-off-by: Krzysztof Kozlowski
---
MAINTAINERS | 7 +++
1 file changed
On Fri, Mar 10, 2017 at 11:18:13PM +0200, Vladimir Zapolskiy wrote:
> Hi Krzysztof,
>
> On 03/10/2017 09:10 PM, Krzysztof Kozlowski wrote:
> > Beside developing of this driver recently, I handle also reviews and
> > bug reports from users so having a maintainer entry will e
Add Krzysztof Kozlowski and Vladimir Zapolskiy as maintainers of s5p-sss
driver for handling reviews, testing and getting bug reports from the
users.
Cc: Vladimir Zapolskiy
Cc: Herbert Xu
Signed-off-by: Krzysztof Kozlowski
---
Changes since v1:
1. Add also Vladimir
---
MAINTAINERS | 8
On Fri, Mar 10, 2017 at 03:44:45PM -0600, Nathan Royce wrote:
> Sure, I went ahead and rebuilt it just using the bare exynos_defconfig
> and adding XTS and ECB and no other changes.
>
> No flags were used. No patches were used other than the 2 you
> provided. Just the barest of bears, the barest o
On Sun, Mar 12, 2017 at 09:13:22PM +0200, Krzysztof Kozlowski wrote:
> On Fri, Mar 10, 2017 at 03:44:45PM -0600, Nathan Royce wrote:
> > Sure, I went ahead and rebuilt it just using the bare exynos_defconfig
> > and adding XTS and ECB and no other changes.
> >
> > No
Add kernel-doc to s5p_aes_dev structure.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 27 ++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
index 35ea84b7d775..7ac657f46d15 100644
Driver uses threaded interrupt handler so there is no real need for
using spinlocks for synchronization. Mutexes would do fine and are
friendlier for overall system preemptivness and real-time behavior.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 35
Krzysztof Kozlowski (4):
crypto: s5p-sss - Close possible race for completed requests
crypto: s5p-sss - Remove unused variant field from state container
crypto: s5p-sss - Document the struct s5p_aes_dev
crypto: s5p-sss - Use mutex instead of spinlock
drivers/crypto/s5p-sss.c | 70
out of a lock
protected critical section. This might lead to potential race between
completing current request and scheduling a new one. Effectively the
request completion might try to operate on new crypto request.
Cc: # v4.10.x
Fixes: 28b62b145868 ("crypto: s5p-sss - Fix spinlock recursion on
The driver uses type of device (variant) only during probe so there is
no need to store it for later.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
index 6c620487e9c2
On Fri, Mar 17, 2017 at 06:28:29PM +0100, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> On Friday, March 17, 2017 04:49:22 PM Krzysztof Kozlowski wrote:
> > Driver uses threaded interrupt handler so there is no real need for
> > using spinlocks for synchronization. Mutex
Hi,
I looked at Exynos Pseudo Random Nubmer Generator driver
(drivers/char/hw_random/exynos-rng.c) and noticed that it always seeds
the device with jiffies. Then I looked at few other drivers and found
that they do not seed themself (or at least I couldn't find this).
I think the hw_random API d
On Mon, Mar 20, 2017 at 09:28:58PM +0800, Herbert Xu wrote:
> On Mon, Mar 20, 2017 at 12:19:32PM +0530, PrasannaKumar Muralidharan wrote:
> >
> > AF_ALG interface for rng does have seeding support. I think hw_random
> > does not provide seeding support intentionally as I understand that
> > True RN
with app [2].
Patches are independent. I will take the defconfig changes (2/3 and 3/3)
through samsung-soc tree.
Best regards,
Krzysztof
[1] https://www.spinics.net/lists/arm-kernel/msg569641.html
[2] https://www.spinics.net/lists/arm-kernel/msg571184.html
Krzysztof Kozlowski (3):
crypto
Enable the new Exynos pseudo random number generator driver and
user-space API to access crypto algorithms and devices (not only RNG).
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/configs/exynos_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/configs
using runtime PM just to toggle clock is huge overhead. Another
difference is using the same seed after resuming from system suspend
(previously driver was re-seeding itself again with jiffies).
Signed-off-by: Krzysztof Kozlowski
---
MAINTAINERS | 8 +
drivers/char
Enable the new Exynos pseudo random number generator driver and
user-space API to access crypto algorithms and devices (not only RNG).
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/configs/multi_v7_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/configs
On Fri, Mar 24, 2017 at 03:37:59PM +0100, Stephan Müller wrote:
> Am Freitag, 24. März 2017, 15:24:44 CET schrieb Krzysztof Kozlowski:
>
> Hi Krzysztof,
>
> > +
> > +static int exynos_rng_set_seed(struct exynos_rng_dev *rng,
> > + con
On Fri, Mar 24, 2017 at 03:46:44PM +0100, Stephan Müller wrote:
> Am Freitag, 24. März 2017, 15:43:48 CET schrieb Krzysztof Kozlowski:
>
> Hi Krzysztof,
>
> > On Fri, Mar 24, 2017 at 03:37:59PM +0100, Stephan Müller wrote:
> > > Am Freitag, 24. März 2017, 15:24:44 CET
On Fri, Mar 24, 2017 at 03:55:22PM +0100, Stephan Müller wrote:
> Am Freitag, 24. März 2017, 15:51:56 CET schrieb Krzysztof Kozlowski:
>
> Hi Krzysztof,
> >
> > I'll use the generated random numbers.
>
> If you do that, may I propse that you update this seed
On Fri, Mar 24, 2017 at 04:26:47PM +0100, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> Firstly, thanks for working on this.
>
> The patch looks fine overall for me, some review comments below.
>
> On Friday, March 24, 2017 05:24:44 PM Krzysztof Kozlowski wrote:
> &g
On Fri, Mar 24, 2017 at 05:11:25PM +0100, Bartlomiej Zolnierkiewicz wrote:
> On Friday, March 24, 2017 06:46:00 PM Krzysztof Kozlowski wrote:
> > I really do not like global or file-scope variables. I do not like
> > drivers using them. Actually I hate them.
> >
> > Fr
On Fri, Mar 24, 2017 at 05:45:41PM +0100, Bartlomiej Zolnierkiewicz wrote:
> > > > And I think the probe might be called twice, for example in case of
> > > > mistake in DTB.
> > >
> > > Even if this is possible resource allocation code in the driver will
> > > take take care of handling it just f
/lists/arm-kernel/msg571184.html
Krzysztof Kozlowski (3):
crypto: hw_random - Add new Exynos RNG driver
ARM: exynos_defconfig: Enable Exynos RNG and user-space crypto API
ARM: multi_v7_defconfig: Enable Exynos RNG and user-space crypto API
MAINTAINERS | 8 +
arch/arm
Enable the new Exynos pseudo random number generator driver and
user-space API to access crypto algorithms and devices (not only RNG).
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/configs/exynos_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/configs
using runtime PM just to toggle clock is huge overhead.
Another difference is reseeding itself with generated random data
periodically and during resuming from system suspend (previously driver
was re-seeding itself again with jiffies).
Signed-off-by: Krzysztof Kozlowski
---
The resume path is
Enable the new Exynos pseudo random number generator driver and
user-space API to access crypto algorithms and devices (not only RNG).
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/configs/multi_v7_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/configs
On Fri, Mar 24, 2017 at 09:41:59PM +0100, Stephan Müller wrote:
> Am Freitag, 24. März 2017, 19:26:04 CET schrieb Krzysztof Kozlowski:
>
> Hi Krzysztof,
>
> > +static unsigned int exynos_rng_copy_random(struct exynos_rng_dev *rng,
> > +
Enable the new Exynos pseudo random number generator driver and
user-space API to access crypto algorithms and devices (not only RNG).
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/configs/multi_v7_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/configs
/lists/arm-kernel/msg571184.html
Krzysztof Kozlowski (3):
crypto: hw_random - Add new Exynos RNG driver
ARM: exynos_defconfig: Enable Exynos RNG and user-space crypto API
ARM: multi_v7_defconfig: Enable Exynos RNG and user-space crypto API
MAINTAINERS | 8 +
arch
using runtime PM just to toggle clock is huge overhead.
Another difference is reseeding itself with generated random data
periodically and during resuming from system suspend (previously driver
was re-seeding itself again with jiffies).
Signed-off-by: Krzysztof Kozlowski
---
MAINTAINERS
Enable the new Exynos pseudo random number generator driver and
user-space API to access crypto algorithms and devices (not only RNG).
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/configs/exynos_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/configs
On Sun, Mar 26, 2017 at 08:50:42PM +0530, PrasannaKumar Muralidharan wrote:
> .Have some minor comments. Please feel free to correct if I am wrong.
>
> On 25 March 2017 at 21:56, Krzysztof Kozlowski wrote:
> > Replace existing hw_ranndom/exynos-rng driver with a new, reworked one
On Sun, Mar 26, 2017 at 07:11:28PM +0200, Stephan Müller wrote:
> Am Samstag, 25. März 2017, 17:26:52 CEST schrieb Krzysztof Kozlowski:
> > +static int exynos_rng_set_seed(struct exynos_rng_dev *rng,
> > + const u8 *seed, unsigned int slen)
> &g
On Sun, Mar 26, 2017 at 07:05:48PM +0200, Stephan Müller wrote:
> Am Sonntag, 26. März 2017, 18:46:02 CEST schrieb PrasannaKumar Muralidharan:
>
> HiKrzysztof,
>
> > >> > + if (slen < EXYNOS_RNG_SEED_SIZE) {
> > >> > + dev_warn(rng->dev, "Seed too short (only %u bytes)\n",
On Mon, Mar 27, 2017 at 03:53:03PM +0200, Stephan Müller wrote:
> Am Montag, 27. März 2017, 06:23:11 CEST schrieb PrasannaKumar Muralidharan:
>
> Hi PrasannaKumar,
>
> > > Oh my, if you are right with your first guess, this is a bad DRNG design.
> > >
> > > Just out of curiousity: what happens i
On Tue, Mar 28, 2017 at 07:41:47PM +0200, Stephan Müller wrote:
> Am Dienstag, 28. März 2017, 18:48:24 CEST schrieb Krzysztof Kozlowski:
>
> Hi Krzysztof,
>
> > I tested a little bit and:
> > 1. Seeding with some value
> > 2. generating random,
> > 3. kcapi_rn
On Sat, Apr 08, 2017 at 10:02:46AM +0800, Herbert Xu wrote:
> On Thu, Apr 06, 2017 at 05:54:14PM +0800, Herbert Xu wrote:
> > On Mon, Mar 13, 2017 at 07:06:01PM +0200, Krzysztof Kozlowski wrote:
> > >
> > > I bisected this to commit f1c131b45410 ("crypto: xts - Conv
Few parts of kernel define their own macro for aligning down so provide
a common define for this, with the same usage and assumptions as existing
ALIGN.
Convert also three existing implementations to this one.
Signed-off-by: Krzysztof Kozlowski
---
The metag change was not even compiled due
preferred approach because
using runtime PM just to toggle clock is huge overhead.
Another difference is reseeding itself with generated random data
periodically and during resuming from system suspend (previously driver
was re-seeding itself again with jiffies).
Signed-off-by: Krzysztof Kozlowski
Krzysztof
[1] https://www.spinics.net/lists/arm-kernel/msg569641.html
[2] https://www.spinics.net/lists/arm-kernel/msg571184.html
Krzysztof Kozlowski (2):
linux/kernel.h: Add ALIGN_DOWN macro
crypto: hw_random - Add new Exynos RNG driver
MAINTAINERS | 8 +
arch
On Mon, Apr 10, 2017 at 12:55 PM, Herbert Xu
wrote:
> On Sat, Apr 08, 2017 at 03:32:45PM +0200, Krzysztof Kozlowski wrote:
>>
>> +static struct rng_alg exynos_rng_alg = {
>> + .generate = exynos_rng_generate,
>> + .seed = exynos_r
preferred approach because
using runtime PM just to toggle clock is huge overhead.
Another difference is reseeding itself with generated random data
periodically and during resuming from system suspend (previously driver
was re-seeding itself again with jiffies).
Signed-off-by: Krzysztof Kozlowski
om TRNG module.
Tested with app [2].
Patches are independent. I will take the defconfig changes (2/3 and 3/3)
through samsung-soc tree.
Best regards,
Krzysztof
[1] https://www.spinics.net/lists/arm-kernel/msg569641.html
[2] https://www.spinics.net/lists/arm-kernel/msg571184.html
Krzysztof Koz
Few parts of kernel define their own macro for aligning down so provide
a common define for this, with the same usage and assumptions as existing
ALIGN.
Convert also three existing implementations to this one.
Signed-off-by: Krzysztof Kozlowski
---
The metag change was not even compiled due
On Sun, May 21, 2017 at 8:09 AM, PrasannaKumar Muralidharan
wrote:
> As cra_ctxsize is set but the allocated space is not used, set it 0.
Why do you think it is not used? Did you test our change on hardware?
Best regards,
Krzysztof
>
> Signed-off-by: PrasannaKumar Muralidharan
> ---
> drivers
On Sun, May 21, 2017 at 9:11 AM, PrasannaKumar Muralidharan
wrote:
> Hi Krzysztof
>
> On 21 May 2017 at 11:56, Krzysztof Kozlowski wrote:
>> On Sun, May 21, 2017 at 8:09 AM, PrasannaKumar Muralidharan
>> wrote:
>>> As cra_ctxsize is set but the allocated space is
On Mon, May 22, 2017 at 5:44 AM, PrasannaKumar Muralidharan
wrote:
>>> I do not have access to the hardware, did not test the change. Sorry I
>>> forgot to mention that.
>>
>> That is quite important... By default everything must be tested so if
>> you are skipping this step then please mark the p
eter 'kid_2' description in 'asymmetric_key_id_same'
Signed-off-by: Krzysztof Kozlowski
---
crypto/asymmetric_keys/asymmetric_type.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/crypto/asymmetric_keys/asymmetric_type.c
b/crypto/asymme
eter 'kid_2' description in 'asymmetric_key_id_same'
Signed-off-by: Krzysztof Kozlowski
---
crypto/asymmetric_keys/asymmetric_type.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/crypto/asymmetric_keys/asymmetric_type.c
b/crypto/asymme
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and also it prints the error value.
Signed-off-by: Krzysztof Kozlowski
---
drivers/char/hw_random/cctrng.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/char
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and also it prints the error value.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/ccree/cc_driver.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and also it prints the error value.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/sa2ul.c | 18 +++---
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/crypto
-to-int-cast]
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/sa2ul.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/sa2ul.c b/drivers/crypto/sa2ul.c
index 5bc099052bd2..4a950437bf44 100644
--- a/drivers/crypto/sa2ul.c
+++ b/drivers/crypto/sa2ul.c
On Wed, Aug 19, 2020 at 07:52:12PM +0200, Krzysztof Kozlowski wrote:
> Fix W=1 compile warnings (invalid kerneldoc):
>
> crypto/asymmetric_keys/asymmetric_type.c:160: warning: Function parameter
> or member 'kid1' not described in 'asymmetric_key_id_same&#x
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/stm32/stm32-hash.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/crypto
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 9 +++--
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 9
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/caam/caamalg_qi2.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/crypto/caam
Fix kerneldoc warnings:
drivers/crypto/caam/caamalg_qi2.c:73: warning: cannot understand function
prototype: 'struct caam_ctx '
drivers/crypto/caam/caamalg_qi2.c:2962: warning: cannot understand function
prototype: 'struct caam_hash_ctx '
Signed-off-by: Krzysztof Koz
changed, 2 insertions(+), 4 deletions(-)
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On Thu, 3 Sep 2020 at 14:08, Iuliana Prodan wrote:
>
> On 9/2/2020 6:05 PM, Krzysztof Kozlowski wrote:
> > Fix kerneldoc warnings:
> >
> >drivers/crypto/caam/caamalg_qi2.c:73: warning: cannot understand
> > function prototype: 'struct caam_ctx '
>
Correct a typo in the compatible - missing trailing 's'.
Signed-off-by: Krzysztof Kozlowski
---
Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/crypto/samsung-slims
x27;
drivers/crypto/s5p-sss.c:1143: warning: Excess function parameter 'nbytes'
description in 's5p_hash_prepare_sgs'
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/s
Pass the error directly from devm_clk_get() to describe the real reason,
instead of fixed ENOENT. Do not print error messages on deferred probe.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a
On Fri, 4 Sep 2020 at 11:07, Kamil Konieczny wrote:
>
>
>
> On 9/3/20 8:03 PM, Krzysztof Kozlowski wrote:
> > Correct a typo in the compatible - missing trailing 's'.
> >
> > Signed-off-by: Krzysztof Kozlowski
> > ---
> > Documentation
/ctrl.c:449: warning: Function parameter or member 'ctrl'
not described in 'caam_get_era'
Signed-off-by: Krzysztof Kozlowski
---
Changes since v1:
1. Fix more warnings
---
drivers/crypto/caam/caamalg_desc.c | 1 +
drivers/crypto/caam/caamalg_qi2.c | 4 ++--
drivers/crypto/caam/
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.
Signed-off-by: Krzysztof Kozlowski
---
Changes since v1:
1. None
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 9 +++--
drivers/crypto/allwinner/sun8i
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Iuliana Prodan
---
Changes since v1:
1. Add Reviewed-by
---
drivers/crypto/caam/caamalg_qi2.c | 3 +--
1 file changed
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.
Signed-off-by: Krzysztof Kozlowski
---
Changes since v1:
1. None
---
drivers/crypto/stm32/stm32-hash.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions
eter 'kid_2' description in 'asymmetric_key_id_same'
Signed-off-by: Krzysztof Kozlowski
Acked-by: Randy Dunlap
---
crypto/asymmetric_keys/asymmetric_type.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/crypto/asymmetric_keys/asymmetric_type.c
b/
Convert Samsung Exynos Pseudo Random Number Generator bindings to DT
schema format using json-schema.
Signed-off-by: Krzysztof Kozlowski
---
.../bindings/rng/samsung,exynos4-rng.txt | 19 -
.../bindings/rng/samsung,exynos4-rng.yaml | 41 +++
MAINTAINERS
Convert Samsung Exynos Security SubSystem (SSS) and SlimSSS hardware
crypto accelerator bindings to DT schema format using json-schema.
Signed-off-by: Krzysztof Kozlowski
---
Rebased on linux-next due to conflicting change in MAINTAINERS file
coming through arm-soc tree.
---
.../bindings
Convert Samsung Exynos Security SubSystem (SSS) and SlimSSS hardware
crypto accelerator bindings to DT schema format using json-schema.
Signed-off-by: Krzysztof Kozlowski
---
Rebased on linux-next due to conflicting change in MAINTAINERS file
coming through arm-soc tree.
Changes since v1:
1
Convert Samsung Exynos Pseudo Random Number Generator bindings to DT
schema format using json-schema.
Signed-off-by: Krzysztof Kozlowski
---
Changes since v2:
1. Add additionalProperties false,
2. Include clock header and use defines instead of clock numbers.
Changes since v1:
1. Indent
finally drop the
> blkcipher code in the near future.
>
> Cc: Krzysztof Kozlowski
> Cc: Vladimir Zapolskiy
> Cc: Kamil Konieczny
> Cc: linux-samsung-...@vger.kernel.org
> Signed-off-by: Ard Biesheuvel
> ---
> drivers/crypto/s5p-sss.c | 191 ++--
&g
On Wed, 21 Aug 2019 at 08:42, boojin.kim wrote:
>
> Diskcipher supports cryptographic operations of inline crypto engines like
> FMP. Inline crypto engine refers to hardware and solutions implemented
> to encrypt data stored in storage device.
>
> When encrypting using the FMP, Additional control
does this for us.
>
> Cc: Krzysztof Kozlowski
> Cc: Vladimir Zapolskiy
> Cc: Kamil Konieczny
> Signed-off-by: Eric Biggers
> ---
> drivers/crypto/s5p-sss.c | 39 ++-
> 1 file changed, 6 insertions(+), 33 deletions(-)
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On Wed, 20 May 2020 at 13:53, Stephan Mueller wrote:
> > > That said, the illustrated example is typical for hardware RNGs. Yet
> > > it is never guaranteed to work that way. Thus, if you can point to
> > > architecture documentation of your specific hardware RNGs showing that
> > > the data read
(no need for end stop)
With these changes:
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
Replace GPL license statement with SPDX GPL-2.0 license identifier.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/s5p-sss.c | 24 ++--
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
index
or later. GPL-2.0 was
intended by author so fix up this mess.
Signed-off-by: Krzysztof Kozlowski
---
drivers/crypto/exynos-rng.c | 12 ++--
1 file changed, 2 insertions(+), 10 deletions(-)
diff --git a/drivers/crypto/exynos-rng.c b/drivers/crypto/exynos-rng.c
index 451620b475a0
, size_t max,
>bool wait)
> {
> struct exynos_trng_dev *trng;
> - u32 val;
> + int val;
It seems that one forgot to run Smatch on the driver :).
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
> 1 file changed, 1 insertion(+), 3 deletions(-)
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On Fri, Jan 12, 2018 at 5:30 PM, Colin King wrote:
> From: Colin Ian King
>
> Currently, the return from readl_poll_timeout is being assigned to
> a u32 and this is being checked for a -ve return which is always
> false since a u32 cannot be less than zero. Fix this by changing
> val to an int s
On Wed, Jan 24, 2018 at 2:04 PM, Anand Moon wrote:
> Hi Kamil Konieczny,
>
> I am looking in setup of encrypted sata hard-disk on Odroid XU4/HC1 device.
> using following encryption method.
>
> aes-cbc-essiv:sha256 128
> aes-cbc-essiv:sha256 256
>
> Here is my defconfig I am using. https://pastebi
+0x19c/0x328
>
> drivers/crypto/s5p-sss.c | 12 +---
> 1 file changed, 9 insertions(+), 3 deletions(-)
Fixes and cc-stable?
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
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