Re: [PATCH 0/4] hwrng: omap - fixes and improvements

omap - move clock related code to omap_rng_probe() > > drivers/char/hw_random/omap-rng.c | 36 +--- > 1 file changed, 25 insertions(+), 11 deletions(-) For the whole series, Reviewed-by: Romain Perier <romain.per...@collabora.com>

[PATCH v2] crypto: marvell - Copy IVDIG before launching partial DMA ahash requests

computed is not updated into the hash engine. It leads to non-deterministic corrupted digest results. Fixes: commit 2786cee8e50b ("crypto: marvell - Move SRAM I/O operations to step functions") Signed-off-by: Romain Perier <romain.per...@free-electrons.com> Acked-by: Boris Brezill

[PATCH] crypto: marvell - Copy IVDIG before launching partial DMA ahash requests

computed is not updated into the hash engine. It leads to non-deterministic corrupted digest results. Fixes: commit 2786cee8e50b ("crypto: marvell - Move SRAM I/O operat...") Signed-off-by: Romain Perier <romain.per...@free-electrons.com> Cc: <sta...@vger.kernel.org> --- drivers

[PATCH v2 0/2] CESA: Fixes for STD ahash requests

sts, even if this one is a fragment of the initial req and is re-launched. This might corrupt the context of the request in some cases. Romain Perier (2): crypto: marvell - Don't copy hash operation twice into the SRAM crypto: marvell - Don't corrupt state of an STD req for re-stepped ah

[PATCH v2 2/2] crypto: marvell - Don't corrupt state of an STD req for re-stepped ahash

ges the function to copy the state only on the first step. Fixes: commit 2786cee8e50b ("crypto: marvell - Move SRAM I/O op...") Signed-off-by: Romain Perier <romain.per...@free-electrons.com> Cc: <sta...@vger.kernel.org> --- drivers/crypto/marvell/hash.c | 8 +--- 1 file ch

[PATCH v2 1/2] crypto: marvell - Don't copy hash operation twice into the SRAM

No need to copy the template of an hash operation twice into the SRAM from the step function. Fixes: commit 85030c5168f1 ("crypto: marvell - Add support for chai...") Signed-off-by: Romain Perier <romain.per...@free-electrons.com> Cc: <sta...@vger.kernel.org> --- drivers

[PATCH 1/2] crypto: marvell - Don't copy hash operation twice into the SRAM

No need to copy the template of an hash operation twice into the SRAM from the step function. Fixes: commit 85030c5168f1 ("crypto: marvell - Add support for chai...") Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/hash.c | 3 --- 1

[PATCH 2/2] crypto: marvell - Don't corrupt state of an STD req for re-stepped ahash

hen the request is launched for the first time. Fixes: commit 2786cee8e50b ("crypto: marvell - Move SRAM I/O op...") Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/hash.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --g

[PATCH 0/2] CESA: Fixes for STD ahash requests

sts , even if this one is re-launched. This might corrupt the context of the request in some cases. Romain Perier (2): crypto: marvell - Don't copy hash operation twice into the SRAM crypto: marvell - Don't corrupt state of an STD req for re-stepped ahash drivers/crypto/marvell/hash.c |

Re: [PATCH] crypto: marvell - Don't copy hash operation twice into the SRAM

Hello, Le 02/12/2016 à 09:58, Romain Perier a écrit : Hi, Le 01/12/2016 à 17:27, Gregory CLEMENT a écrit : Hi Romain, On jeu., déc. 01 2016, Romain Perier <romain.per...@free-electrons.com> wrote: No need to copy the template of an hash operation twice into the SRAM from the step fu

Re: [PATCH] crypto: marvell - Don't copy hash operation twice into the SRAM

Hi, Le 01/12/2016 à 17:27, Gregory CLEMENT a écrit : Hi Romain, On jeu., déc. 01 2016, Romain Perier <romain.per...@free-electrons.com> wrote: No need to copy the template of an hash operation twice into the SRAM from the step function. Does this patch fix a bug ot it is jsute a c

[PATCH] crypto: marvell - Don't copy hash operation twice into the SRAM

No need to copy the template of an hash operation twice into the SRAM from the step function. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/hash.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/crypto/marvell/hash.c b/drivers/

Re: [PATCH v3 0/8] Add support for SafeXcel IP-76 to OMAP RNG

Hello, Le 26/09/2016 à 12:01, Romain Perier a écrit : Le 16/09/2016 14:52, Romain Perier a écrit : Hello, Le 16/09/2016 12:08, Romain Perier a écrit : The driver omap-rng has a lot of similarity with the IP block SafeXcel IP-76. A lot of registers are the same and the way that the driver

[PATCH v4 0/2] Improve DMA chaining for ahash requests

492 Mbits/s After 422 Mbits/s 577 Mbits/s Improvement +23%+17% Romain Perier (2): crypto: marvell - Use an unique pool to copy results of requests crypto: marvell - Don't break chain for computable last ahash requests drivers/crypto/marvell

[PATCH v4 2/2] crypto: marvell - Don't break chain for computable last ahash requests

requests processed via IPSec. This commits adds a TDMA descriptor to copy context for these of requests into the "op" dma pool, then it allow to chain these requests at the DMA level. The 'complete' operation is also updated to retrieve the MAC digest from the right location. Signed-off-

[PATCH v4 1/2] crypto: marvell - Use an unique pool to copy results of requests

, is copied later. In this way, any type of result can be retrieved by DMA for cipher or ahash requests. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com> --- Changes in v4: - Added a comment that explains why

[PATCH v3 1/2] crypto: marvell - Use an unique pool to copy results of requests

, is copied later. In this way, any type of result can be retrieved by DMA for cipher or ahash requests. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Changes in v3: - Don't allocate a new op ctx for the last tdma descriptor. Instead we point to the last op ctx in th

[PATCH v3 2/2] crypto: marvell - Don't break chain for computable last ahash requests

requests processed via IPSec. This commits adds a TDMA descriptor to copy context for these of requests into the "op" dma pool, then it allow to chain these requests at the DMA level. The 'complete' operation is also updated to retrieve the MAC digest from the right location. Signed-off-

[PATCH v3 0/2] Improve DMA chaining for ahash requests

492 Mbits/s After 422 Mbits/s 577 Mbits/s Improvement +23%+17% Romain Perier (2): crypto: marvell - Use an unique pool to copy results of requests crypto: marvell - Don't break chain for computable last ahash requests drivers/crypto/marvell

Re: [PATCH v2 0/2] Improve DMA chaining for ahash requests

Hello, Le 03/10/2016 17:17, Romain Perier a écrit : This series contain performance improvement regarding ahash requests. So far, ahash requests were systematically not chained at the DMA level. However, in some case, like this is the case by using IPSec, some ahash requests can be processed

[PATCH v2 1/2] crypto: marvell - Use an unique pool to copy results of requests

, is copied later. In this way, any type of result can be retrieved by DMA for cipher or ahash requests. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Changes in v2: - Use the dma pool "op" to retrieve outer data intead of introducing a new one. drivers/crypt

[PATCH v2 2/2] crypto: marvell - Don't break chain for computable last ahash requests

Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Changes in v2: - Replaced BUG_ON by an error - Add a variable "break_chain", with "type" to break the chain with ahash requests. It improves code readability. drivers/crypto/marvell/cipher.c | 10 +++---

[PATCH v2 0/2] Improve DMA chaining for ahash requests

492 Mbits/s After 392 Mbits/s 557 Mbits/s Improvement +14%+13% Romain Perier (2): crypto: marvell - Use an unique pool to copy results of requests crypto: marvell - Don't break chain for computable last ahash requests drivers/crypto/marvell

Re: [PATCH v3 0/8] Add support for SafeXcel IP-76 to OMAP RNG

Hello, Le 16/09/2016 12:08, Romain Perier a écrit : The driver omap-rng has a lot of similarity with the IP block SafeXcel IP-76. A lot of registers are the same and the way that the driver works is very closed the description of the TRNG EIP76 in its datasheet. This series refactorize

[PATCH v3 2/8] dt-bindings: omap-rng: Document SafeXcel IP-76 device variant

This commits add missing fields in the documentation that are used by the new device variant. It also includes DT example to show how the variant should be used. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Documentation/devicetree/bindings/rng/omap_rng.tx

[PATCH v3 4/8] hwrng: omap - Remove global definition of hwrng

to a dynamically allocated struct hwrng, each using a different name. Then, we define the name of this hwrng to "dev_name(dev)", so the name of the data structure is unique per device. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Changes in v2: - Fix the goto

[PATCH v3 7/8] hwrng: omap - Add device variant for SafeXcel IP-76 found in Armada 8K

This commits adds a device variant for Safexcel,EIP76 found in Marvell Armada 8k. It defines registers mapping with the good offset and add a specific initialization function. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Changes in v2: - Call pm_runtime_put_syn

[PATCH v3 3/8] hwrng: omap - Switch to non-obsolete read API implementation

ify this step by only checking the status of the engine, if there is data, we copy the data to the output buffer and the amout of copied data is returned to the caller, otherwise zero is returned. The hwrng core will re-call the read operation as many times as required until enough data has been copied.

[PATCH v3 6/8] hwrng: omap - Don't prefix the probe message with OMAP

cide to only display "Random Number Generator". As dev_info is already pre-pending the message with the name of the device, we have enough informations. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/char/hw_random/omap-rng.c | 2 +- 1 file changed, 1 ins

[PATCH v3 8/8] arm64: dts: marvell: add TRNG description for Armada 8K CP

This commits adds the devicetree description of the SafeXcel IP-76 TRNG found in the two Armada CP110. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 8 arch/arm64/boot/dts/marvell/armada-cp110-slave.dts

[PATCH v3 5/8] hwrng: omap - Add support for 128-bit output of data

two new values to the enumeration of existing registers: OUTPUT_2_REG and OUTPUT_3_REG. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/char/hw_random/omap-rng.c | 14 -- 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/char/hw_

[PATCH v3 1/8] dt-bindings: Add vendor prefix for INSIDE Secure

This commits adds a vendor for the company INSIDE Secure. See https://www.insidesecure.com, for more details. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff

[PATCH v3 0/8] Add support for SafeXcel IP-76 to OMAP RNG

data and add a device variant for SafeXcel IP-76, found in Armada 8K. Romain Perier (8): dt-bindings: Add vendor prefix for INSIDE Secure dt-bindings: omap-rng: Document SafeXcel IP-76 device variant hwrng: omap - Switch to non-obsolete read API implementation hwrng: omap - Remove global

Re: [PATCH v2 3/8] hwrng: omap - Switch to non-obsolete read API implementation

Hi, Le 13/09/2016 11:48, Herbert Xu a écrit : On Wed, Sep 07, 2016 at 05:57:38PM +0200, Romain Perier wrote: + +static int omap_rng_do_read(struct hwrng *rng, void *data, size_t max, + bool wait) { struct omap_rng_dev *priv; - int data, i

[PATCH v2 6/8] hwrng: omap - Don't prefix the probe message with OMAP

cide to only display "Random Number Generator". As dev_info is already pre-pending the message with the name of the device, we have enough informations. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/char/hw_random/omap-rng.c | 2 +- 1 file changed, 1 ins

[PATCH v2 5/8] hwrng: omap - Add support for 128-bit output of data

two new values to the enumeration of existing registers: OUTPUT_2_REG and OUTPUT_3_REG. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/char/hw_random/omap-rng.c | 14 -- 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/char/hw_

[PATCH v2 7/8] hwrng: omap - Add device variant for SafeXcel IP-76 found in Armada 8K

This commits adds a device variant for Safexcel,EIP76 found in Marvell Armada 8k. It defines registers mapping with the good offset and add a specific initialization function. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Changes in v2: - Call pm_runtime_put_syn

[PATCH v2 2/8] dt-bindings: omap-rng: Document SafeXcel IP-76 device variant

This commits add missing fields in the documentation that are used by the new device variant. It also includes DT example to show how the variant should be used. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Documentation/devicetree/bindings/rng/omap_rng.tx

[PATCH v2 1/8] dt-bindings: Add vendor prefix for INSIDE Secure

This commits adds a vendor for the company INSIDE Secure. See https://www.insidesecure.com, for more details. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff

[PATCH v2 4/8] hwrng: omap - Remove global definition of hwrng

to a dynamically allocated struct hwrng, each using a different name. Then, we define the name of this hwrng to "dev_name(dev)", so the name of the data structure is unique per device. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Changes in v2: - Fix the goto

[PATCH v2 0/8] Add support for SafeXcel IP-76 to OMAP RNG

data and add a device variant for SafeXcel IP-76, found in Armada 8K. Romain Perier (8): dt-bindings: Add vendor prefix for INSIDE Secure dt-bindings: omap-rng: Document SafeXcel IP-76 device variant hwrng: omap - Switch to non-obsolete read API implementation hwrng: omap - Remove global

Re: [PATCH 4/9] hwrng: omap - Use the managed device resource API for registration

Le 07/09/2016 16:45, PrasannaKumar Muralidharan a écrit : On 7 September 2016 at 19:53, Romain Perier <romain.per...@free-electrons.com> wrote: Hello, Le 06/09/2016 18:31, PrasannaKumar Muralidharan a écrit : Use devm_hwrng_register instead of hwrng_register. It avoids the need to

Re: [PATCH 4/9] hwrng: omap - Use the managed device resource API for registration

Hello, Le 06/09/2016 18:31, PrasannaKumar Muralidharan a écrit : Use devm_hwrng_register instead of hwrng_register. It avoids the need to handle unregistration explicitly from the remove function. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/char/hw_rando

[PATCH 7/9] hwrng: omap - Don't prefix the probe message with OMAP

cide to only display "Random Number Generator". As dev_info is already pre-pending the message with the name of the device, we have enough informations. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/char/hw_random/omap-rng.c | 2 +- 1 file changed, 1 ins

[PATCH 6/9] hwrng: omap - Add support for 128-bit output of data

two new values to the enumeration of existing registers: OUTPUT_2_REG and OUTPUT_3_REG. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/char/hw_random/omap-rng.c | 14 -- 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/char/hw_

[PATCH 8/9] hwrng: omap - Add device variant for SafeXcel IP-76 found in Armada 8K

This commits adds a device variant for Safexcel,EIP76 found in Marvell Armada 8k. It defines registers mapping with the good offset and add a specific initialization function. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/char/hw_random/Kconfig| 2 +- d

[PATCH 9/9] arm64: dts: marvell: add TRNG description for Armada 8K CP

This commits adds the devicetree description of the SafeXcel IP-76 TRNG found in the two Armada CP110. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 8 arch/arm64/boot/dts/marvell/armada-cp110-slave.dts

[PATCH 3/9] hwrng: omap - Switch to non-obsolete read API implementation

ify this step by only checking the status of the engine, if there is data, we copy the data to the output buffer and the amout of copied data is returned to the caller, otherwise zero is returned. The hwrng core will re-call the read operation as many times as required until enough data has been copied.

[PATCH 2/9] dt-bindings: omap-rng: Document SafeXcel IP-76 device variant

This commits add missing fields in the documentation that are used by the new device variant. It also includes DT example to show how the variant should be used. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Documentation/devicetree/bindings/rng/omap_rng.tx

[PATCH 0/9] Add support for SafeXcel IP-76 to OMAP RNG

data and add a device variant for SafeXcel IP-76, found in Armada 8K. Romain Perier (9): dt-bindings: Add vendor prefix for INSIDE Secure dt-bindings: omap-rng: Document SafeXcel IP-76 device variant hwrng: omap - Switch to non-obsolete read API implementation hwrng: omap - Use the managed

[PATCH 4/9] hwrng: omap - Use the managed device resource API for registration

Use devm_hwrng_register instead of hwrng_register. It avoids the need to handle unregistration explicitly from the remove function. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/char/hw_random/omap-rng.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)

[PATCH 5/9] hwrng: omap - Remove global definition of hwrng

to a dynamically allocated struct hwrng, each using a different name. Then, we define the name of this hwrng to "dev_name(dev)", so the name of the data structure is unique per device. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/char/hw_random

[PATCH 1/9] dt-bindings: Add vendor prefix for INSIDE Secure

This commits adds a vendor for the company INSIDE Secure. See https://www.insidesecure.com, for more details. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff

[PATCH 2/2] crypto: marvell - Don't break chain for computable last ahash requests

n. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/hash.c | 69 +-- 1 file changed, 54 insertions(+), 15 deletions(-) diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto/marvell/hash.c index 9f28468

[PATCH 0/2] Improve DMA chaining for ahash requests

530 Mbits/s After 413 Mbits/s 578 Mbits/s Improvement +11%+9% Romain Perier (2): crypto: marvell - Use an unique pool to copy results of requests crypto: marvell - Don't break chain for computable last ahash requests drivers/crypto/marvell

[PATCH 5/7] crypto: marvell - Update transformation context for each dequeued req

cesa request. Fixes: commit 85030c5168f1 ("crypto: marvell - Add support for chai...") Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/cesa.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/crypto/marvell/cesa.c b/driver

[PATCH 7/7] crypto: marvell - Don't hardcode block size in mv_cesa_ahash_cache_req

Don't use 64 'as is', as max block size in mv_cesa_ahash_cache_req. Use CESA_MAX_HASH_BLOCK_SIZE instead, this is better for readability. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/hash.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[PATCH 4/7] crypto: marvell: make mv_cesa_ahash_cache_req() return bool

From: Thomas Petazzoni The mv_cesa_ahash_cache_req() function always returns 0, which makes its return value pretty much useless. However, in addition to returning a useless value, it also returns a boolean in a variable passed by reference to indicate if the

[PATCH 6/7] crypto: marvell - Don't overwrite default creq->state during initialization

req->state just after the call to mv_cesa_ahash_init. Fixes: commit b0ef51067cb4 ("crypto: marvell/cesa - initialize hash...") Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/hash.c | 15 +-- 1 file changed, 9 insertions(+)

[PATCH 0/7] Various fixes for the cesa driver

This patches series contains various fixes for ahash requests, dma operations and an important fixe in the core of the driver (cesa.c). It also includes some code cleanups. Romain Perier (3): crypto: marvell - Update transformation context for each dequeued req crypto: marvell - Don't

[PATCH 2/7] crypto: marvell: remove unused parameter in mv_cesa_ahash_dma_add_cache()

From: Thomas Petazzoni The dma_iter parameter of mv_cesa_ahash_dma_add_cache() is never used, so get rid of it. Signed-off-by: Thomas Petazzoni --- drivers/crypto/marvell/hash.c | 3 +-- 1 file changed, 1 insertion(+),

[PATCH 3/7] crypto: marvell: turn mv_cesa_ahash_init() into a function returning void

From: Thomas Petazzoni The mv_cesa_ahash_init() function always returns 0, and the return value is anyway never checked. Turn it into a function returning void. Signed-off-by: Thomas Petazzoni ---

[PATCH 1/7] crypto: marvell: be explicit about destination in mv_cesa_dma_add_op()

From: Thomas Petazzoni The mv_cesa_dma_add_op() function builds a mv_cesa_tdma_desc structure to copy the operation description to the SRAM, but doesn't explicitly initialize the destination of the copy. It works fine because the operatin description must be

[PATCH] crypto: marvell: Don't copy IV vectors from the _process op for ciphers

the duplicated code in the _process op. Fixes: 3610d6cd5231 ("crypto: marvell - Add a complete...") Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/cipher.c | 11 +-- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/driver

[PATCH] crypto: marvell - Don't chain at DMA level when backlog is disabled

queued or added to the backlog. Fixes: 85030c5168f1 ("crypto: marvell - Add support for chaining...") Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/cesa.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/driver

[PATCH] crypto: marvell - Fix memory leaks in TDMA chain for cipher requests

("crypto: marvell/cesa - add TDMA support") Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/cipher.c | 14 ++ 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/crypto/marvell/cipher.c b/drivers/crypto/marvel

[PATCH] crypto: marvell: Fix wrong flag used for GFP in mv_cesa_dma_add_iv_op

Use the parameter 'gfp_flags' instead of 'flag' as second argument of dma_pool_alloc(). The parameter 'flag' is for the TDMA descriptor, its content has no sense for the allocator. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/tdma.c | 2 +-

Re: [PATCH v3 02/10] crypto: marvell: Check engine is not already running when enabling a req

Hello, Le 22/06/2016 12:33, Herbert Xu a écrit : Romain Perier <romain.per...@free-electrons.com> wrote: Add a BUG_ON() call when the driver tries to launch a crypto request while the engine is still processing the previous one. This replaces a silent system hang by a verbose kernel

[PATCH v3 05/10] crypto: marvell: Move tdma chain out of mv_cesa_tdma_req and remove it

so move it into the upper structure. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com> --- Changes in v2: - Reworded the commit log - In mv_cesa_ablkcipher_req moved 'base' and 'std' into the upper

[PATCH v3 10/10] crypto: marvell: Increase the size of the crypto queue

by the engines. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com> --- drivers/crypto/marvell/cesa.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/ma

[PATCH v3 08/10] crypto: marvell: Add load balancing between engines

chaining crypto requests at the DMA level. By using a crypto queue per engine, we make sure that we keep the state of the tdma chain synchronized with the crypto queue. We also reduce contention on 'cesa_dev->lock' and improve parallelism. Signed-off-by: Romain Perier <romain.per...@free-electro

[PATCH v3 07/10] crypto: marvell: Move SRAM I/O operations to step functions

Currently the crypto requests were sent to engines sequentially. This commit moves the SRAM I/O operations from the prepare to the step functions. It provides flexibility for future works and allow to prepare a request while the engine is running. Signed-off-by: Romain Perier <romain.per...@f

[PATCH v3 06/10] crypto: marvell: Add a complete operation for async requests

cleanup logic). Signed-off-by: Romain Perier <romain.per...@free-electrons.com> Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com> --- Changes in v3: - Fixed comment for the "complete" field in mv_cesa_req_ops. Changes in v2: - Removed useless cosmetic chang

[PATCH v3 09/10] crypto: marvell: Add support for chaining crypto requests in TDMA mode

the required data structures to chain cryptographic requests together before sending them to an engine (stopped or possibly already running). Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Changes in v3: - Cosmetic changes: Extra blank lines and coding style

[PATCH v3 01/10] crypto: marvell: Add a macro constant for the size of the crypto queue

Adding a macro constant to be used for the size of the crypto queue, instead of using a numeric value directly. It will be easier to maintain in case we add more than one crypto queue of the same size. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> Acked-by: Boris Bre

[PATCH v3 02/10] crypto: marvell: Check engine is not already running when enabling a req

-by: Romain Perier <romain.per...@free-electrons.com> Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com> --- Changes in v3: - Fixed incorrectly aligned parameter for BUG_ON in mv_cesa_ablkcipher_std_step Changes in v2: - Reworded the commit message - Fixed cosm

[PATCH v3 04/10] crypto: marvell: Copy IV vectors by DMA transfers for acipher requests

the content of the IV vector would be overwritten by the last processed request. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com> --- Changes in v3: - Fixed coding style issues Changes in v2: - Reworded the co

[PATCH v3 03/10] crypto: marvell: Fix wrong type check in dma functions

So far, the way that the type of a TDMA operation was checked was wrong. We have to use the type mask in order to get the right part of the flag containing the type of the operation. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> Acked-by: Boris Brezillon <boris.brezi

[PATCH v3 00/10] Chain crypto requests together at the DMA level

MB/s After 129 MB/s 39.8 MB/s Improvement +57.8 % +25.5 % Romain Perier (10): crypto: marvell: Add a macro constant for the size of the crypto queue crypto: marvell: Check engine is not already running when enabling a req crypto: marvell: Fix wrong type

[PATCH v2 06/10] crypto: marvell: Add a complete operation for async requests

cleanup logic). Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Changes in v2: - Removed useless cosmetic change added for checkpatch (which had nothing to do with the patch itself) - Removed duplicated initialization of 'ivsize' mv_cesa_ablkcipher_co

[PATCH v2 02/10] crypto: marvell: Check engine is not already running when enabling a req

-by: Romain Perier <romain.per...@free-electrons.com> --- Changes in v2: - Reworded the commit message - Fixed cosmetic changes drivers/crypto/marvell/cipher.c | 2 ++ drivers/crypto/marvell/hash.c | 2 ++ drivers/crypto/marvell/tdma.c | 2 ++ 3 files changed, 6 insertions(+) diff

[PATCH v2 04/10] crypto: marvell: Copy IV vectors by DMA transfers for acipher requests

the content of the IV vector would be overwritten by the last processed request. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Changes in v2: - Reworded the commit message, the term 'asynchronously' was ambigous - Changed the value of CESA_TDMA_IV from 4 to 3 - Adding m

[PATCH v2 10/10] crypto: marvell: Increase the size of the crypto queue

by the engines. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/cesa.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marvell/cesa.c index bb91156..5147073 100644 --- a/drivers/crypto/m

[PATCH v2 07/10] crypto: marvell: Move SRAM I/O operations to step functions

Currently the crypto requests were sent to engines sequentially. This commit moves the SRAM I/O operations from the prepare to the step functions. It provides flexibility for future works and allow to prepare a request while the engine is running. Signed-off-by: Romain Perier <romain.per...@f

[PATCH v2 03/10] crypto: marvell: Fix wrong type check in dma functions

So far, the way that the type of a TDMA operation was checked was wrong. We have to use the type mask in order to get the right part of the flag containing the type of the operation. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/tdma.c | 5 ++

[PATCH v2 01/10] crypto: marvell: Add a macro constant for the size of the crypto queue

Adding a macro constant to be used for the size of the crypto queue, instead of using a numeric value directly. It will be easier to maintain in case we add more than one crypto queue of the same size. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/m

[PATCH v2 09/10] crypto: marvell: Add support for chaining crypto requests in TDMA mode

the required data structures to chain cryptographic requests together before sending them to an engine (stopped or possibly already running). Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- Changes in v2: - Reworded the commit message - Fixed cosmetic changes: coding

[PATCH v2 08/10] crypto: marvell: Add load balancing between engines

chaining crypto requests at the DMA level. By using a crypto queue per engine, we make sure that we keep the state of the tdma chain synchronized with the crypto queue. We also reduce contention on 'cesa_dev->lock' and improve parallelism. Signed-off-by: Romain Perier <romain.per...@free-electro

[PATCH v2 00/10] Chain crypto requests together at the DMA level

MB/s After 129 MB/s 39.8 MB/s Improvement +57.8 % +25.5 % Romain Perier (10): crypto: marvell: Add a macro constant for the size of the crypto queue crypto: marvell: Check engine is not already running when enabling a req crypto: marvell: Fix wrong type

Re: [PATCH 7/7] crypto: marvell: Add support for chaining crypto requests in TDMA mode

Hello, Le 15/06/2016 23:43, Boris Brezillon a écrit : On Wed, 15 Jun 2016 21:15:34 +0200 Romain Perier <romain.per...@free-electrons.com> wrote: The Cryptographic Engines and Security Accelerators (CESA) supports the Multi-Packet Chain Mode. With this mode enabled, multiple tdma reques

Re: [PATCH 6/7] crypto: marvell: Adding load balancing between engines

Hello, Le 15/06/2016 23:13, Boris Brezillon a écrit : On Wed, 15 Jun 2016 21:15:33 +0200 Romain Perier <romain.per...@free-electrons.com> wrote: This commits adds support for fine grained load balancing on multi-engine IPs. The engine is pre-selected based on its curren

Re: [PATCH 5/7] crypto: marvell: Adding a complete operation for async requests

ood catch, for both. Thanks, Romain -- Romain Perier, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majo

Re: [PATCH 4/7] crypto: marvell: Moving the tdma chain out of mv_cesa_tdma_req

Hello, Le 15/06/2016 22:42, Boris Brezillon a écrit : On Wed, 15 Jun 2016 21:15:31 +0200 Romain Perier <romain.per...@free-electrons.com> wrote: Actually the only way to access the tdma chain is to use the 'req' union Currently, ... ok Now that the dma specific fields ar

Re: [PATCH 3/7] crypto: marvell: Copy IV vectors by DMA transfers for acipher requests

Hello, Le 15/06/2016 22:07, Boris Brezillon a écrit : On Wed, 15 Jun 2016 21:15:30 +0200 Romain Perier <romain.per...@free-electrons.com> wrote: Adding a TDMA descriptor at the end of the request for copying the output IV vector via a DMA transfer. This is required for processing

Re: [PATCH 2/7] crypto: marvell: Check engine is not already running when enabling a req

n.first->cur_dma, engine->regs + CESA_TDMA_NEXT_ADDR); + BUG_ON(readl(engine->regs + CESA_SA_CMD) + & CESA_SA_CMD_EN_CESA_SA_ACCL0); Ditto. ack Regards, Romain -- Romain Perier, Free Electrons Embedded Linux, Kernel and Android engi

[PATCH 7/7] crypto: marvell: Add support for chaining crypto requests in TDMA mode

the required data structures to chain cryptographic requests together before sending them to an engine. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/cesa.c | 117 +++- drivers/crypto/marvell/cesa.h

[PATCH 0/7] Chain crypto requests together at the DMA level

MB/s After 129 MB/s 39.8 MB/s Improvement +57.8 % +25.5 % Romain Perier (7): crypto: marvell: Add a macro constant for the size of the crypto queue crypto: marvell: Check engine is not already running when enabling a req crypto: marvell: Copy IV vectors

[PATCH 6/7] crypto: marvell: Adding load balancing between engines

ove parallelism. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/cesa.c | 30 +-- drivers/crypto/marvell/cesa.h | 26 +++-- drivers/crypto/marvell/cipher.c | 59 ++--- drivers/crypto/marve

[PATCH 4/7] crypto: marvell: Moving the tdma chain out of mv_cesa_tdma_req

->chain.first value. Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/cesa.c | 3 ++- drivers/crypto/marvell/cesa.h | 31 +-- drivers/crypto/marvell/cipher.c | 40 ++-- drivers/crypt

[PATCH 5/7] crypto: marvell: Adding a complete operation for async requests

cleanup logic). Signed-off-by: Romain Perier <romain.per...@free-electrons.com> --- drivers/crypto/marvell/cesa.c | 1 + drivers/crypto/marvell/cesa.h | 3 +++ drivers/crypto/marvell/cipher.c | 47 - drivers/crypto/marvell/hash.c

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